//extern unsigned int BitsLength;
//=============================================================================
// Constructor
//(author:cylin)===============================================================
sc_h264d_top::sc_h264d_top(
const sc_module_name name,
const sc_time accept_delay, // accept delay (SC_TIME)
const sc_time read_response_delay, // read response delay (SC_TIME)
const sc_time write_response_delay // write response delay (SC_TIME)
)
: sc_module (name)
, accept_delay (accept_delay)
, read_response_delay (read_response_delay)
, write_response_delay (write_response_delay)
{
MEM = (unsigned char *) calloc(0xffffff, 1);//local memory in H264
//register socket methods
target_socket.register_b_transport(this, &sc_h264d_top::b_transport);
target_socket.register_nb_transport_fw(this, &sc_h264d_top::nb_transport_fw );
SC_THREAD(t_decoder_main);
SC_THREAD(t_decoder_dump_frame);
SC_THREAD(t_decoder_deblock_thread);
SC_THREAD(transaction_req);
SC_METHOD(call_nb_transport_bw);
sensitive<<event_call_nb_bw;
dont_initialize();
//--initialization tlm2 payload ,initiator_socket
transaction_ptr = new tlm::tlm_generic_payload(this);
data_buffer_ptr = new unsigned char [4];
//show_cur_tran = 30;
flag_dump_frame = 0;
}
ProcessingElement::ProcessingElement(sc_module_name name, int peID, int maxOutstandingRequests, int cacheWordsTotal,
CacheMode cacheMode, SpMVOCMSimulation *parentSim, QList<MemRequestTag> bypass) :
sc_module(name)
{
m_parentSim = parentSim;
m_peID = peID;
m_maxOutstandingRequests = maxOutstandingRequests;
m_streamBufferHeadPos = 0;
m_maxAlive = 0;
m_requestBypassEnable = bypass;
setupCache(cacheMode, cacheWordsTotal);
m_cyclesWithRequest = 0;
m_cyclesWithResponse = 0;
m_memLatencySamples = 0;
m_memLatencySum = sc_time(0, SC_NS);
m_cacheHits = m_cacheMisses = 0;
m_peNZCount = 0;
m_peRowCount = 0;
// declare SystemC threads
SC_THREAD(rowPtrAddrGen);
SC_THREAD(matrixValueAddrGen);
SC_THREAD(colIndAddrGen);
SC_THREAD(progress);
}
// *****************************************************************************
time_demux_tb::time_demux_tb(sc_module_name _name,
time_demux_config configuration) :
sc_module(_name),
bunch_crossing_request_sig("bunch_crossing_request_sig"),
stub_input_sig(configuration.layer_nr, "stub_input_sig"),
proc_unit_output_sigs(configuration.proc_unit_nr, configuration.layer_nr, "proc_unit_output_sigs"),
LHC_clock("LHC_clock", 25, SC_NS, 0.5, 25, SC_NS, true),
dut_do_demux("DUT_do_demux", configuration)
{
// ----- Creation and binding of signals -----------------------------------
// ----- Process registration ----------------------------------------------
SC_THREAD(write_stubs);
sensitive << bunch_crossing_request_sig;
SC_THREAD(print_output);
sensitive << proc_unit_output_sigs;
// ----- Module variable initialization ------------------------------------
// ----- Module instance / channel binding ---------------------------------
dut_do_demux.clk.bind(LHC_clock);
dut_do_demux.bunch_crossing_request.bind(bunch_crossing_request_sig);
dut_do_demux.stub_input.bind(stub_input_sig);
dut_do_demux.proc_unit_outputs.bind(proc_unit_output_sigs);
log_buffer << std::endl
<< "Simulation Output of DO demux TB:" << std::endl
<< "********************************************" << std::endl;
return;
}
hit_generator_tb::hit_generator_tb(const sc_module_name _name, const track_trigger_config configuration) :
sc_module(_name),
hit_signals(configuration.hit_generator.chip_addresses, "hit_signals"),
hit_cnt_signal("hit_cnt_signal"),
dut_hit_generator("Hit_Generator_DUT", configuration.hit_generator),
configuration(configuration.hit_generator)
{
// ----- Creation and binding of signals -----------------------------------
dut_hit_generator.stub_outputs(hit_signals);
dut_hit_generator.hit_cnt.bind(hit_cnt_signal);
// ----- Process registration ----------------------------------------------
SC_THREAD(check_output);
for (auto& hit_signal : hit_signals)
{
sensitive << hit_signal.data_written_event();
}
SC_THREAD(check_hit_counter);
sensitive << hit_cnt_signal;
// ----- Module variable initialization ------------------------------------
// ----- Module instance / channel binding ---------------------------------
log_buffer << std::endl
<< "Simulation Output of Hit Generator TB:" << std::endl
<< "*******************************************" << std::endl;
return;
}
frontend_chip_cbc_tb::frontend_chip_cbc_tb(sc_module_name _name,
sc_trace_file* trace_file, track_trigger_config configuration) :
sc_module(_name),
stub_input_sig("stub_input"),
data_valid_signals(configuration.cbc_sensor_module.frontend_chip.max_stubs_per_cycle, "data_valid_sig"),
fe_out_signals(configuration.cbc_sensor_module.frontend_chip.max_stubs_per_cycle, "fe_out_sig"),
LHC_clock("LHC_clock", 25, SC_NS, 0.5, 25, SC_NS, true),
dut_front_end_chip("Front_End_Chip_DUT", configuration.cbc_sensor_module.frontend_chip)
{
// ----- Creation and binding of signals -----------------------------------
dut_front_end_chip.clk.bind(LHC_clock);
dut_front_end_chip.stub_input.bind(stub_input_sig);
dut_front_end_chip.data_valid.bind(data_valid_signals);
dut_front_end_chip.stub_outputs.bind(fe_out_signals);
// ----- Process registration ----------------------------------------------
// ----- Module variable initialization ------------------------------------
// ----- Module instance / channel binding ---------------------------------
log_buffer << std::endl
<< "Simulation Output of Front End Chip CBC TB:" << std::endl
<< "*******************************************" << std::endl;
trace(trace_file);
SC_THREAD(generate_stubs);
SC_THREAD(analyse_FE_out);
sensitive << data_valid_signals;
sensitive << fe_out_signals;
return;
}
// Constructor
H264_DECODER_pv::H264_DECODER_pv(sc_module_name module_name) : H264_DECODER_pv_base(module_name) {
cout << this->name () << " Constructor" << endl;
// irq.initialize (false);
SC_THREAD(algorithm_thread);
SC_THREAD(frame_ready_thread);
}
RTDriver::RTDriver(sc_module_name mname)
: sc_module(mname),
NI2P("NI2P"),
P2NI("P2NI"),
rtia("rtia"),
rtic("rtic"),
rtica("rtica"),
rtoa("rtoa"),
rtoc("rtoc"),
rtoca("rtoca")
{
SC_METHOD(IPdetect);
sensitive << rtia;
SC_METHOD(OPdetect);
sensitive << rtod[0] << rtod[1] << rtod[2] << rtod[3] << rtovc << rtoft;
SC_METHOD(Creditdetect);
for(unsigned int i = 0; i<SubChN; i++) {
sensitive << CPa[i];
sensitive << out_cred[i];
}
sensitive << rtic << rtoca;
SC_THREAD(send);
SC_THREAD(recv);
rtinp_sig = false;
rtoutp_sig = false;
}
fb_io_device::fb_io_device (sc_module_name _name, uint32_t master_id,
fb_io_reset_t *reset_status)
:sc_module(_name)
{
char *buf = new char[strlen (_name) + 3];
m_regs = new fb_io_regs_t;
memset (m_regs, 0, sizeof (fb_io_regs_t));
m_io_res = new fb_io_resource_t;
memset (m_io_res, 0, sizeof (fb_io_resource_t));
m_io_res->regs = m_regs;
m_io_res->mem_size = 0;
m_dma_in_use = 0;
m_regs->m_buf_addr = 0;
m_regs->m_irqstat = 0;
if(reset_status->fb_start)
{
m_regs->m_image_w = reset_status->fb_w;
m_regs->m_image_h = reset_status->fb_h;
m_regs->m_mode = reset_status->fb_mode;
m_regs->m_ctrl = (1 << 0);
m_regs->m_status = FB_IO_RUNNING;
m_regs->m_disp_wrap = reset_status->fb_display_on_wrap;
}
else
{
m_regs->m_image_w = 0;
m_regs->m_image_h = 0;
m_regs->m_mode = NONE;
m_regs->m_ctrl = 0;
m_regs->m_status = FB_IO_STOPPED;
}
m_regs->m_irq = 0;
strcpy (buf, _name);
buf[strlen (_name)] = '_';
buf[strlen (_name)+2] = '\0';
buf[strlen (_name)+1] = 's';
slave = new fb_io_device_slave (buf, m_io_res, &m_ev_irq_update,
&m_ev_display, &m_ev_start_stop, &m_read_state, &m_ev_read);
/* if needed */
buf[strlen(_name)+1] = 'm';
master = new fb_io_device_master (buf, master_id);
m_pin = -1;
memset (&m_read_state, 0, sizeof (m_read_state));
if(reset_status->fb_start)
init (reset_status->fb_w, reset_status->fb_h, reset_status->fb_mode);
SC_THREAD (irq_update_thread);
SC_THREAD (display_thread);
SC_THREAD (start_stop_thread);
SC_THREAD(read_thread);
}
UartSC::UartSC(sc_core::sc_module_name uart):
sc_module(uart)
{
#ifdef UART_SC_STDIN_ENABLE
SC_THREAD(driveRx);
#endif
SC_THREAD(checkTx);
dont_initialize();
sensitive << uarttx;
} // UartSC ()
top(sc_module_name name)
: sc_module(name),
x_count(0), y_count(0), z_count(0) // initialize the buffer counter
{
SC_THREAD(process1);
sensitive << input ;
// dont_initialize();
SC_THREAD(process2);
sensitive << y2;
// dont_initialize();
SC_THREAD(process3);
sensitive << y1 << y3;
// dont_initialize();
}
sl_timer_device::sl_timer_device (sc_module_name module_name) : slave_device (module_name)
{
m_period = 0;
m_mode = 0;
m_value = 0;
m_ns_period = 0;
m_last_period = 0;
m_next_period = 0;
m_irq = false;
m_config_mod = false;
SC_THREAD (sl_timer_thread);
SC_THREAD (irq_update_thread);
}
/*
* Constructor
*/
master::master(sc_core::sc_module_name module_name):
sc_core::sc_module(module_name),
amba_pv::signal_slave_base<signal_t>((const char *) module_name),
pv_dma_irq_in("pv_dma_irq_in") {
pv_dma_irq_in(* this);
SC_THREAD(run);
}
//////////////////////////////////////////////////////////////////////////////
///
/// Constructor
///
//////////////////////////////////////////////////////////////////////////////
controller::controller(sc_module_name zName, double dClockPeriod,
sc_time_unit ClockPeriodUnit, unsigned char ucID,
unsigned char ucPriority, bool bVerbose) :
SpaceBaseModule(zName, dClockPeriod, ClockPeriodUnit, ucID, ucPriority,
bVerbose) {
SC_THREAD(thread);
}
Vga::Vga(sc_core::sc_module_name name) :
sc_core::sc_module(name), address(0), intr(false)
{
SC_THREAD(thread);
if(SDL_Init(SDL_INIT_VIDEO) < 0) {
SC_REPORT_FATAL(sc_module::name(), SDL_GetError());
}
atexit(SDL_Quit);
SDL_SetEventFilter(filter);
screen = SDL_SetVideoMode(VGA_WIDTH, VGA_HEIGHT, 16,
SDL_DOUBLEBUF | SDL_HWSURFACE);
if(screen->format->BytesPerPixel != 2) {
SC_REPORT_FATAL(sc_module::name(), SDL_GetError());
}
black = SDL_MapRGB(screen->format, 0x00, 0x00, 0x00);
white = SDL_MapRGB(screen->format, 0xFF, 0xFF, 0xFF);
SDL_WM_SetCaption(sc_module::name(), NULL);
#ifdef DEBUG
std::cout << "Debug: " << sc_module::name() <<
": LCD controller TLM model\n";
#endif
}
///////////////////////////////////////////////////////////////////////////////
//
// Constructeur
//
///////////////////////////////////////////////////////////////////////////////
Console::Console( sc_module_name zName )
: sc_module(zName)
{
SC_THREAD(thread);
sensitive<< ClockPort.pos();
}
Traffic::Traffic(sc_module_name nm, unsigned Period)
{
period = Period;
SC_THREAD(traffic_process);
}
// le constructeur
Display::Display (sc_core::sc_module_name insname,
const int w , const int h ,
const int lsync , const int fsync ):
sc_core::sc_module(insname),
p_WIDTH(w), p_HEIGHT(h), p_LINE_SYNC(lsync), p_FRAME_SYNC(fsync)
{
SC_THREAD(read_pixels);
sensitive << clk.pos();
dont_initialize();
// SDL INIT
if ( SDL_Init(SDL_INIT_VIDEO) < 0 )
{
cerr << "Unable to initilize SDL: "
<< SDL_GetError() << endl;
exit(1);
}
// allocating frame pointer
fb_memory = SDL_SetVideoMode(p_WIDTH, p_HEIGHT, 32, SDL_SWSURFACE); // 32 bits per pixel
if ( fb_memory == NULL ) {
cerr << "Unable to create "
<< p_WIDTH <<"x"<< p_HEIGHT << "display with 1 bpp:"
<< SDL_GetError() << endl;
exit(1);
}
// debut de l'image
pixel_c = 0;
pixel_l = 0;
std::cout << "Display " << name()
<< " was created succesfully " << std::endl;
}
IrqGenerator( sc_module_name generatorName, sc_time latency ) : sc_module(generatorName),
targSocket(("irq_target_" + boost::lexical_cast<std::string>(generatorName)).c_str()),
latency(latency), generator(static_cast<unsigned>(std::time(NULL))) {
this->targSocket.register_b_transport(this, &IrqGenerator::b_transport);
this->lastIrq = -1;
SC_THREAD(generateIrq);
end_module();
}
void comb()
{
if ( init )
{
init = 0;
SC_THREAD(dork);
}
}
MyMod(sc_core::sc_module_name name) : gr_device(name, gs::reg::INDEXED_ADDRESS, 1, NULL) {
SC_THREAD(main_action);
r.create_register("Reg0", "Register0_MyMod", 0x00, gs::reg::STANDARD_REG | gs::reg::SINGLE_IO | gs::reg::SINGLE_BUFFER | gs::reg::FULL_WIDTH, 0xabc);
r[0x00].disable_events();
std::cout << "created sharedio register Reg0 = 0x" << std::hex << r[0x00] << std::endl;
}
TransactionRouterOutport::TransactionRouterOutport(
sc_module_name nm,
direction_t direction) :
sc_module_ext(nm),
m_direction(direction),
m_last_port(NORTH),
m_num_buffered(0),
m_max_buffered(4)
{
out.register_nb_transport_bw(this, &TransactionRouterOutport::nb_transport_bw);
// m_statisticUnit = StatisticUnit::s_get_instance();
SC_THREAD(worker);
SC_THREAD(out_worker);
}
/******************** Constructor ***********************/
Hardware::Hardware(sc_module_name name): sc_module(name)
{
SAD_reg =0;
blk1_mem_address =0;
for(unsigned i=0; i<SIZE; i++){
blk2_mem_address[i] =0;
}
blk3_mem_address =0;
control_reg =0;
Done_reg =0;
SC_THREAD(Hardware_master_process);
//sensitive << Clk.pos();
SC_THREAD(Hardware_slave_process);
//sensitive << Clk.pos();
}
//Constructor
filter::filter(sc_module_name name):sc_module(name)
{
//mem = new sc_fifo<unsigned char> ("mem", 600*600);
SC_THREAD(doFilter);
dont_initialize();
sensitive << clock.pos();
}
monitor(sc_module_name name)
: sc_module(name)
{
SC_THREAD(run);
sensitive << z ;
}
// Constructor
Control::Control (sc_module_name name, int _start_addr, int _end_addr) : sc_module (name){
start_addr = _start_addr;
end_addr = _end_addr;
rawData = 0;
nextnumber = 0;
SC_HAS_PROCESS(Control);
SC_THREAD(mainc);
}
FSM::FSM(sc_module_name name, int _limit) : sc_module(name){
limit = _limit;
InitialState = S0;
CurrentState = InitialState;
Xtoggle = false;
SC_HAS_PROCESS(FSM);
SC_THREAD(fsm_functionality);
sensitive << tick;
}
interchange::interchange(sc_module_name name, int size) : sc_module(name)
{
local_mem = new int*[size];
for (int i = 0; i < size; ++i) {
local_mem[i] = new int[size];
}
this->size = size;
SC_THREAD(main);
}
///////////////////////////////////////////////////////////////////////////////
//
// Constructeur
//
///////////////////////////////////////////////////////////////////////////////
Bubble::Bubble( sc_module_name name )
{
/*
À compléter
*/
SC_THREAD(thread);
}
stimulus(sc_module_name name)
: sc_module(name)
{
SC_THREAD(run);
sensitive << clk.pos();
// dont_initialize();
}
timer_device::timer_device (sc_module_name module_name) : slave_device (module_name)
{
divisor = 0;
ns_period = 0;
divisor_changed = false;
bOneShot = false;
SC_THREAD (timer_thread);
}
