.pingroup = TEGRA_DRIVE_PINGROUP_##_name, \
.hsm = TEGRA_HSM_DISABLE, \
.schmitt = TEGRA_SCHMITT_DISABLE, \
.drive = TEGRA_DRIVE_DIV_1, \
.pull_down = TEGRA_PULL_31, \
.pull_up = TEGRA_PULL_31, \
.slew_rising = TEGRA_SLEW_SLOWEST, \
.slew_falling = TEGRA_SLEW_SLOWEST, \
}
static __initdata struct tegra_drive_pingroup_config ventana_drive_pinmux[] = {
DEFAULT_DRIVE(DDC),
DEFAULT_DRIVE(VI1),
DEFAULT_DRIVE(SDIO1),
SET_DRIVE(DBG, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
SET_DRIVE(VI2, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
SET_DRIVE(AT1, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
SET_DRIVE(AO1, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
RF_REQUEST_DRIVE(CSUS),
};
static __initdata struct tegra_pingroup_config ventana_pinmux[] = {
{TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
.schmitt = TEGRA_SCHMITT_##_schmitt, \
.drive = TEGRA_DRIVE_##_drive, \
.pull_down = TEGRA_PULL_##_pulldn_drive, \
.pull_up = TEGRA_PULL_##_pullup_drive, \
.slew_rising = TEGRA_SLEW_##_pulldn_slew, \
.slew_falling = TEGRA_SLEW_##_pullup_slew, \
}
/* !!!FIXME!!!! POPULATE THIS TABLE */
static __initdata struct tegra_drive_pingroup_config enrc2u_drive_pinmux[] = {
/* DEFAULT_DRIVE(<pin_group>), */
/* SET_DRIVE(ATA, DISABLE, DISABLE, DIV_1, 31, 31, FAST, FAST) */
/* All I2C pins are driven to maximum drive strength */
/* GEN1 I2C */
SET_DRIVE(DBG, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* GEN2 I2C */
SET_DRIVE(AT5, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* CAM I2C */
SET_DRIVE(GME, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* DDC I2C */
SET_DRIVE(DDC, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* PWR_I2C */
SET_DRIVE(AO1, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* UART3 */
SET_DRIVE(UART3, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
};
#define SET_DRIVE(_name, _hsm, _schmitt, _drive, _pulldn_drive, _pullup_drive, _pulldn_slew, _pullup_slew) \
{ \
.pingroup = TEGRA_DRIVE_PINGROUP_##_name, \
.hsm = TEGRA_HSM_##_hsm, \
.schmitt = TEGRA_SCHMITT_##_schmitt, \
.drive = TEGRA_DRIVE_##_drive, \
.pull_down = TEGRA_PULL_##_pulldn_drive, \
.pull_up = TEGRA_PULL_##_pullup_drive, \
.slew_rising = TEGRA_SLEW_##_pulldn_slew, \
.slew_falling = TEGRA_SLEW_##_pullup_slew, \
}
static __initdata struct tegra_drive_pingroup_config t30_def_drive_pinmux[] = {
SET_DRIVE(DAP2, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
SET_DRIVE(DAP1, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
};
#ifdef CONFIG_PM_SLEEP
static u32 pinmux_reg[TEGRA_MAX_PINGROUP + ARRAY_SIZE(tegra_soc_drive_pingroups)];
static int tegra30_pinmux_suspend(void)
{
unsigned int i;
u32 *ctx = pinmux_reg;
for (i = 0; i < TEGRA_MAX_PINGROUP; i++) {
*ctx++ = pg_readl(tegra_soc_pingroups[i].mux_bank,
tegra_soc_pingroups[i].mux_reg);
{ \
.pingroup = TEGRA_DRIVE_PINGROUP_##_name, \
.hsm = TEGRA_HSM_##_hsm, \
.schmitt = TEGRA_SCHMITT_##_schmitt, \
.drive = TEGRA_DRIVE_##_drive, \
.pull_down = TEGRA_PULL_##_pulldn_drive, \
.pull_up = TEGRA_PULL_##_pullup_drive, \
.slew_rising = TEGRA_SLEW_##_pulldn_slew, \
.slew_falling = TEGRA_SLEW_##_pullup_slew, \
}
/* !!!FIXME!!!! POPULATE THIS TABLE */
static __initdata struct tegra_drive_pingroup_config endeavoru_drive_pinmux[] = {
/* DEFAULT_DRIVE(<pin_group>), */
/* SET_DRIVE(ATA, DISABLE, DISABLE, DIV_1, 31, 31, FAST, FAST) */
SET_DRIVE(DAP2, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
SET_DRIVE(SPI, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* All I2C pins are driven to maximum drive strength */
/* GEN1 I2C */
SET_DRIVE(DBG, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* GEN2 I2C */
SET_DRIVE(AT5, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* CAM I2C */
SET_DRIVE(GME, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* DDC I2C */
SET_DRIVE(DDC, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/gpio.h>
#include <mach/pinmux.h>
#include <mach/gpio-tegra.h>
#include "board.h"
#include "board-maya.h"
#include "devices.h"
#include "gpio-names.h"
#include <mach/pinmux-t11.h>
static __initdata struct tegra_drive_pingroup_config maya_drive_pinmux[] = {
/* DEFAULT_DRIVE(<pin_group>), */
/* SDMMC1 */
SET_DRIVE(SDIO1, ENABLE, DISABLE, DIV_1, 36, 20, SLOW, SLOW),
/* SDMMC3 */
SET_DRIVE(SDIO3, ENABLE, DISABLE, DIV_1, 22, 36, FASTEST, FASTEST),
/* SDMMC4 */
SET_DRIVE_WITH_TYPE(GMA, ENABLE, DISABLE, DIV_1, 2, 2, FASTEST,
FASTEST, 1),
};
/* Initially setting all used GPIO's to non-TRISTATE */
static __initdata struct tegra_pingroup_config maya_pinmux_set_nontristate[] = {
DEFAULT_PINMUX(GPIO_X4_AUD, RSVD, PULL_DOWN, NORMAL, OUTPUT),
DEFAULT_PINMUX(GPIO_X5_AUD, RSVD, PULL_UP, NORMAL, INPUT),
DEFAULT_PINMUX(GPIO_X6_AUD, RSVD3, PULL_UP, NORMAL, INPUT),
DEFAULT_PINMUX(GPIO_X7_AUD, RSVD, PULL_DOWN, NORMAL, OUTPUT),
{ \
.pingroup = TEGRA_DRIVE_PINGROUP_##_name, \
.hsm = TEGRA_HSM_##_hsm, \
.schmitt = TEGRA_SCHMITT_##_schmitt, \
.drive = TEGRA_DRIVE_##_drive, \
.pull_down = TEGRA_PULL_##_pulldn_drive, \
.pull_up = TEGRA_PULL_##_pullup_drive, \
.slew_rising = TEGRA_SLEW_##_pulldn_slew, \
.slew_falling = TEGRA_SLEW_##_pullup_slew, \
}
/* !!!FIXME!!!! POPULATE THIS TABLE */
static __initdata struct tegra_drive_pingroup_config grouper_drive_pinmux[] = {
/* DEFAULT_DRIVE(<pin_group>), */
/* SET_DRIVE(ATA, DISABLE, DISABLE, DIV_1, 31, 31, FAST, FAST) */
SET_DRIVE(DAP2, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* All I2C pins are driven to maximum drive strength */
/* GEN1 I2C */
SET_DRIVE(DBG, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* GEN2 I2C */
SET_DRIVE(AT5, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* CAM I2C */
SET_DRIVE(GME, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* DDC I2C */
SET_DRIVE(DDC, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* PWR_I2C */
*/
#define SET_DRIVE(_name, _hsm, _schmitt, _drive, _pulldn_drive, _pullup_drive, _pulldn_slew, _pullup_slew) \
{ \
.pingroup = TEGRA_DRIVE_PINGROUP_##_name, \
.hsm = TEGRA_HSM_##_hsm, \
.schmitt = TEGRA_SCHMITT_##_schmitt, \
.drive = TEGRA_DRIVE_##_drive, \
.pull_down = TEGRA_PULL_##_pulldn_drive, \
.pull_up = TEGRA_PULL_##_pullup_drive, \
.slew_rising = TEGRA_SLEW_##_pulldn_slew, \
.slew_falling = TEGRA_SLEW_##_pullup_slew, \
}
/* !!!FIXME!!!! Update drive strength with characterized value */
static __initdata struct tegra_drive_pingroup_config p1852_drive_pinmux[] = {
SET_DRIVE(DAP2, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* All I2C pins are driven to maximum drive strength */
/* GEN1 I2C */
SET_DRIVE(DBG, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* GEN2 I2C */
SET_DRIVE(AT5, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* DDC I2C */
SET_DRIVE(DDC, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* PWR_I2C */
SET_DRIVE(AO1, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* SDMMC4 */
_pullup_drive, _pulldn_slew, _pullup_slew) \
{ \
.pingroup = TEGRA_DRIVE_PINGROUP_##_name, \
.hsm = TEGRA_HSM_##_hsm, \
.schmitt = TEGRA_SCHMITT_##_schmitt, \
.drive = TEGRA_DRIVE_##_drive, \
.pull_down = TEGRA_PULL_##_pulldn_drive, \
.pull_up = TEGRA_PULL_##_pullup_drive, \
.slew_rising = TEGRA_SLEW_##_pulldn_slew, \
.slew_falling = TEGRA_SLEW_##_pullup_slew, \
}
/* !!!FIXME!!!! Update drive strength with characterized value */
static __initdata struct tegra_drive_pingroup_config m2601_drive_pinmux[] = {
/* ATC1 CFG */
SET_DRIVE(AT1, ENABLE, ENABLE, DIV_1, 0, 0, SLOWEST, SLOWEST),
/* ATC2 CFG */
SET_DRIVE(AT2, ENABLE, ENABLE, DIV_1, 0, 0, SLOWEST, SLOWEST),
/* ATC3 CFG */
SET_DRIVE(AT3, ENABLE, ENABLE, DIV_1, 0, 0, SLOWEST, SLOWEST),
/* ATC4 CFG */
SET_DRIVE(AT4, DISABLE, DISABLE, DIV_1, 0, 0, SLOWEST, SLOWEST),
/* All I2C pins are driven to maximum drive strength */
/* GEN1 I2C */
SET_DRIVE(DBG, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* GEN2 I2C */
SET_DRIVE(AT5, DISABLE, ENABLE, DIV_1, 12, 30, FASTEST, FASTEST),
/* DDC I2C */
.drive = TEGRA_DRIVE_##_drive, \
.pull_down = TEGRA_PULL_##_pulldn_drive, \
.pull_up = TEGRA_PULL_##_pullup_drive, \
.slew_rising = TEGRA_SLEW_##_pulldn_slew, \
.slew_falling = TEGRA_SLEW_##_pullup_slew, \
}
static __initdata struct tegra_drive_pingroup_config n1_drive_pinmux[] = {
DEFAULT_DRIVE(AO1),
DEFAULT_DRIVE(AT1),
DEFAULT_DRIVE(DBG),
DEFAULT_DRIVE(VI1),
DEFAULT_DRIVE(VI2),
DEFAULT_DRIVE(SDIO1),
SET_DRIVE(DDC, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
SET_DRIVE(DTF, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
SET_DRIVE(I2CP, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
SET_DRIVE(RM, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
};
static __initdata struct tegra_pingroup_config n1_pinmux[] = {
{TEGRA_PINGROUP_ATA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_CSUS, TEGRA_MUX_VI_SENSOR_CLK, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
.schmitt = TEGRA_SCHMITT_ENABLE, \
.drive = TEGRA_DRIVE_DIV_1, \
.pull_down = TEGRA_PULL_31, \
.pull_up = TEGRA_PULL_31, \
.slew_rising = TEGRA_SLEW_SLOWEST, \
.slew_falling = TEGRA_SLEW_SLOWEST, \
}
//ZTEBSP DangXiao 20120317, set I2C drive strength for wake up failure case, start
static __initdata struct tegra_drive_pingroup_config whistler_drive_pinmux[] = {
//DEFAULT_DRIVE(DBG),
//DEFAULT_DRIVE(DDC),
DEFAULT_DRIVE(VI1),
//DEFAULT_DRIVE(VI2),
DEFAULT_DRIVE(SDIO1),
SET_DRIVE(DAP2, DISABLE, ENABLE, DIV_1, 46, 46, SLOWEST, SLOWEST),
SET_DRIVE(DAP3, DISABLE, ENABLE, DIV_1, 46, 46, SLOWEST, SLOWEST),
SET_DRIVE(DBG, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), // I2C1
SET_DRIVE(DDC, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), // I2C2-1
SET_DRIVE(AT1, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), // I2C2-2
SET_DRIVE(VI2, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), // I2C3
SET_DRIVE(AO1, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), // DVC
};
//ZTEBSP DangXiao 20120317, set I2C drive strength for wake up failure case, end
static __initdata struct tegra_pingroup_config whistler_pinmux[] = {
{TEGRA_PINGROUP_ATA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
//[ECID:000000] ZTEBSP maoke 20111001 end, for skate bring up
#define SET_DRIVE(_name, _hsm, _schmitt, _drive, _pulldn_drive, _pullup_drive, _pulldn_slew, _pullup_slew) \
{ \
.pingroup = TEGRA_DRIVE_PINGROUP_##_name, \
.hsm = TEGRA_HSM_##_hsm, \
.schmitt = TEGRA_SCHMITT_##_schmitt, \
.drive = TEGRA_DRIVE_##_drive, \
.pull_down = TEGRA_PULL_##_pulldn_drive, \
.pull_up = TEGRA_PULL_##_pullup_drive, \
.slew_rising = TEGRA_SLEW_##_pulldn_slew, \
.slew_falling = TEGRA_SLEW_##_pullup_slew, \
}
static __initdata struct tegra_drive_pingroup_config m470_drive_pinmux[] = {
/* DEFAULT_DRIVE(<pin_group>), */
/* SET_DRIVE(ATA, DISABLE, DISABLE, DIV_1, 31, 31, FAST, FAST) */
SET_DRIVE(DAP2, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
SET_DRIVE(DAP1, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* All I2C pins are driven to maximum drive strength */
/* GEN1 I2C */
SET_DRIVE(DBG, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* GEN2 I2C */
SET_DRIVE(AT5, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* CAM I2C */
SET_DRIVE(GME, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
/* DDC I2C */
SET_DRIVE(DDC, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
.drive = TEGRA_DRIVE_##_drive, \
.pull_down = TEGRA_PULL_##_pulldn_drive, \
.pull_up = TEGRA_PULL_##_pullup_drive, \
.slew_rising = TEGRA_SLEW_##_pulldn_slew, \
.slew_falling = TEGRA_SLEW_##_pullup_slew, \
}
static __initdata struct tegra_drive_pingroup_config n1_drive_pinmux[] = {
DEFAULT_DRIVE(AO1),
DEFAULT_DRIVE(AT1),
DEFAULT_DRIVE(DBG),
DEFAULT_DRIVE(VI1),
DEFAULT_DRIVE(VI2),
DEFAULT_DRIVE(SDIO1),
SET_DRIVE(DDC, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
SET_DRIVE(DTF, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
SET_DRIVE(I2CP, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
SET_DRIVE(RM, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
#if defined (CONFIG_MACH_BOSE_ATT)
SET_DRIVE(DAP2, ENABLE, ENABLE, DIV_1, 31, 31, SLOWEST, SLOWEST),
SET_DRIVE(DAP3, ENABLE, ENABLE, DIV_1, 31, 31, SLOWEST, SLOWEST),
#endif
};
static __initdata struct tegra_pingroup_config n1_pinmux[] = {
{TEGRA_PINGROUP_ATA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
#define DEFAULT_DRIVE(_name) \
{ \
.pingroup = TEGRA_DRIVE_PINGROUP_##_name, \
.hsm = TEGRA_HSM_DISABLE, \
.schmitt = TEGRA_SCHMITT_ENABLE, \
.drive = TEGRA_DRIVE_DIV_1, \
.pull_down = TEGRA_PULL_31, \
.pull_up = TEGRA_PULL_31, \
.slew_rising = TEGRA_SLEW_SLOWEST, \
.slew_falling = TEGRA_SLEW_SLOWEST, \
}
static __initdata struct tegra_drive_pingroup_config whistler_drive_pinmux[] = {
DEFAULT_DRIVE(VI1),
DEFAULT_DRIVE(SDIO1),
SET_DRIVE(DAP2, DISABLE, ENABLE, DIV_1, 46, 46, SLOWEST, SLOWEST),
SET_DRIVE(DAP3, DISABLE, ENABLE, DIV_1, 46, 46, SLOWEST, SLOWEST),
SET_DRIVE(DBG, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), /* I2C1 */
SET_DRIVE(DDC, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), /* I2C2-1 */
SET_DRIVE(AT1, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), /* I2C2-2 */
SET_DRIVE(VI2, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), /* I2C3 */
SET_DRIVE(AO1, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), /* DVC */
};
static __initdata struct tegra_pingroup_config whistler_pinmux[] = {
{TEGRA_PINGROUP_ATA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATB, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATC, TEGRA_MUX_SDIO4, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATD, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},