//spi initialization void EF_spiFlashSpiInit(void) { SPI_InitTypeDef SPI_InitStruct; /***Clock***/ #ifdef SPIFLASH_USE_SPI1 RCC_APB2PeriphClockCmd(SPIFLASH_SPI_RCC, ENABLE); #else RCC_APB1PeriphClockCmd(SPIFLASH_SPI_RCC, ENABLE); #endif /***SPI***/ SPI_Cmd(SPIFLASH_SPI,DISABLE); SPI_InitStruct.SPI_Direction = SPI_Direction_2Lines_FullDuplex; SPI_InitStruct.SPI_Mode = SPI_Mode_Master; SPI_InitStruct.SPI_DataSize = SPI_DataSize_8b; SPI_InitStruct.SPI_CPOL = SPI_CPOL_Low;//SPI_CPOL_Low; // CPOL = 0 --> clock is low when idle SPI_InitStruct.SPI_CPHA = SPI_CPHA_1Edge; // CPHA = 0 --> data is sampled at the first edge SPI_InitStruct.SPI_NSS = SPI_NSS_Soft; SPI_InitStruct.SPI_BaudRatePrescaler = MX66_Baudrate; // APB2@42MHz and APB1@21MHz SPI_InitStruct.SPI_FirstBit = SPI_FirstBit_MSB; SPI_InitStruct.SPI_CRCPolynomial=7; SPI_ClearITPendingBit(SPIFLASH_SPI,SPI_IT_TXE|SPI_IT_RXNE); SPI_Init(SPIFLASH_SPI,&SPI_InitStruct); SPI_Cmd(SPIFLASH_SPI,ENABLE); EF_spiFlashRW(0xFF); EF_spiFlashRW(0xFF); }
void SPI2_Init(void) { GPIO_InitTypeDef GPIO_InitStructure; SPI_InitTypeDef SPI_InitStructure; RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB,ENABLE); //GPIOB CLOCK RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE); //SPI2 CLOCK //SPI SCK GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_PinAFConfig(GPIOB,GPIO_PinSource13,GPIO_AF_SPI2); GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd=GPIO_PuPd_NOPULL; GPIO_Init(GPIOB, &GPIO_InitStructure); //SPI MOSI GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_PinAFConfig(GPIOB,GPIO_PinSource15,GPIO_AF_SPI2); GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd=GPIO_PuPd_NOPULL; GPIO_Init(GPIOB, &GPIO_InitStructure); //SPI MISO GPIO_InitStructure.GPIO_Pin = GPIO_Pin_14; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_PinAFConfig(GPIOB,GPIO_PinSource14,GPIO_AF_SPI2); GPIO_InitStructure.GPIO_OType = GPIO_OType_OD; GPIO_InitStructure.GPIO_PuPd=GPIO_PuPd_NOPULL; GPIO_Init(GPIOB, &GPIO_InitStructure); //SPI configuration SPI_DeInit(SPI2); SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; //Full Duplex SPI_InitStructure.SPI_Mode = SPI_Mode_Master; //As master SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; //8bit SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low; SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge; SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8; SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; //MSB first SPI_InitStructure.SPI_CRCPolynomial = 7; //CRC SPI_Init(SPI2, &SPI_InitStructure); SPI_ClearITPendingBit(SPI2,SPI_IT_TXE|SPI_IT_RXNE); SPI_Cmd(SPI2,ENABLE); }
__interrupt void SPI_IRQHandler(void) { static u8 cnt = 0; u8 * data = getDataBuf(); if(SPI_GetITStatus(SPI_IT_RXNE) != RESET){ spi_cmd = SPI_ReceiveData(); SPI_ClearITPendingBit(SPI_IT_RXNE); } if(SPI_GetITStatus(SPI_IT_TXE) != RESET){ if(spi_cmd == 0xff) SPI_SendData(cnt); else if((spi_cmd & 0xc0) == 0x40) SPI_SendData(data[spi_cmd&0x3f]); else if((spi_cmd & 0xc0) == 0x80) { switch(buffer_s) { case 0: SPI_SendData(Rx_Buffer[spi_cmd&0x3f]); break; #if defined(NEED_RESOLVE_INFO) case 1: SPI_SendData(RxGGA[spi_cmd&0x3f]); break; #endif // defined(NEED_RESOLVE_INFO) case 2: SPI_SendData(DataP[spi_cmd&0x3f]); break; case 3: SPI_SendData(DataQ[spi_cmd&0x3f]); break; default: SPI_SendData(data[spi_cmd&0x3f]); break; } } else if((spi_cmd & 0xf0) == 0x30) buffer_s = spi_cmd & 0xf; else if((spi_cmd & 0xfc) == 0x14) { switch(spi_cmd & 0x03) { case 0: BEEP_Cmd(DISABLE); SPI_SendData(spi_cmd); break; case 1: BEEP_DeInit(); BEEP_Init(BEEP_FREQUENCY_1KHZ); BEEP_Cmd(ENABLE); SPI_SendData(spi_cmd); break; case 2: BEEP_DeInit(); BEEP_Init(BEEP_FREQUENCY_2KHZ); BEEP_Cmd(ENABLE); SPI_SendData(spi_cmd); break; case 3: BEEP_DeInit(); BEEP_Init(BEEP_FREQUENCY_4KHZ); BEEP_Cmd(ENABLE); SPI_SendData(spi_cmd); break; default: BEEP_Cmd(DISABLE); SPI_SendData(data[spi_cmd]); break; } } else SPI_SendData(0x66); cnt ++; SPI_ClearITPendingBit(SPI_IT_TXE); } }