/******************************************************
* Function Definitions
******************************************************/
static void spi_status_print(SPI_MemMapPtr p)
{
printf("MCR %x, TCR %x, CTAR %x, SR %x, RSER %x PUSHR %x\r\n",
SPI_MCR_REG(p), SPI_TCR_REG(p), SPI_CTAR_REG( p, CTAR_REG_USED ), SPI_SR_REG(p), SPI_RSER_REG(p),SPI_PUSHR_REG(p));
}
OSStatus spi_init( spi_driver_t* spi_driver, SPI_MemMapPtr spi_peripheral, uint32_t baud_rate_bps, uint8_t chip_select, bool polarity, bool phase, bool use_dma )
{
uint8_t br = get_baud_rate_scaler_register_value( baud_rate_bps );
spi_driver->spi_peripheral = spi_peripheral;
spi_driver->baud_rate_bps = baud_rate_bps;
spi_driver->chip_select = chip_select;
spi_driver->polarity = polarity;
spi_driver->phase = phase;
spi_driver->use_dma = use_dma;
/* Enable SPI peripheral clock */
set_spi_peripheral_clock( spi_peripheral, true );
/* Enable SPI peripheral and clean up (stop) any previous transfer
* MDIS = 0 to enable
* HALT = 1 to stop transfer
* MSTR = 1 for master mode
* DCONF = 0 for SPI
* PCSIS[x] = 1 for CS active low
*/
SPI_MCR_REG( spi_peripheral ) &= ~(uint32_t) ( SPI_MCR_MDIS_MASK | SPI_MCR_DCONF(0) );
SPI_MCR_REG( spi_peripheral ) |= (uint32_t) ( (0x1<<24)|SPI_MCR_HALT_MASK | SPI_MCR_MSTR_MASK | SPI_MCR_PCSIS( 1 << chip_select ) );
/* Select Clock and Transfer Attributes Register (CTAR). Always use CTAR0 */
SPI_PUSHR_REG( spi_peripheral ) &= ~(uint32_t) SPI_PUSHR_CTAS(CTAR_REG_USED);
/* Reset Clock and Transfer Attributes (CTAR) register */
SPI_CTAR_REG( spi_peripheral, CTAR_REG_USED ) = 0;
/* Set SPI configuration
* FMSZ = 7. Set frame size to 8-bit. frame size = FMSZ + 1
* CPOL = phase
* CPHA = polarity
* DBR = 00
* PBR = 2
* BR = calculate based on baud_rate_Mbps
* PCSSCK = 0
* PASC = 0
* PDT = 0
* CSSCK = BR - 1
* ASC = BR - 1
* DT = 0
*/
SPI_CTAR_REG( spi_peripheral, CTAR_REG_USED ) |= (uint32_t) ( SPI_CTAR_CPOL_MASK & (uint32_t)( polarity << SPI_CTAR_CPOL_SHIFT ) ) |
(uint32_t) ( SPI_CTAR_CPHA_MASK & (uint32_t)( phase << SPI_CTAR_CPHA_SHIFT ) ) |
(uint32_t) ( SPI_CTAR_FMSZ( 8 - 1 ) ) |
(uint32_t) ( SPI_CTAR_DBR_MASK & ( DOUBLE_BAUD_RATE << SPI_CTAR_DBR_SHIFT ) ) |
(uint32_t) ( SPI_CTAR_PBR( CTAR_PBR ) ) |
(uint32_t) ( SPI_CTAR_BR( br ) ) |
(uint32_t) ( SPI_CTAR_CSSCK( br - 1 ) ) |
(uint32_t) ( SPI_CTAR_ASC( br - 1 ) );
clear_spi_fifos( spi_peripheral );
/* Enable the start transfer bit */
SPI_MCR_REG( spi_peripheral ) &= ~(uint32_t) ( SPI_MCR_HALT_MASK );
if(use_dma)
{
SPI_RSER_REG( spi_peripheral ) |= (0x3<<24)|(0x3<<16);
DMA_init();
}
spi_status_print(spi_peripheral);
return kNoErr;
}
/*************************************************************************
* 野火嵌入式开发工作室
*
* 函数名称：spi_irq_DIS
* 功能说明：开串口接收中断
* 参数说明：UARTn 模块号（UART0~UART5）
* 函数返回：无
* 修改时间：2012-1-20
* 备 注：
*************************************************************************/
void spi_irq_DIS(SPIn spin)
{
SPI_RSER_REG(SPIN[spin]) &=~SPI_RSER_RFDF_RE_MASK; //关闭SPI接收中断
disable_irq(spin+26); //开接收引脚的IRQ中断
}
/*************************************************************************
* 野火嵌入式开发工作室
*
* 函数名称：spi_irq_EN
* 功能说明：开SPI中断
* 参数说明：SPIn 模块号（SPI0~SPI2）
* 函数返回：无
* 修改时间：2012-1-20
* 备 注：
*************************************************************************/
void spi_irq_EN(SPIn spin)
{
SPI_RSER_REG(SPIN[spin]) |=SPI_RSER_RFDF_RE_MASK; //开启SPI接收中断
enable_irq(spin+26); //开接收引脚的IRQ中断
}
/**
* @brief 关SPI接收中断
*
* @param spino SPI通道号
*/
void spi_disable_rcv_int(uint8_t spino)
{
SPI_MemMapPtr base_addr = spi_get_base_address(spino);
BCLR(SPI_RSER_RFDF_RE_SHIFT, SPI_RSER_REG(base_addr));/* 关闭SPI接收中断 */
exc_disable(spino + INT_SPI0); /* 开接收引脚的IRQ中断 */
}
/*
*******************************************************************************
* void SpiDisableRxInterrupt( SPI_MemMapPtr base )
*******************************************************************************
* Input : base : Pointer to SPI0/ SPI1 /SPI2 Register Base
* Output : void
* Description : Disable The SPI module RX interrupt
*******************************************************************************
*/
void SpiDisableRxInterrupt( SPI_MemMapPtr base )
{
SPI_RSER_REG(base) &= (~SPI_RSER_RFDF_RE_MASK);
}//End of SpiEnableRxInterrupt
/*
*******************************************************************************
* void SpiEnableRxInterrupt( SPI_MemMapPtr base )
*******************************************************************************
* Input : base : Pointer to SPI0/ SPI1 /SPI2 Register Base
* Output : void
* Description : Enable The SPI module RX interrupt
*******************************************************************************
*/
void SpiEnableRxInterrupt( SPI_MemMapPtr base )
{
SPI_RSER_REG(base) |= SPI_RSER_RFDF_RE_MASK;
}//End of SpiEnableRxInterrupt
