// Write short register
void zigbee_short_write(uint8 adr, uint8 dat)
{
adr = (adr << 1) | 1; // Setup address for write
SPI_WriteTxData(adr); // Send SPI address
SPI_WriteTxData(dat); // Send SPI data
while( !(SPI_ReadTxStatus() & 0x01)); // while not: SPI-done, wait
}
// Read short register
uint8 zigbee_short_read(uint8 adr)
{
adr = adr << 1; // Setup address for read
SPI_WriteTxData(adr); // Send SPI address
SPI_WriteTxData(0x00); // Send dummy byte for read
while( !(SPI_ReadTxStatus() & 0x01)); // while not: SPI-done, wait
return SPI_ReadRxData(); // Read SPI data
}
void NRF_WriteSingleRegister(uint8_t reg, uint8_t data){
SPI_ClearRxBuffer();
Control_Write(0);
SPI_WriteTxData(NRF_W_REGISTER | reg);
SPI_WriteTxData(data);
while(!(SPI_ReadTxStatus() & SPI_STS_SPI_IDLE));
Control_Write(1);
return;
}
void NRF_ReuseTxPayload(void){
SPI_ClearRxBuffer();
Control_Write(0);
SPI_WriteTxData(NRF_REUSE_TX_PL);
while(!(SPI_ReadTxStatus() & SPI_STS_SPI_IDLE));
Control_Write(1);
return;
}
/**
* @brief Vaciamos el TX FIFO.
*/
void NRF_FlushTx(void){
SPI_ClearRxBuffer();
Control_Write(0);
SPI_WriteTxData(NRF_FLUSH_TX);
while(!(SPI_ReadTxStatus() & SPI_STS_SPI_IDLE));
Control_Write(1);
return;
}
/**
* @brief Funcion para obtener el registro STATUS.
* @return Valor del registro STATUS.
*/
uint8_t NRF_GetStatus(void){
SPI_ClearRxBuffer();
Control_Write(0);
SPI_WriteByte(NRF_NOP);
while(!(SPI_ReadTxStatus() & SPI_STS_SPI_IDLE));
Control_Write(1);
return (uint8_t)SPI_ReadRxData();
}
// Write long register
void zigbee_long_write(uint16 adr, uint8 dat)
{
uint8 adrMSB, adrLSB;
adr = (adr << 5) | (1 << 15) | (1 << 4); // Setup address for write
adrMSB = adr >> 8; // Setup address MSB
adrLSB = adr; // Setup address LSB
SPI_WriteTxData(adrMSB); // Send SPI address MSB
SPI_WriteTxData(adrLSB); // Send SPI address LSB
SPI_WriteTxData(dat); // Send SPI data
while( !(SPI_ReadTxStatus() & 0x01)); // while not: SPI-done, wait
}
void NRF_ReadSingleRegister(uint8_t reg, uint8_t* data){
SPI_ClearRxBuffer();
Control_Write(0);
SPI_WriteTxData(NRF_R_REGISTER | reg);
SPI_WriteTxData(NRF_NOP);
while(!(SPI_ReadTxStatus() & SPI_STS_SPI_IDLE));
Control_Write(1);
(void)SPI_ReadRxData(); /* Dummy read, this is the STATUS Register */
*data = SPI_ReadRxData();
return;
}
// Read long register
uint8 zigbee_long_read(uint16 adr)
{
uint8 adrMSB, adrLSB;
adr = (adr << 5) | (1 << 15); // Setup address for read
adrMSB = adr >> 8; // Setup address MSB
adrLSB = adr; // Setup address LSB
SPI_WriteTxData(adrMSB); // Send SPI address MSB
SPI_WriteTxData(adrLSB); // Send SPI address LSB
SPI_WriteTxData(0x00); // Send dummy byte for read
while( !(SPI_ReadTxStatus() & 0x01)); // while not: SPI-done, wait
return SPI_ReadRxData(); // Read SPI data
}
void NRF_WriteMultipleRegister(uint8_t reg, uint8_t* bufIn, uint8_t bufSize){
uint8_t i = 0;
SPI_ClearRxBuffer();
Control_Write(0);
SPI_WriteTxData(NRF_W_REGISTER | reg);
for(; i < bufSize; i++){
SPI_WriteTxData(bufIn[i]);
}
while(!(SPI_ReadTxStatus() & SPI_STS_SPI_IDLE));
Control_Write(1);
return;
}
void NRF_RxWritePayload(uint8_t pipe, uint8_t* data, uint8_t payloadSize){
uint8_t i = 0;
SPI_ClearRxBuffer();
Control_Write(0);
SPI_WriteTxData(NRF_W_ACK_PAYLOAD | (pipe & 0x7));
for(; i < payloadSize; i++){
SPI_WriteTxData(data[i]);
}
while(!(SPI_ReadTxStatus() & SPI_STS_SPI_IDLE));
Control_Write(1);
return;
}
void NRF_FillTxFIFO(uint8_t* data, uint8_t payloadSize){
uint8_t i = 0;
SPI_ClearRxBuffer();
Control_Write(0);
SPI_WriteTxData(NRF_W_TX_PAYLOAD);
for(; i < payloadSize; i++){
SPI_WriteTxData(data[i]);
}
while(!(SPI_ReadTxStatus() & SPI_STS_SPI_IDLE));
Control_Write(1);
return;
}
void NRF_TxTransmitWaitNoACK(uint8_t* data, uint8_t payloadSize){
uint8_t i = 0;
SPI_ClearRxBuffer();
Control_Write(0);
SPI_WriteTxData(NRF_W_TX_PAYLOAD_NOACK);
for(; i < payloadSize; i++){
SPI_WriteTxData(data[i]);
}
while(!(SPI_ReadTxStatus() & SPI_STS_SPI_IDLE));
Control_Write(1);
NRF_TransmitPulse();
return;
}
void writeBufferTest(uint8_t reg, uint8_t* bufIn, uint8_t bufSize){
SPI_ClearRxBuffer();
uint8_t auxBuffer[(bufSize + 1)], i = bufSize, h = bufSize;
for(; i > 0; i--){
h--;
auxBuffer[i] = bufIn[h];
}
auxBuffer[0] = (uint8_t)(NRF_W_REGISTER | reg);
Control_Write(0);
SPI_PutArray(auxBuffer, (bufSize + 1));
while(!(SPI_ReadTxStatus() & SPI_STS_SPI_IDLE));
Control_Write(1);
return;
}
void NRF_ReadMultipleRegister(uint8_t reg, uint8_t* bufIn , uint8_t bufSize){
uint8_t i = 0, j = 0;
SPI_ClearRxBuffer();
Control_Write(0);
SPI_WriteTxData(NRF_R_REGISTER | reg);
for(; i < bufSize; i++){
SPI_WriteTxData(NRF_NOP);
}
(void)SPI_ReadRxData(); /* Dummy read, this is the STATUS Register */
for(; j < bufSize; j++){
*(bufIn + j) = SPI_ReadRxData();
}
while(!(SPI_ReadTxStatus() & SPI_STS_SPI_IDLE));
Control_Write(1);
return;
}
/*******************************************************************************
* Function Name: SPI_Init
********************************************************************************
*
* Summary:
* Inits/Restores default SPIM configuration provided with customizer.
*
* Parameters:
* None.
*
* Return:
* None.
*
* Side Effects:
* When this function is called it initializes all of the necessary parameters
* for execution. i.e. setting the initial interrupt mask, configuring the
* interrupt service routine, configuring the bit-counter parameters and
* clearing the FIFO and Status Register.
*
* Reentrant:
* No.
*
*******************************************************************************/
void SPI_Init(void)
{
/* Initialize the Bit counter */
SPI_COUNTER_PERIOD_REG = SPI_BITCTR_INIT;
/* Init TX ISR */
#if(0u != SPI_INTERNAL_TX_INT_ENABLED)
CyIntDisable (SPI_TX_ISR_NUMBER);
CyIntSetPriority (SPI_TX_ISR_NUMBER, SPI_TX_ISR_PRIORITY);
(void) CyIntSetVector(SPI_TX_ISR_NUMBER, &SPI_TX_ISR);
#endif /* (0u != SPI_INTERNAL_TX_INT_ENABLED) */
/* Init RX ISR */
#if(0u != SPI_INTERNAL_RX_INT_ENABLED)
CyIntDisable (SPI_RX_ISR_NUMBER);
CyIntSetPriority (SPI_RX_ISR_NUMBER, SPI_RX_ISR_PRIORITY);
(void) CyIntSetVector(SPI_RX_ISR_NUMBER, &SPI_RX_ISR);
#endif /* (0u != SPI_INTERNAL_RX_INT_ENABLED) */
/* Clear any stray data from the RX and TX FIFO */
SPI_ClearFIFO();
#if(SPI_RX_SOFTWARE_BUF_ENABLED)
SPI_rxBufferFull = 0u;
SPI_rxBufferRead = 0u;
SPI_rxBufferWrite = 0u;
#endif /* (SPI_RX_SOFTWARE_BUF_ENABLED) */
#if(SPI_TX_SOFTWARE_BUF_ENABLED)
SPI_txBufferFull = 0u;
SPI_txBufferRead = 0u;
SPI_txBufferWrite = 0u;
#endif /* (SPI_TX_SOFTWARE_BUF_ENABLED) */
(void) SPI_ReadTxStatus(); /* Clear Tx status and swStatusTx */
(void) SPI_ReadRxStatus(); /* Clear Rx status and swStatusRx */
/* Configure TX and RX interrupt mask */
SPI_TX_STATUS_MASK_REG = SPI_TX_INIT_INTERRUPTS_MASK;
SPI_RX_STATUS_MASK_REG = SPI_RX_INIT_INTERRUPTS_MASK;
}
