static void i2c_init(void) { const struct i2c_port_t *p = i2c_ports; int i; for (i = 0; i < i2c_ports_used; i++, p++) i2c_init_port(p); #ifdef CONFIG_HOSTCMD_I2C_SLAVE_ADDR STM32_I2C_CR1(I2C_PORT_EC) |= STM32_I2C_CR1_RXIE | STM32_I2C_CR1_ERRIE | STM32_I2C_CR1_ADDRIE | STM32_I2C_CR1_STOPIE | STM32_I2C_CR1_NACKIE; #if defined(CONFIG_LOW_POWER_IDLE) && (I2C_PORT_EC == STM32_I2C1_PORT) /* * If using low power idle and EC port is I2C1, then set I2C1 to wake * from STOP mode on address match. Note, this only works on I2C1 and * only if the clock to I2C1 is HSI 8MHz. */ STM32_I2C_CR1(I2C_PORT_EC) |= STM32_I2C_CR1_WUPEN; #endif STM32_I2C_OAR1(I2C_PORT_EC) = 0x8000 | CONFIG_HOSTCMD_I2C_SLAVE_ADDR; #ifdef TCPCI_I2C_SLAVE /* * Configure TCPC address with OA2[1] masked so that we respond * to CONFIG_TCPC_I2C_BASE_ADDR and CONFIG_TCPC_I2C_BASE_ADDR + 2. */ STM32_I2C_OAR2(I2C_PORT_EC) = 0x8100 | CONFIG_TCPC_I2C_BASE_ADDR; #endif task_enable_irq(IRQ_SLAVE); #endif }
static inline void dump_i2c_reg(int port) { #ifdef CONFIG_I2C_DEBUG CPRINTF("CR1 : %016b\n", STM32_I2C_CR1(port)); CPRINTF("CR2 : %016b\n", STM32_I2C_CR2(port)); CPRINTF("SR2 : %016b\n", STM32_I2C_SR2(port)); CPRINTF("SR1 : %016b\n", STM32_I2C_SR1(port)); CPRINTF("OAR1 : %016b\n", STM32_I2C_OAR1(port)); CPRINTF("OAR2 : %016b\n", STM32_I2C_OAR2(port)); CPRINTF("DR : %016b\n", STM32_I2C_DR(port)); CPRINTF("CCR : %016b\n", STM32_I2C_CCR(port)); CPRINTF("TRISE: %016b\n", STM32_I2C_TRISE(port)); #endif /* CONFIG_I2C_DEBUG */ }