static void adc_interval_read(int ain_id, int interval_ms)
{
adc_configure(ain_id);
/* EXTEN=01 -> hardware trigger detection on rising edge */
STM32_ADC_CFGR1 = (STM32_ADC_CFGR1 & ~0xc00) | (1 << 10);
/* EXTSEL=TRG3 -> Trigger on TIM3_TRGO */
STM32_ADC_CFGR1 = (STM32_ADC_CFGR1 & ~0x1c0) | (3 << 6);
__hw_timer_enable_clock(TIM_ADC, 1);
/* Upcounter, counter disabled, update event only on underflow */
STM32_TIM_CR1(TIM_ADC) = 0x0004;
/* TRGO on update event */
STM32_TIM_CR2(TIM_ADC) = 0x0020;
STM32_TIM_SMCR(TIM_ADC) = 0x0000;
/* Auto-reload value */
STM32_TIM_ARR(TIM_ADC) = interval_ms & 0xffff;
/* Set prescaler to tick per millisecond */
STM32_TIM_PSC(TIM_ADC) = (clock_get_freq() / MSEC) - 1;
/* Start counting */
STM32_TIM_CR1(TIM_ADC) |= 1;
/* Start ADC conversion */
STM32_ADC_CR |= 1 << 2; /* ADSTART */
}
static void timers_init(void)
{
/* TIM2 is a 32-bit free running counter with 1Mhz frequency */
STM32_TIM_CR2(2) = 0x0000;
STM32_TIM32_ARR(2) = 0xFFFFFFFF;
STM32_TIM32_CNT(2) = 0;
STM32_TIM_PSC(2) = CPU_CLOCK / 1000000 - 1;
STM32_TIM_EGR(2) = 0x0001; /* Reload the pre-scaler */
STM32_TIM_CR1(2) = 1;
STM32_TIM_DIER(2) = 0;
task_enable_irq(STM32_IRQ_TIM2);
}
static void adc_interval_stop(void)
{
/* EXTEN=00 -> hardware trigger detection disabled */
STM32_ADC_CFGR1 &= ~0xc00;
/* Set ADSTP to clear ADSTART */
STM32_ADC_CR |= 1 << 4; /* ADSTP */
/* Wait for conversion to stop */
while (STM32_ADC_CR & (1 << 4))
;
/* Stop the timer */
STM32_TIM_CR1(TIM_ADC) &= ~0x1;
}