void clock_wait_bus_cycles(enum bus_type bus, uint32_t cycles) { volatile uint32_t dummy __attribute__((unused)); if (bus == BUS_AHB) { while (cycles--) dummy = STM32_DMA1_REGS->isr; } else { /* APB */ while (cycles--) dummy = STM32_USART_BRR(STM32_USART1_BASE); } }
static void uart_init(void) { /* set baudrate */ STM32_USART_BRR(UARTN) = DIV_ROUND_NEAREST(CPU_CLOCK, CONFIG_UART_BAUD_RATE); /* UART enabled, 8 Data bits, oversampling x16, no parity */ STM32_USART_CR1(UARTN) = STM32_USART_CR1_UE | STM32_USART_CR1_TE | STM32_USART_CR1_RE; /* 1 stop bit, no fancy stuff */ STM32_USART_CR2(UARTN) = 0x0000; /* DMA disabled, special modes disabled, error interrupt disabled */ STM32_USART_CR3(UARTN) = 0x0000; }