static __inline void
a10_intr_eoi(struct a10_aintc_softc *sc, u_int irq)
{
if (irq != SW_INT_IRQNO_ENMI)
return;
mtx_lock_spin(&sc->mtx);
aintc_write_4(sc, SW_INT_IRQ_PENDING_REG(0),
(1 << SW_INT_IRQNO_ENMI));
mtx_unlock_spin(&sc->mtx);
}
int
arm_get_next_irq(int last_irq)
{
uint32_t value;
int i, b;
for (i = 0; i < 3; i++) {
value = aintc_read_4(SW_INT_IRQ_PENDING_REG(i));
for (b = 0; b < 32; b++)
if (value & (1 << b)) {
return (i * 32 + b);
}
}
return (-1);
}
static int
a10_pending_irq(struct a10_aintc_softc *sc)
{
uint32_t value;
int i, b;
for (i = 0; i < 3; i++) {
value = aintc_read_4(sc, SW_INT_IRQ_PENDING_REG(i));
if (value == 0)
continue;
for (b = 0; b < 32; b++)
if (value & (1 << b)) {
return (i * 32 + b);
}
}
return (-1);
}
void
arm_unmask_irq(uintptr_t nb)
{
uint32_t bit, block, value;
bit = (nb % 32);
block = (nb / 32);
value = aintc_read_4(SW_INT_ENABLE_REG(block));
value |= (1 << bit);
aintc_write_4(SW_INT_ENABLE_REG(block), value);
value = aintc_read_4(SW_INT_MASK_REG(block));
value &= ~(1 << bit);
aintc_write_4(SW_INT_MASK_REG(block), value);
if(nb == SW_INT_IRQNO_ENMI) /* must clear pending bit when enabled */
aintc_write_4(SW_INT_IRQ_PENDING_REG(0), (1 << SW_INT_IRQNO_ENMI));
}
