/**
* Initialize the SPI port to work as an SPI channel
*/
void SPISlaveInit(){
//println_I("\t\tStarting the SPI slave mode");
DDRBbits._P4=INPUT;//Set the SS to an input
SPIDDRbits._MOSI=INPUT;// Master out
SPIDDRbits._SCK=INPUT; // Clock
SPIDDRbits._MISO=OUTPUT; // Master in
PRRbits._PRSPI=0; //Disable powersave features.
SPCRbits._SPIE=1; //Enable Interupt
SPCRbits._SPE=1; //Enable SPI
SPCRbits._DORD=0; //Most signifigant bit first
SPCRbits._MSTR=0; //Set as slave
SPCRbits._CPOL=0; //Idle clock at 0, rising edge on leading edge
SPCRbits._CPHA=0; //Clock phase leading edge sample
SPDR=0xff;
InitByteFifo(&storeTX,privateTX,sizeof(privateTX));
InitByteFifo(&storeRX,privateRX,sizeof(privateRX));
SetPowerState(TRUE,FALSE,false) ;
uint8_t i;
for(i=8;i<16;i++){
if(GetChannelMode(i)==IS_DI||GetChannelMode(i)==IS_DO)
setMode(i,IS_SERVO);
}
//setMode(8,IS_DO);
}
int main() {
printf("[LPMTd] :: Linux Power Management Tool v1.0\n");
signal(SIGTERM, signal_term);
if(LoadConfig(CONFIG_FILE_PATH) || UPowerConnect()
|| FetchBacklightInfo() || FetchCpuInfo() || UpdatePowerState()
|| SetBacklight() || SetHDD_APM() || SetCpuFreq()) {
printf("[LPMTd] :: Exit status (-1)\n");
return -1;
}
int new_pstate = WaitUPowerStateChange();
while(new_pstate >= 0) {
if(new_pstate != GetPowerState()) {
SetPowerState(new_pstate);
if(SetBacklight() || SetHDD_APM() || SetCpuFreq()) {
printf("[LPMTd] :: Exit status (-1)\n");
return -1;
}
}
new_pstate = WaitUPowerStateChange();
}
UPowerDisconnect();
ClearConfig();
printf("[LPMTd] :: Exit status (0)\n");
return 0;
}
void SetPowerState0(boolean railOk,boolean regulated){
SetPowerState(0,railOk,regulated);
}
void SetPowerState1(boolean railOk,boolean regulated){
SetPowerState(1,railOk,regulated);
}
