static void StartAudioI2S0AWBHardware(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
uint32 Audio_I2S_Dac = 0;
uint32 MclkDiv0 = 0;
const bool bEnablePhaseShiftFix = true;
printk("StartAudioI2S0AWBHardware \n");
MclkDiv0 = SetCLkMclk(Soc_Aud_I2S0, runtime->rate); //select I2S
SetCLkBclk(MclkDiv0, runtime->rate, runtime->channels, Soc_Aud_I2S_WLEN_WLEN_32BITS);
// 2nd I2S In
SetSampleRate(Soc_Aud_Digital_Block_MEM_I2S, runtime->rate);
Audio_I2S_Dac |= (bEnablePhaseShiftFix << 31);
Audio_I2S_Dac |= (Soc_Aud_I2S_IN_PAD_SEL_I2S_IN_FROM_IO_MUX << 28);//I2S in from io_mux
Audio_I2S_Dac |= Soc_Aud_LOW_JITTER_CLOCK << 12 ; //Low jitter mode
Audio_I2S_Dac |= (Soc_Aud_INV_LRCK_NO_INVERSE << 5);
Audio_I2S_Dac |= (Soc_Aud_I2S_FORMAT_I2S << 3);
Audio_I2S_Dac |= (Soc_Aud_I2S_WLEN_WLEN_32BITS << 1);
Afe_Set_Reg(AFE_I2S_CON, Audio_I2S_Dac | 0x1, MASK_ALL);
// here to set interrupt
SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->period_size >> 1);
SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->rate);
SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, true);
SetSampleRate(Soc_Aud_Digital_Block_MEM_AWB, substream->runtime->rate);
SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_AWB, true);
SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_2, true);
// here to turn off digital part
#ifdef DUMP_HWGAIN1_AWB
uint32 REG420 = 0;
SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I00, Soc_Aud_InterConnectionOutput_O05);
SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I01, Soc_Aud_InterConnectionOutput_O06);
printk("%s() Soc_Aud_InterCon_Connection I10 O5\n", __func__);
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I10, Soc_Aud_InterConnectionOutput_O05);
printk("%s() Soc_Aud_InterCon_Connection I11 O6\n", __func__);
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I11, Soc_Aud_InterConnectionOutput_O06);
REG420 = Afe_Get_Reg(AFE_GAIN1_CONN);
printk("%s() AFE_GAIN1_CONN (0X420) =0x%x\n", __func__, REG420);
#else
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I00, Soc_Aud_InterConnectionOutput_O05);
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I01, Soc_Aud_InterConnectionOutput_O06);
#endif
EnableAfe(true);
}
static void StartAudioCaptureHardware(struct snd_pcm_substream *substream)
{
printk("StartAudioCaptureHardware \n");
//ConfigAdcI2S(substream);
//Set2ndI2SAdcIn(mAudioDigitalI2S);//To do, JY
SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_MOD_DAI, AFE_WLEN_16_BIT);
SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O12);
/* To Do, JY, MOD_DAI?
if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_ADC_2) == false)
{
SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_ADC_2, true);
Set2ndI2SAdcEnable(true);
}
else
{
SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_ADC_2, true);
}
*/
// here to set interrupt
SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->period_size);
SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->rate);
SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, true);
SetSampleRate(Soc_Aud_Digital_Block_MEM_MOD_DAI, substream->runtime->rate);
SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_MOD_DAI, true);
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O12);
EnableAfe(true);
}
CSynthesizer::CSynthesizer()
{
int i;
revrbON = INACTIVE;
delayON = INACTIVE;
activeNotesCount = 0;
for (i=0; i<POLIPHONY; i++)
{
state[i] = INACTIVE;
channels[i] = 0;
key[i] = 0;
veloc[i] = 0;
heldkeys[i] = 0;
}
for (i=0; i<MIDICHANNELS; i++)
{
lkp[i] = 255;
rev[i] = 0.0f;
dly[i] = 0.0f;
mod[i] = 0.0f;
vol[i] = 0.25f;
pan[i] = 0.0f;
aft[i] = 0.0f;
ptc[i] = 1.0f;
hld[i] = 0;
}
programs.Init();
reverb.Init();
delay.Init(buffers.bWaves[0]);
SetSampleRate(44100.f);
}
/**
* Create a new instance of an analog module.
*
* Create an instance of the analog module object. Initialize all the parameters
* to reasonable values on start.
* Setting a global value on an analog module can be done only once unless subsequent
* values are set the previously set value.
* Analog modules are a singleton, so the constructor is never called outside of this class.
*
* @param slot The slot in the chassis that the module is plugged into.
*/
AnalogModule::AnalogModule(UINT32 slot)
: Module(slot)
, m_module (NULL)
, m_sampleRateSet (false)
, m_numChannelsToActivate (0)
{
status = 0;
AddToSingletonList();
m_module = new tAI(SlotToIndex(slot), &status);
SetNumChannelsToActivate(kAnalogChannels);
SetSampleRate(kDefaultSampleRate);
for (UINT32 i = 0; i < kAnalogChannels; i++)
{
m_module->writeScanList(i, i, &status);
SetAverageBits(i + 1, kDefaultAverageBits);
SetOversampleBits(i + 1, kDefaultOversampleBits);
}
if (m_registerWindowSemaphore == NULL)
{
// Needs to be global since the protected resource spans both module singletons.
m_registerWindowSemaphore = semMCreate(SEM_Q_PRIORITY | SEM_DELETE_SAFE | SEM_INVERSION_SAFE);
}
wpi_assertCleanStatus(status);
}
/**
* Create a new instance of an analog module.
*
* Create an instance of the analog module object. Initialize all the parameters
* to reasonable values on start.
* Setting a global value on an analog module can be done only once unless subsequent
* values are set the previously set value.
* Analog modules are a singleton, so the constructor is never called outside of this class.
*
* @param moduleNumber The analog module to create (1 or 2).
*/
AnalogModule::AnalogModule(UINT8 moduleNumber)
: Module(nLoadOut::kModuleType_Analog, moduleNumber)
, m_module (NULL)
, m_sampleRateSet (false)
, m_numChannelsToActivate (0)
{
AddToSingletonList();
tRioStatusCode localStatus = NiFpga_Status_Success;
m_module = tAI::create(m_moduleNumber - 1, &localStatus);
wpi_setError(localStatus);
SetNumChannelsToActivate(kAnalogChannels);
SetSampleRate(kDefaultSampleRate);
for (UINT32 i = 0; i < kAnalogChannels; i++)
{
m_module->writeScanList(i, i, &localStatus);
wpi_setError(localStatus);
SetAverageBits(i + 1, kDefaultAverageBits);
SetOversampleBits(i + 1, kDefaultOversampleBits);
}
if (m_registerWindowSemaphore == NULL)
{
// Needs to be global since the protected resource spans both module singletons.
m_registerWindowSemaphore = semMCreate(SEM_Q_PRIORITY | SEM_DELETE_SAFE | SEM_INVERSION_SAFE);
}
}
static int mtk_pcm_I2S0dl1_start(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
printk("%s\n", __func__);
// here start digital part
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I05, Soc_Aud_InterConnectionOutput_O00);
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I06, Soc_Aud_InterConnectionOutput_O01);
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I05, Soc_Aud_InterConnectionOutput_O03);
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I06, Soc_Aud_InterConnectionOutput_O04);
SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, true);
SetSampleRate(Soc_Aud_Digital_Block_MEM_DL1, runtime->rate);
SetChannels(Soc_Aud_Digital_Block_MEM_DL1, runtime->channels);
SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_DL1, true);
EnableAfe(true);
#ifdef _DEBUG_6328_CLK
//Debug 6328 Digital to Analog path clock and data work or not. and read TEST_OUT(0x206)
// Ana_Set_Reg(AFE_MON_DEBUG0, 0x4600 , 0xcf00); // monitor 6328 digitala data sent to analog or not
Ana_Set_Reg(AFE_MON_DEBUG0, 0x4200 , 0xcf00); // monitor 6328 digitala data sent to analog or not
Ana_Set_Reg(TEST_CON0, 0x0e00 , 0xffff);
#endif
#if 0 // test 6328 sgen
Ana_Set_Reg(AFE_SGEN_CFG0 , 0x0080 , 0xffff);
Ana_Set_Reg(AFE_SGEN_CFG1 , 0x0101 , 0xffff);
Ana_Set_Reg(AFE_AUDIO_TOP_CON0, 0x0000, 0xffff); //power on clock
// Ana_Set_Reg(PMIC_AFE_TOP_CON0, 0x0002, 0x0002); //UL from sinetable
Ana_Set_Reg(PMIC_AFE_TOP_CON0, 0x0001, 0x0001); //DL from sinetable
#endif
return 0;
}
static int mtk_pcm_dl2_start(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
pr_warn("%s\n", __func__);
/* here start digital part */
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I07,
Soc_Aud_InterConnectionOutput_O03);
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I08,
Soc_Aud_InterConnectionOutput_O04);
#ifdef CONFIG_MTK_FPGA
/* set loopback test interconnection */
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I07,
Soc_Aud_InterConnectionOutput_O09);
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I08,
Soc_Aud_InterConnectionOutput_O10);
#endif
SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, true);
SetSampleRate(Soc_Aud_Digital_Block_MEM_DL2, runtime->rate);
SetChannels(Soc_Aud_Digital_Block_MEM_DL2, runtime->channels);
SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_DL2, true);
SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, runtime->period_size);
SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, runtime->rate);
EnableAfe(true);
return 0;
}
static void StartAudioI2S0AWBHardware(struct snd_pcm_substream *substream)
{
pr_debug("StartAudioI2S0AWBHardware \n");
// here to set interrupt
SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->period_size);
SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->rate);
SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, true);
SetSampleRate(Soc_Aud_Digital_Block_MEM_AWB, substream->runtime->rate);
SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_AWB, true);
// here to turn off digital part
#ifdef DUMP_HWGAIN1_AWB
uint32 REG420 = 0;
SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I00, Soc_Aud_InterConnectionOutput_O05);
SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I01, Soc_Aud_InterConnectionOutput_O06);
pr_debug("%s() Soc_Aud_InterCon_Connection I10 O5\n", __func__);
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I10, Soc_Aud_InterConnectionOutput_O05);
pr_debug("%s() Soc_Aud_InterCon_Connection I11 O6\n", __func__);
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I11, Soc_Aud_InterConnectionOutput_O06);
REG420 = Afe_Get_Reg(AFE_GAIN1_CONN);
pr_debug("%s() AFE_GAIN1_CONN (0X420) =0x%x\n", __func__, REG420);
#else
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I00, Soc_Aud_InterConnectionOutput_O05);
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I01, Soc_Aud_InterConnectionOutput_O06);
#endif
EnableAfe(true);
}
static void StartAudioMrgrxAWBHardware(struct snd_pcm_substream *substream)
{
printk("StartAudioMrgrxAWBHardware \n");
// here to set interrupt
SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->period_size>>1);
SetIrqMcuSampleRate( Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->rate);
SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, true);
SetSampleRate(Soc_Aud_Digital_Block_MEM_AWB, substream->runtime->rate);
SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_AWB,true);
// here to turn off digital part
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I15, Soc_Aud_InterConnectionOutput_O05);
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I16, Soc_Aud_InterConnectionOutput_O06);
if(GetMemoryPathEnable(Soc_Aud_Digital_Block_MRG_I2S_OUT )== false)
{
//set merge interface
SetMemoryPathEnable(Soc_Aud_Digital_Block_MRG_I2S_OUT, true);
SetMrgI2SEnable(true, substream->runtime->rate);
}
else
{
SetMemoryPathEnable(Soc_Aud_Digital_Block_MRG_I2S_OUT, true);
}
EnableAfe(true);
}
bool DspOscillator::ParameterUpdating_(int index, DspParameter const& param)
{
if (index == pBufferSize)
{
SetBufferSize(*param.GetInt());
return true;
}
else if (index == pSampleRate)
{
SetSampleRate(*param.GetInt());
return true;
}
else if (index == pAmplitude)
{
SetAmpl(*param.GetFloat());
return true;
}
else if (index == pFrequency)
{
SetFreq(*param.GetFloat());
return true;
}
return false;
}
static void StartAudioBtDaiHardware(struct snd_pcm_substream *substream)
{
printk("StartAudioBtDaiHardware period_size = %d\n",(unsigned int)(substream->runtime->period_size));
// here to set interrupt
SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->period_size>>1);
SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->rate);
SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, true);
SetSampleRate(Soc_Aud_Digital_Block_MEM_DAI, substream->runtime->rate);
SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_DAI, true);
// here to turn off digital part
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I02, Soc_Aud_InterConnectionOutput_O11);
if (GetMemoryPathEnable(Soc_Aud_Digital_Block_DAI_BT) == false)
{
SetMemoryPathEnable(Soc_Aud_Digital_Block_DAI_BT, true);
SetVoipDAIBTAttribute(substream->runtime->rate);
SetDaiBtEnable(true);
}
else
{
SetMemoryPathEnable(Soc_Aud_Digital_Block_DAI_BT, true);
}
EnableAfe(true);
}
static void StartAudioCaptureHardware(struct snd_pcm_substream *substream)
{
printk("StartAudioCaptureHardware \n");
ConfigAdcI2S(substream);
SetI2SAdcIn(mAudioDigitalI2S);
//EnableSideGenHw(Soc_Aud_InterConnectionOutput_O09,Soc_Aud_MemIF_Direction_DIRECTION_OUTPUT,true);
SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_VUL, AFE_WLEN_16_BIT);
SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_VUL, AFE_WLEN_16_BIT);
SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O09);
SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O10);
SetI2SAdcEnable(true);
// here to set interrupt
SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->period_size);
SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->rate);
SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, true);
SetSampleRate(Soc_Aud_Digital_Block_MEM_VUL, substream->runtime->rate);
SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_VUL, true);
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I03, Soc_Aud_InterConnectionOutput_O09);
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I04, Soc_Aud_InterConnectionOutput_O10);
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I05, Soc_Aud_InterConnectionOutput_O09);
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I06, Soc_Aud_InterConnectionOutput_O10);
EnableAfe(true);
}
/*****************************************************************************
* CSynth::Activate()
*****************************************************************************
* Make the synth active.
*/
HRESULT CSynth::Activate(DWORD dwSampleRate, DWORD dwChannels )
{
m_stLastTime = 0;
SetSampleRate(dwSampleRate);
SetStereoMode(dwChannels);
ResetPerformanceStats();
return S_OK;
}
/////////////////////////////////////////////////////////////////////////////////
// Construct FM demod object
/////////////////////////////////////////////////////////////////////////////////
CFmDemod::CFmDemod(TYPEREAL samplerate) : m_SampleRate(samplerate)
{
m_FreqErrorDC = 0.0;
m_NcoPhase = 0.0;
m_NcoFreq = 0.0;
SetSampleRate(m_SampleRate);
}
static PaError SetUpUnidirectionalStream(AudioDeviceID device, double sampleRate, unsigned long framesPerBuffer, int isInput)
{
PaError err = paNoError;
err = SetSampleRate(device, sampleRate, isInput);
if( err == paNoError )
err = SetFramesPerBuffer(device, framesPerBuffer, isInput);
return err;
}
CPskTxAlgorithms::CPskTxAlgorithms()
{
Reset();
SetCenterFrequency(1000);
SetSampleRate(11025);
m_SineTable = 0;
}
static void StartAudioI2S0AWBHardware(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
uint32 Audio_I2S_Dac = 0;
uint32 MclkDiv0 = 0;
const bool bEnablePhaseShiftFix = true;
printk("StartAudioI2S0AWBHardware \n");
MclkDiv0 = SetCLkMclk(Soc_Aud_I2S0, runtime->rate); //select I2S
SetCLkBclk(MclkDiv0, runtime->rate, runtime->channels, Soc_Aud_I2S_WLEN_WLEN_32BITS);
// 2nd I2S In
SetSampleRate(Soc_Aud_Digital_Block_MEM_I2S, runtime->rate);
Audio_I2S_Dac |= (bEnablePhaseShiftFix << 31);
Audio_I2S_Dac |= (Soc_Aud_I2S_IN_PAD_SEL_I2S_IN_FROM_IO_MUX << 28);//I2S in from io_mux
Audio_I2S_Dac |= Soc_Aud_LOW_JITTER_CLOCK << 12 ; //Low jitter mode
Audio_I2S_Dac |= (Soc_Aud_INV_LRCK_NO_INVERSE << 5);
Audio_I2S_Dac |= (Soc_Aud_I2S_FORMAT_I2S << 3);
Audio_I2S_Dac |= (Soc_Aud_I2S_WLEN_WLEN_32BITS << 1);
Afe_Set_Reg(AFE_I2S_CON, Audio_I2S_Dac | 0x1, MASK_ALL);
// here to set interrupt
/*modified by jiaqing.yang for ALPS02074446(For_JHZ6735M_65C_L_ALPS.L1.MP3.V1_P67) 20150706 begin*/
#if 0
SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->period_size);
#else
SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->period_size >> 1);
#endif
/*modified by jiaqing.yang for ALPS02074446(For_JHZ6735M_65C_L_ALPS.L1.MP3.V1_P67) 20150706 end*/
SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->rate);
SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, true);
SetSampleRate(Soc_Aud_Digital_Block_MEM_AWB, substream->runtime->rate);
SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_AWB, true);
SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_2, true);
// here to turn off digital part
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I00, Soc_Aud_InterConnectionOutput_O05);
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I01, Soc_Aud_InterConnectionOutput_O06);
EnableAfe(true);
}
/*****************************************************************************
* CSynth::Activate()
*****************************************************************************
* Make the synth active.
*/
HRESULT CSynth::Activate(DWORD dwSampleRate, DWORD dwChannels )
{
NTSTATUS status = STATUS_SUCCESS;
m_stLastTime = 0;
SetSampleRate(dwSampleRate);
SetStereoMode(dwChannels);
ResetPerformanceStats();
return status;
}
static void StartAudioI2S0AWBHardware(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
uint32 Audio_I2S_Dac = 0;
uint32 MclkDiv0 = 0;
const bool bEnablePhaseShiftFix = true;
pr_warn("StartAudioI2S0AWBHardware\n");
MclkDiv0 = SetCLkMclk(Soc_Aud_I2S0, runtime->rate); /* select I2S */
SetCLkBclk(MclkDiv0, runtime->rate, runtime->channels, Soc_Aud_I2S_WLEN_WLEN_32BITS);
/* 2nd I2S In */
SetSampleRate(Soc_Aud_Digital_Block_MEM_I2S, runtime->rate);
Audio_I2S_Dac |= (bEnablePhaseShiftFix << 31);
Audio_I2S_Dac |= (Soc_Aud_I2S_IN_PAD_SEL_I2S_IN_FROM_IO_MUX << 28); /* I2S in from io_mux */
Audio_I2S_Dac |= Soc_Aud_LOW_JITTER_CLOCK << 12; /* Low jitter mode */
Audio_I2S_Dac |= (Soc_Aud_INV_LRCK_NO_INVERSE << 5);
Audio_I2S_Dac |= (Soc_Aud_I2S_FORMAT_I2S << 3);
Audio_I2S_Dac |= (Soc_Aud_I2S_WLEN_WLEN_32BITS << 1);
Afe_Set_Reg(AFE_I2S_CON, Audio_I2S_Dac | 0x1, MASK_ALL);
/* here to set interrupt */
SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->period_size >> 1);
SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->rate);
SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, true);
SetSampleRate(Soc_Aud_Digital_Block_MEM_AWB, substream->runtime->rate);
SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_AWB, true);
SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_2, true);
/* here to turn off digital part */
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I00,
Soc_Aud_InterConnectionOutput_O05);
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I01,
Soc_Aud_InterConnectionOutput_O06);
EnableAfe(true);
}
/**
* @brief Set the speed
*
* @param speed
*/
void setSpeed(int s) {
fprintf(stderr,"setSpeed %d\n",s);
speed=s;
control_out[1]=control_out[1]&0xFC;
control_out[1]=control_out[1]|s;
if(s==SPEED_48KHZ) {
sampleRate=48000;
output_sample_increment=1;
SetSampleRate((double)sampleRate);
SetRXOsc(0,1, LO_OFFSET); // tweaked by Alex Lee 18 Aug 2010
setFilter(filter);
{
int *m=malloc(sizeof(int));
*m=mode;
setMode(m);
}
SetRXOutputGain(0,0,volume/100.0);
} else if(s==SPEED_96KHZ) {
sampleRate=96000;
output_sample_increment=2;
SetSampleRate((double)sampleRate);
SetRXOsc(0,1, LO_OFFSET); // tweaked by Alex Lee 18 Aug 2010
setFilter(filter);
{
int *m=malloc(sizeof(int));
*m=mode;
setMode(m);
}
SetRXOutputGain(0,0,volume/100.0);
} else if(s==SPEED_192KHZ) {
sampleRate=192000;
output_sample_increment=4;
SetSampleRate((double)sampleRate);
SetRXOsc(0,1, LO_OFFSET); // tweaked by Alex Lee 18 Aug 2010
setFilter(filter);
{
int *m=malloc(sizeof(int));
*m=mode;
setMode(m);
}
SetRXOutputGain(0,0,volume/100.0);
}
}
// CONSTRUCTOR
OSndStreamWAV::OSndStreamWAV()
:OSndStream()
{
SetStreamType( SNDSTREAM_WAV );
m_pSndFile=NULL;
SetFileExtention( _T( "wav" ) );
m_OutputFormat = SF_FORMAT_PCM_16;
SetSampleRate( 44100 );
SetChannels( 2 );
}
/** fm10000SetSFlowAttribute
* \ingroup intSflow
*
* \desc Set the sFlow attributes (See sFlow attribute definition).
*
* \param[in] sw is the switch number to operate on.
*
* \param[in] sFlowId is the sFlow instance to set the attribute.
*
* \param[in] attr is sFlow attribute to set.
*
* \param[out] value points to the value of the sFlow attribute.
*
* \return FM_OK if successful.
* \return FM_ERR_INVALID_SFLOW_ATTR if attr is not recognized.
*
*****************************************************************************/
fm_status fm10000SetSFlowAttribute(fm_int sw,
fm_int sFlowId,
fm_int attr,
void * value)
{
fm10000_sflowEntry *sflowEntry;
fm_status err;
FM_LOG_ENTRY(FM_LOG_CAT_SFLOW,
"sw=%d, sFlowId=%d, attr=%d, value=%p\n",
sw,
sFlowId,
attr,
(void *) value);
TAKE_SFLOW_LOCK(sw);
/**************************************************
* Get SFlow entry.
**************************************************/
sflowEntry = GetSflowEntry(sw, sFlowId);
if (!sflowEntry || !sflowEntry->isValid)
{
err = FM_ERR_INVALID_SFLOW_INSTANCE;
goto ABORT;
}
/**************************************************
* Process SFlow attribute.
**************************************************/
switch (attr)
{
case FM_SFLOW_VLAN:
err = SetVlan(sw, sFlowId, *( (fm_uint16 *) value));
break;
case FM_SFLOW_SAMPLE_RATE:
err = SetSampleRate(sw, sFlowId, *( (fm_uint *) value));
break;
default:
err = FM_ERR_INVALID_SFLOW_ATTR;
break;
} /* end switch (attr) */
ABORT:
DROP_SFLOW_LOCK(sw);
FM_LOG_EXIT(FM_LOG_CAT_SFLOW, err);
} /* end fm10000SetSFlowAttribute */
ECHOSTATUS CDarla24DspCommObject::SetInputClock(WORD wClock)
{
if ( (ECHO_CLOCK_INTERNAL != wClock) &&
(ECHO_CLOCK_ESYNC != wClock))
return ECHOSTATUS_CLOCK_NOT_SUPPORTED;
m_wInputClock = wClock;
return SetSampleRate( GetSampleRate() );
} // SetInputClock
static int mtk_pcm_dl1bt_start(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
AudDrv_Clk_On();
SetMemifSubStream(Soc_Aud_Digital_Block_MEM_DL1, substream);
if (runtime->format == SNDRV_PCM_FORMAT_S32_LE ||
runtime->format == SNDRV_PCM_FORMAT_U32_LE) {
SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL1,
AFE_WLEN_32_BIT_ALIGN_8BIT_0_24BIT_DATA);
SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL2,
AFE_WLEN_32_BIT_ALIGN_8BIT_0_24BIT_DATA);
/* BT SCO only support 16 bit */
SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O02);
} else {
SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL1, AFE_WLEN_16_BIT);
SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL2, AFE_WLEN_16_BIT);
SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT,
Soc_Aud_InterConnectionOutput_O02);
}
/* here start digital part */
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I05,
Soc_Aud_InterConnectionOutput_O02);
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I06,
Soc_Aud_InterConnectionOutput_O02);
SetConnection(Soc_Aud_InterCon_ConnectionShift,
Soc_Aud_InterConnectionInput_I05, Soc_Aud_InterConnectionOutput_O02);
SetConnection(Soc_Aud_InterCon_ConnectionShift,
Soc_Aud_InterConnectionInput_I06, Soc_Aud_InterConnectionOutput_O02);
/* set dl1 sample ratelimit_state */
SetSampleRate(Soc_Aud_Digital_Block_MEM_DL1, runtime->rate);
SetChannels(Soc_Aud_Digital_Block_MEM_DL1, runtime->channels);
SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_DL1, true);
/* here to set interrupt */
SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, runtime->period_size >> 1);
SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, runtime->rate);
SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, true);
if (GetMemoryPathEnable(Soc_Aud_Digital_Block_DAI_BT) == false) {
/* set merge interface */
SetMemoryPathEnable(Soc_Aud_Digital_Block_DAI_BT, true);
} else {
SetMemoryPathEnable(Soc_Aud_Digital_Block_DAI_BT, true);
}
SetVoipDAIBTAttribute(runtime->rate);
SetDaiBtEnable(true);
EnableAfe(true);
return 0;
}
static int mtk_pcm_dl2_prepare(struct snd_pcm_substream *substream)
{
bool mI2SWLen = Soc_Aud_I2S_WLEN_WLEN_16BITS;
struct snd_pcm_runtime *runtime = substream->runtime;
if (mPrepareDone == false) {
pr_warn
("%s format = %d SNDRV_PCM_FORMAT_S32_LE = %d SNDRV_PCM_FORMAT_U32_LE = %d\n",
__func__, runtime->format, SNDRV_PCM_FORMAT_S32_LE, SNDRV_PCM_FORMAT_U32_LE);
SetMemifSubStream(Soc_Aud_Digital_Block_MEM_DL2, substream);
if (runtime->format == SNDRV_PCM_FORMAT_S32_LE ||
runtime->format == SNDRV_PCM_FORMAT_U32_LE) {
/* not support 24bit +++ */
SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL2,
AFE_WLEN_32_BIT_ALIGN_8BIT_0_24BIT_DATA);
SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_24BIT,
Soc_Aud_InterConnectionOutput_O03);
SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_24BIT,
Soc_Aud_InterConnectionOutput_O04);
/* not support 24bit --- */
mI2SWLen = Soc_Aud_I2S_WLEN_WLEN_32BITS;
} else {
/* not support 24bit +++ */
SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL2,
AFE_WLEN_16_BIT);
SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT,
Soc_Aud_InterConnectionOutput_O03);
SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT,
Soc_Aud_InterConnectionOutput_O04);
/* not support 24bit --- */
mI2SWLen = Soc_Aud_I2S_WLEN_WLEN_16BITS;
}
SetSampleRate(Soc_Aud_Digital_Block_MEM_I2S, runtime->rate);
/* start I2S DAC out */
if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC) == false) {
SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC, true);
SetI2SDacOut(substream->runtime->rate, false, mI2SWLen);
SetI2SDacEnable(true);
} else {
SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC, true);
}
/* here to set interrupt_distributor */
SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, runtime->period_size);
SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, runtime->rate);
EnableAfe(true);
mPrepareDone = true;
}
return 0;
}
CAudio::CAudio()
{
ASSERT(sizeof(short int)==2);
ASSERT(sizeof(UINT)==4);
ASSERT(sizeof(DWORD)==4);
m_bFile=FALSE;
m_hWaveOut=NULL;
m_pbyAudioBuf=NULL;
SetSampleRate(48000,TRUE);
}
static void StartAudioFMI2SAWBHardware(struct snd_pcm_substream *substream)
{
AudioDigtalI2S m2ndI2SInAttribute;
pr_warn("StartAudioFMI2SAWBHardware\n");
/* here to set interrupt */
SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE,
substream->runtime->period_size >> 1);
SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE,
substream->runtime->rate);
SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, true);
SetSampleRate(Soc_Aud_Digital_Block_MEM_AWB, substream->runtime->rate);
SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_AWB, true);
/* here to turn off digital part */
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I00,
Soc_Aud_InterConnectionOutput_O05);
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I01,
Soc_Aud_InterConnectionOutput_O06);
if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_2) == false) {
/* set merge interface */
SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_2, true);
/* Config 2nd I2S IN */
memset_io((void *)&m2ndI2SInAttribute, 0, sizeof(m2ndI2SInAttribute));
m2ndI2SInAttribute.mLR_SWAP = Soc_Aud_LR_SWAP_NO_SWAP;
m2ndI2SInAttribute.mI2S_IN_PAD_SEL = false; /* I2S_IN_FROM_CONNSYS */
m2ndI2SInAttribute.mI2S_SLAVE = Soc_Aud_I2S_SRC_SLAVE_MODE;
m2ndI2SInAttribute.mI2S_SAMPLERATE = 32000;
m2ndI2SInAttribute.mINV_LRCK = Soc_Aud_INV_LRCK_NO_INVERSE;
m2ndI2SInAttribute.mI2S_FMT = Soc_Aud_I2S_FORMAT_I2S;
m2ndI2SInAttribute.mI2S_WLEN = Soc_Aud_I2S_WLEN_WLEN_16BITS;
Set2ndI2SIn(&m2ndI2SInAttribute);
if (substream->runtime->rate == 48000)
SetI2SASRCConfig(true, 48000); /* Covert from 32000 Hz to 48000 Hz */
else
SetI2SASRCConfig(true, 44100); /* Covert from 32000 Hz to 44100 Hz */
SetI2SASRCEnable(true);
Set2ndI2SInEnable(true);
} else
SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_2, true);
EnableAfe(true);
}
OSStatus CAAudioUnit::SetSampleRate (Float64 inSampleRate)
{
OSStatus result;
UInt32 elCount;
require_noerr (result = GetElementCount(kAudioUnitScope_Input, elCount), home);
if (elCount) {
for (unsigned int i = 0; i < elCount; ++i) {
require_noerr (result = SetSampleRate (kAudioUnitScope_Input, i, inSampleRate), home);
}
}
require_noerr (result = GetElementCount(kAudioUnitScope_Output, elCount), home);
if (elCount) {
for (unsigned int i = 0; i < elCount; ++i) {
require_noerr (result = SetSampleRate (kAudioUnitScope_Output, i, inSampleRate), home);
}
}
home:
return result;
}
BOOL FmodSoundEngine::SetTempo(double factor, int channel_id, bool immediate)
{
if(immediate){
double _intended_pitch = intended_pitch;
BOOL result = SetSampleRate(factor, channel_id, immediate);
intended_pitch = _intended_pitch;
result &= SetAbsolutePitch(_intended_pitch/factor, channel_id);
return result;
}else{
tempo_factor = factor;
return TRUE;
}
}
static int mtk_pcm_fmtx_start(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
AudDrv_Clk_On();
// mtk_wcn_cmb_stub_audio_ctrl((CMB_STUB_AIF_X)CMB_STUB_AIF_2);
SetMemifSubStream(Soc_Aud_Digital_Block_MEM_DL1, substream);
if (runtime->format == SNDRV_PCM_FORMAT_S32_LE || runtime->format == SNDRV_PCM_FORMAT_U32_LE)
{
SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL1, AFE_WLEN_32_BIT_ALIGN_8BIT_0_24BIT_DATA);
SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL2, AFE_WLEN_32_BIT_ALIGN_8BIT_0_24BIT_DATA);
SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O00); // FM Tx only support 16 bit
SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O01); // FM Tx only support 16 bit
}
else
{
SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL1, AFE_WLEN_16_BIT);
SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL2, AFE_WLEN_16_BIT);
SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O00);
SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O01);
}
// here start digital part
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I05, Soc_Aud_InterConnectionOutput_O00);
SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I06, Soc_Aud_InterConnectionOutput_O01);
// set dl1 sample ratelimit_state
SetSampleRate(Soc_Aud_Digital_Block_MEM_DL1, runtime->rate);
SetChannels(Soc_Aud_Digital_Block_MEM_DL1, runtime->channels);
// start MRG I2S Out
SetMemoryPathEnable(Soc_Aud_Digital_Block_MRG_I2S_OUT, true);
SetMrgI2SEnable(true, runtime->rate) ;
// start 2nd I2S Out
Set2ndI2SOutAttribute(runtime->rate) ;
Set2ndI2SOutEnable(true);
SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_DL1, true);
// here to set interrupt
SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, (runtime->period_size * 2 / 3));
SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, runtime->rate);
SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, true);
EnableAfe(true);
return 0;
}