/* * booke_wdt_enable: */ static __inline__ void booke_wdt_enable(void) { u32 val; val = mfspr(SPRN_TCR); val |= (TCR_WIE|TCR_WRC(WRC_CHIP)|WDTP(booke_wdt_period)); mtspr(SPRN_TCR, val); }
/* * booke_wdt_enable: */ static __inline__ void booke_wdt_enable(void) { u32 val; booke_wdt_ping(); val = mfspr(SPRN_TCR); val |= (TCR_WIE|TCR_WRC(WRC_CHIP)|WDTP(booke_wdt_period)); atomic_set(&booke_wdt_irq, 1); mtspr(SPRN_TCR, val); }
static void __booke_wdt_enable(void *data) { u32 val; /* clear status before enabling watchdog */ __booke_wdt_ping(NULL); val = mfspr(SPRN_TCR); val &= ~WDTP_MASK; val |= (TCR_WIE|TCR_WRC(WRC_CHIP)|WDTP(booke_wdt_period)); mtspr(SPRN_TCR, val); }
static void __booke_wdt_enable(void *data) { u32 val; /* clear status before enabling watchdog */ __booke_wdt_ping(NULL); val = mfspr(SPRN_TCR); val &= ~WDTP_MASK; val |= (TCR_WIE|TCR_WRC(WRC_CHIP)|WDTP(booke_wdt_period)); #ifdef CONFIG_PPC_BOOK3E_64 /* * Crit ints are currently broken on PPC64 Book-E, so * just disable them for now. */ val &= ~TCR_WIE; #endif mtspr(SPRN_TCR, val); }
void init_85xx_watchdog(void) { mtspr(SPRN_TCR, (mfspr(SPRN_TCR) & ~WATCHDOG_MASK) | TCR_WP(CONFIG_WATCHDOG_PRESC) | TCR_WRC(CONFIG_WATCHDOG_RC)); }