/*************************************************************************//**
*****************************************************************************/
void HAL_TimerInit(void)
{
halTimerIrqCount = 0;
PM->APBCMASK.reg |= PM_APBCMASK_TC4;
GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_ID(0x15/*TC4,TC5*/) | GCLK_CLKCTRL_GEN(0);
SYSTIMER.CTRLA.reg = TC_CTRLA_MODE(TC_CTRLA_MODE_COUNT16_Val)
| TC_CTRLA_WAVEGEN(TC_CTRLA_WAVEGEN_MFRQ_Val)
| TC_CTRLA_PRESCALER(3 /*DIV8*/)
| TC_CTRLA_PRESCSYNC(TC_CTRLA_PRESCSYNC_PRESC_Val);
halTimerSync();
SYSTIMER.COUNT.reg = 0;
halTimerSync();
SYSTIMER.CC[0].reg = TIMER_TOP;
halTimerSync();
SYSTIMER.CTRLA.reg = TC_CTRLA_ENABLE;
halTimerSync();
SYSTIMER.INTENSET.reg = TC_INTENSET_MC(0);
NVIC_EnableIRQ(TC4_IRQn);
}
/*************************************************************************//**
*****************************************************************************/
void HAL_TimerDelay(uint16_t us)
{
uint16_t target = SYSTIMER.COUNT.reg + us;
if(target > TIMER_TOP)
target -= TIMER_TOP;
SYSTIMER.CC[1].reg = target;
halTimerSync();
halTimerDelayInt = 0;
SYSTIMER.INTENSET.reg = TC_INTENSET_MC(1);
while(0 == halTimerDelayInt);
SYSTIMER.INTENCLR.reg = TC_INTENCLR_MC(1);
}
//-----------------------------------------------------------------------------
static void timer_init(void)
{
PM->APBCMASK.reg |= PM_APBCMASK_TC1;
GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID(TC1_GCLK_ID) |
GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN(0);
TC1->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | TC_CTRLA_WAVEGEN_MFRQ |
TC_CTRLA_PRESCALER_DIV256 | TC_CTRLA_PRESCSYNC_RESYNC;
TC1->COUNT16.COUNT.reg = 0;
timer_set_period(PERIOD_SLOW);
TC1->COUNT16.CTRLA.reg |= TC_CTRLA_ENABLE;
TC1->COUNT16.INTENSET.reg = TC_INTENSET_MC(1);
NVIC_EnableIRQ(TC1_IRQn);
}
//-----------------------------------------------------------------------------
static void timer_init(void)
{
MCLK->APBAMASK.reg |= MCLK_APBAMASK_TC0;
GCLK->PCHCTRL[TC0_GCLK_ID].reg = GCLK_PCHCTRL_GEN(0) | GCLK_PCHCTRL_CHEN;
while (0 == (GCLK->PCHCTRL[TC0_GCLK_ID].reg & GCLK_PCHCTRL_CHEN));
TC0->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | TC_CTRLA_PRESCALER_DIV1024 |
TC_CTRLA_PRESCSYNC_RESYNC;
TC0->COUNT16.WAVE.reg = TC_WAVE_WAVEGEN_MFRQ;
TC0->COUNT16.COUNT.reg = 0;
timer_set_period(PERIOD_SLOW);
TC0->COUNT16.CTRLA.reg |= TC_CTRLA_ENABLE;
TC0->COUNT16.INTENSET.reg = TC_INTENSET_MC(1);
NVIC_EnableIRQ(TC0_IRQn);
}