TWL_ADJUSTABLE_LDO(VMMC2, 0x2b, RES_VMMC2), /* TWL_ADJUSTABLE_LDO(VPLL1, 0x2f, RES_VPLL1), */ TWL_ADJUSTABLE_LDO(VPLL2, 0x33, RES_VPLL2), TWL_ADJUSTABLE_LDO(VSIM, 0x37, RES_VSIM), TWL_ADJUSTABLE_LDO(VDAC, 0x3b, RES_VDAC), /* TWL_ADJUSTABLE_LDO(VINTANA1, 0x3f, RES_VINTANA1), TWL_ADJUSTABLE_LDO(VINTANA2, 0x43, RES_VINTANA1), TWL_ADJUSTABLE_LDO(VINTDIG, 0x47, RES_VINTDIG), TWL_SMPS(VIO, 0x4b, RES_VIO), TWL_SMPS(VDD1, 0x55, RES_VDD1), TWL_SMPS(VDD2, 0x63, RES_VDD2), */ TWL_FIXED_LDO(VUSB1V5, 0x71, 1500, RES_VUSB_1V5), TWL_FIXED_LDO(VUSB1V8, 0x74, 1800, RES_VUSB_1V8), TWL_FIXED_LDO(VUSB3V1, 0x77, 3100, RES_VUSB_3V1), /* VUSBCP is managed *only* by the USB subchip */ }; static int twl4030reg_probe(struct platform_device *pdev) { int i; struct twlreg_info *info; struct regulator_init_data *initdata; struct regulation_constraints *c; struct regulator_dev *rdev; for (i = 0, info = NULL; i < ARRAY_SIZE(twl4030_regs); i++) { if (twl4030_regs[i].desc.id != pdev->id)
TWL_ADJUSTABLE_LDO(VMMC2, 0x2b, 6), /* TWL_ADJUSTABLE_LDO(VPLL1, 0x2f, 7), TWL_ADJUSTABLE_LDO(VPLL2, 0x33, 8), */ TWL_ADJUSTABLE_LDO(VSIM, 0x37, 9), TWL_ADJUSTABLE_LDO(VDAC, 0x3b, 10), /* TWL_ADJUSTABLE_LDO(VINTANA1, 0x3f, 11), TWL_ADJUSTABLE_LDO(VINTANA2, 0x43, 12), TWL_ADJUSTABLE_LDO(VINTDIG, 0x47, 13), TWL_SMPS(VIO, 0x4b, 14), TWL_SMPS(VDD1, 0x55, 15), TWL_SMPS(VDD2, 0x63, 16), */ TWL_FIXED_LDO(VUSB1V5, 0x71, 1500, 17), TWL_FIXED_LDO(VUSB1V8, 0x74, 1800, 18), TWL_FIXED_LDO(VUSB3V1, 0x77, 3100, 19), /* VUSBCP is managed *only* by the USB subchip */ }; static int twl4030reg_probe(struct platform_device *pdev) { int i; struct twlreg_info *info; struct regulator_init_data *initdata; struct regulation_constraints *c; struct regulator_dev *rdev; int min_uV, max_uV; for (i = 0, info = NULL; i < ARRAY_SIZE(twl4030_regs); i++) {