//-----------------------------------------------------------------//
// Setup UART modules
// HCLK = 32 MHz
//
// UARTx CLK = 16 MHz
//-----------------------------------------------------------------//
void HW_UARTInit(void)
{
//--------------- UART1 INIT ---------------//
UART_BRGInit(MDR_UART1, UART_HCLKdiv1);
//--------------- UART2 INIT ---------------//
UART_BRGInit(MDR_UART2, UART_HCLKdiv1);
}
/*******************************************************************************
* Function Name : UARTConfiguration
* Description : Configures the UART.
* : Configures the HCLK division factor and RTCHSE clock for UART.
* Output : None
* Return : None
*******************************************************************************/
static void UARTConfiguration(void)
{
/* Enable the RTCHSE clock on UART */
RST_CLK_PCLKcmd(RST_CLK_PCLK_UART, ENABLE);
/* Set the UART HCLK division factor */
UART_BRGInit(UART, UART_HCLKdiv16);
UART_DeInit(UART);
#if defined (USE_MDR32F9Q1_Rev0) || defined (USE_MDR32F9Q1_Rev1)
/* Configure PORTF pins for data transfer to/from UART */
PortInitStructure.PORT_Pin = PORT_Pin_0 | PORT_Pin_1;
PortInitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PortInitStructure.PORT_FUNC = PORT_FUNC_OVERRID;
PortInitStructure.PORT_SPEED = PORT_SPEED_MAXFAST;
PORT_Init(MDR_PORTF, &PortInitStructure);
#else
#if defined (USE_MDR32F9Q2_Rev0) && !defined (USE_MDR32F9Q2_Rev1)
PORTBSaveConfig();
#endif /* defined (USE_MDR32F9Q2_Rev0) && !defined (USE_MDR32F9Q2_Rev1) */
/* Configure PORTB pins for data transfer to/from UART */
PortInitStructure.PORT_Pin = PORT_Pin_5 | PORT_Pin_6;
PortInitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PortInitStructure.PORT_FUNC = PORT_FUNC_ALTER;
PortInitStructure.PORT_SPEED = PORT_SPEED_MAXFAST;
PORT_Init(MDR_PORTB, &PortInitStructure);
#endif /* defined (USE_MDR32F9Q1_Rev0) || defined (USE_MDR32F9Q1_Rev1) */
/* Enable interrupt on UART */
NVIC_EnableIRQ(UART_IRQn);
}
/**
* @brief
* @param None
* @retval None
*/
void DebugUARTInit()
{
UART_InitTypeDef UART_InitStructure;
uint32_t BaudRateStatus;
#if defined (USE_MDR1986VE3)
RST_CLK_PCLKcmd((RST_CLK_PCLK_PORTD | RST_CLK_PCLK_UART2), ENABLE);
#elif defined (USE_MDR1986VE9x)
RST_CLK_PCLKcmd((RST_CLK_PCLK_PORTF | RST_CLK_PCLK_UART2), ENABLE);
#elif defined (USE_MDR1986VE1T)
RST_CLK_PCLKcmd((RST_CLK_PCLK_PORTC | RST_CLK_PCLK_UART1), ENABLE);
#endif
/* Port Init Struture */
PORT_InitStructure.PORT_Pin = DEBUG_UART_PINS;
PORT_InitStructure.PORT_FUNC = DEBUG_UART_PINS_FUNCTION;
PORT_InitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PORT_InitStructure.PORT_SPEED = PORT_SPEED_MAXFAST;
PORT_InitStructure.PORT_PD = PORT_PD_DRIVER;
PORT_Init(DEBUG_UART_PORT, &PORT_InitStructure);
UART_DeInit(DEBUG_UART);
/* UART Init Structure */
UART_InitStructure.UART_BaudRate = DEBUG_BAUD_RATE;
UART_InitStructure.UART_WordLength = UART_WordLength8b;
UART_InitStructure.UART_StopBits = UART_StopBits1;
UART_InitStructure.UART_Parity = UART_Parity_No;
UART_InitStructure.UART_FIFOMode = UART_FIFO_ON;
UART_InitStructure.UART_HardwareFlowControl = ( UART_HardwareFlowControl_RXE |
UART_HardwareFlowControl_TXE );
/* ----- Инициализация UART ----- */
UART_BRGInit(DEBUG_UART, UART_HCLKdiv1);
BaudRateStatus = UART_Init(DEBUG_UART, &UART_InitStructure);
if(BaudRateStatus == BaudRateValid){
UART_Cmd(DEBUG_UART,ENABLE);
}
else{
while(1);
}
DEBUG_PRINTF("==============System startup==============\n\r");
DEBUG_PRINTF("Init Debug UART ... Ok\r\n");
}
//==================================================================================
void UART_init(void)
{
RST_CLK_PCLKcmd( RST_CLK_PCLK_UART1, ENABLE );
UART_BRGInit( MDR_UART1, UART_HCLKdiv1 );
UART_DeInit( MDR_UART1 );
NVIC_DisableIRQ( UART1_IRQn );
/* Initialize UART_InitStructure */
UART_InitStructure.UART_BaudRate = 9600;
UART_InitStructure.UART_WordLength = UART_WordLength8b;
UART_InitStructure.UART_StopBits = UART_StopBits2;
UART_InitStructure.UART_Parity = UART_Parity_No;
UART_InitStructure.UART_FIFOMode = UART_FIFO_OFF;
UART_InitStructure.UART_HardwareFlowControl = UART_HardwareFlowControl_RXE | UART_HardwareFlowControl_TXE;
UART_Init( MDR_UART1, &UART_InitStructure );
NVIC_EnableIRQ( UART1_IRQn );
UART_ITConfig( MDR_UART1, UART_IT_RX, ENABLE );
UART_Cmd( MDR_UART1,ENABLE );
}
/**
* @brief Main program.
* @param None
* @retval None
*/
void main ( void )
{
uint8_t DataByte = 0x00;
static uint8_t ReciveByte = 0x00;
/* Enables the HSI clock on PORTD */
RST_CLK_PCLKcmd(RST_CLK_PCLK_PORTD, ENABLE);
/* Fill PortInit structure*/
PortInit.PORT_PULL_UP = PORT_PULL_UP_OFF;
PortInit.PORT_PULL_DOWN = PORT_PULL_DOWN_OFF;
PortInit.PORT_PD_SHM = PORT_PD_SHM_OFF;
PortInit.PORT_PD = PORT_PD_DRIVER;
PortInit.PORT_GFEN = PORT_GFEN_OFF;
PortInit.PORT_FUNC = PORT_FUNC_MAIN;
PortInit.PORT_SPEED = PORT_SPEED_MAXFAST;
PortInit.PORT_MODE = PORT_MODE_DIGITAL;
/* Configure PORTD pins 13 (UART2_TX) as output */
PortInit.PORT_OE = PORT_OE_OUT;
PortInit.PORT_Pin = PORT_Pin_13;
PORT_Init(MDR_PORTD, &PortInit);
/* Configure PORTD pins 14 (UART1_RX) as input */
PortInit.PORT_OE = PORT_OE_IN;
PortInit.PORT_Pin = PORT_Pin_14;
PORT_Init(MDR_PORTD, &PortInit);
/* Select HSI/2 as CPU_CLK source*/
RST_CLK_CPU_PLLconfig(RST_CLK_CPU_PLLsrcHSIdiv2, 0);
/* Enables the CPU_CLK clock on UART2 */
RST_CLK_PCLKcmd(RST_CLK_PCLK_UART2, ENABLE);
/* Set the HCLK division factor = 1 for UART2*/
UART_BRGInit(MDR_UART2, UART_HCLKdiv1 );
/* Initialize UART_InitStructure */
UART_InitStructure.UART_BaudRate = 9600;
UART_InitStructure.UART_WordLength = UART_WordLength8b;
UART_InitStructure.UART_StopBits = UART_StopBits2;
UART_InitStructure.UART_Parity = UART_Parity_Even;
UART_InitStructure.UART_FIFOMode = UART_FIFO_OFF;
UART_InitStructure.UART_HardwareFlowControl = UART_HardwareFlowControl_RXE
| UART_HardwareFlowControl_TXE;
/* Configure UART2 parameters*/
UART_Init(MDR_UART2, &UART_InitStructure);
/* Enables UART2 peripheral */
UART_Cmd(MDR_UART2, ENABLE);
while (1) {
/* Check TXFE flag */
while (UART_GetFlagStatus(MDR_UART2, UART_FLAG_TXFE) != SET);
/* Send Data from UART2 */
UART_SendData(MDR_UART2, DataByte);
/* Check RXFF flag */
while (UART_GetFlagStatus(MDR_UART2, UART_FLAG_RXFF) != SET);
/* Recive data*/
ReciveByte = UART_ReceiveData(MDR_UART2);
/* Increment Data */
DataByte++;
}
}
void prvSetupHardware( void )
{
PORT_InitTypeDef PORT_InitStructure;
UART_InitTypeDef UART_InitStructure;
//SSP_InitTypeDef SPI_InitStructure;
TIMER_CntInitTypeDef sTIM_CntInit;
// TIMER_ChnInitTypeDef sTIM_ChnInit;
//CLK
/* Enable HSE clock oscillator */
RST_CLK_HSEconfig(RST_CLK_HSE_ON);
while(RST_CLK_HSEstatus() == ERROR);
RST_CLK_CPUclkSelection(RST_CLK_CPUclkCPU_C3);
MDR_RST_CLK -> CPU_CLOCK |= 2;//CPU_C1 set HSE
RST_CLK_HSIcmd(DISABLE);
/* Enable the RTCHSE clock on all ports */
RST_CLK_PCLKcmd(ALL_PORTS_CLK, ENABLE);
PORT_StructInit(&PORT_InitStructure);//reset struct
/************************ LCD Initialization *************************/
/* Configure PORTA pins for data transfer to/from LCD */
PORT_InitStructure.PORT_Pin = LCD_DATA_BUS_8;
PORT_InitStructure.PORT_FUNC = PORT_FUNC_PORT;
PORT_InitStructure.PORT_SPEED = PORT_SPEED_SLOW;
PORT_InitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PORT_InitStructure.PORT_OE = PORT_OE_IN;
PORT_Init(MDR_PORTA, &PORT_InitStructure);
/* Configure PORTE pin4 and pin5 for LCD crystals control */
PORT_InitStructure.PORT_Pin = KS0108_CS1 | KS0108_CS2 | KS0108_RS;
PORT_InitStructure.PORT_OE = PORT_OE_OUT;
PORT_Init(MDR_PORTE, &PORT_InitStructure);
PORT_Init(MDR_PORTE, &PORT_InitStructure);
PORT_InitStructure.PORT_Pin = KS0108_EN | KS0108_RW | KS0108_RES;
PORT_Init(MDR_PORTC, &PORT_InitStructure);
PORT_SetBits(MDR_PORTA, LCD_DATA_BUS_8);
PORT_SetBits(MDR_PORTE, KS0108_CS1 | KS0108_CS2 | KS0108_RS);
PORT_SetBits(MDR_PORTC, KS0108_EN | KS0108_RW | KS0108_RES);
//Timer1
// TIMER1
RST_CLK_PCLKcmd(RST_CLK_PCLK_TIMER1,ENABLE);
/* Reset all TIMER1 settings */
TIMER_DeInit(MDR_TIMER1);
TIMER_BRGInit(MDR_TIMER1,TIMER_HCLKdiv1);
/* TIM1 configuration ------------------------------------------------*/
/* Initializes the TIMERx Counter ------------------------------------*/
sTIM_CntInit.TIMER_IniCounter = 0;
sTIM_CntInit.TIMER_Prescaler = 150;//
sTIM_CntInit.TIMER_Period = 82;
sTIM_CntInit.TIMER_CounterMode = TIMER_CntMode_ClkFixedDir;
sTIM_CntInit.TIMER_CounterDirection = TIMER_CntDir_Up;
sTIM_CntInit.TIMER_EventSource = TIMER_EvSrc_None;
sTIM_CntInit.TIMER_FilterSampling = TIMER_FDTS_TIMER_CLK_div_1;
sTIM_CntInit.TIMER_ARR_UpdateMode = TIMER_ARR_Update_Immediately;
sTIM_CntInit.TIMER_ETR_FilterConf = TIMER_Filter_1FF_at_TIMER_CLK;
sTIM_CntInit.TIMER_ETR_Prescaler = TIMER_ETR_Prescaler_None;
sTIM_CntInit.TIMER_ETR_Polarity = TIMER_ETRPolarity_NonInverted;
sTIM_CntInit.TIMER_BRK_Polarity = TIMER_BRKPolarity_NonInverted;
TIMER_CntInit (MDR_TIMER1,&sTIM_CntInit);
NVIC_EnableIRQ(Timer1_IRQn);
TIMER_ITConfig(MDR_TIMER1,TIMER_STATUS_CNT_ARR, ENABLE);
/* TMR1 enable */
TIMER_Cmd (MDR_TIMER1,ENABLE);
// TIMER2
RST_CLK_PCLKcmd(RST_CLK_PCLK_TIMER2,ENABLE);
/* Reset all TIMER1 settings */
TIMER_DeInit(MDR_TIMER2);
TIMER_BRGInit(MDR_TIMER2,TIMER_HCLKdiv1);
/* TIM2 configuration ------------------------------------------------*/
/* Initializes the TIMERx Counter ------------------------------------*/
sTIM_CntInit.TIMER_IniCounter = 0;
sTIM_CntInit.TIMER_Prescaler = 0xf;//
sTIM_CntInit.TIMER_Period = 0xffff;
sTIM_CntInit.TIMER_CounterMode = TIMER_CntMode_ClkFixedDir;
sTIM_CntInit.TIMER_CounterDirection = TIMER_CntDir_Up;
sTIM_CntInit.TIMER_EventSource = TIMER_EvSrc_None;
sTIM_CntInit.TIMER_FilterSampling = TIMER_FDTS_TIMER_CLK_div_1;
sTIM_CntInit.TIMER_ARR_UpdateMode = TIMER_ARR_Update_Immediately;
sTIM_CntInit.TIMER_ETR_FilterConf = TIMER_Filter_1FF_at_TIMER_CLK;
sTIM_CntInit.TIMER_ETR_Prescaler = TIMER_ETR_Prescaler_None;
sTIM_CntInit.TIMER_ETR_Polarity = TIMER_ETRPolarity_NonInverted;
sTIM_CntInit.TIMER_BRK_Polarity = TIMER_BRKPolarity_NonInverted;
TIMER_CntInit (MDR_TIMER2,&sTIM_CntInit);
NVIC_EnableIRQ(Timer2_IRQn);
TIMER_ITConfig(MDR_TIMER2,TIMER_STATUS_CNT_ARR, ENABLE);
/* TMR2 enable */
TIMER_Cmd (MDR_TIMER2,ENABLE);
// TIMER3
RST_CLK_PCLKcmd(RST_CLK_PCLK_TIMER3,ENABLE);
/* Reset all TIMER3 settings */
TIMER_DeInit(MDR_TIMER3);
TIMER_BRGInit(MDR_TIMER3,TIMER_HCLKdiv1);
/* TIM3 configuration ------------------------------------------------*/
/* Initializes the TIMERx Counter ------------------------------------*/
sTIM_CntInit.TIMER_IniCounter = 0;
sTIM_CntInit.TIMER_Prescaler = 0;
sTIM_CntInit.TIMER_Period = 0xFFFF;
sTIM_CntInit.TIMER_CounterMode = TIMER_CntMode_EvtFixedDir;
sTIM_CntInit.TIMER_CounterDirection = TIMER_CntDir_Up;
sTIM_CntInit.TIMER_EventSource = TIMER_EvSrc_CH1;
sTIM_CntInit.TIMER_FilterSampling = TIMER_FDTS_TIMER_CLK_div_1;
sTIM_CntInit.TIMER_ARR_UpdateMode = TIMER_ARR_Update_Immediately;
sTIM_CntInit.TIMER_ETR_FilterConf = TIMER_Filter_1FF_at_TIMER_CLK;
sTIM_CntInit.TIMER_ETR_Prescaler = TIMER_ETR_Prescaler_None;
sTIM_CntInit.TIMER_ETR_Polarity = TIMER_ETRPolarity_NonInverted;
sTIM_CntInit.TIMER_BRK_Polarity = TIMER_BRKPolarity_NonInverted;
TIMER_CntInit (MDR_TIMER3,&sTIM_CntInit);
// NVIC_EnableIRQ(Timer3_IRQn);
// TIMER_ITConfig(MDR_TIMER3,TIMER_STATUS_CNT_ARR, ENABLE);
/* Enable TIMER3 */
TIMER_Cmd(MDR_TIMER3,ENABLE);
/************************ UART1 Initialization *************************/
PORT_StructInit(&PORT_InitStructure);//reset struct
PORT_InitStructure.PORT_Pin = PORT_Pin_12|PORT_Pin_13;//RX TX
PORT_InitStructure.PORT_FUNC = PORT_FUNC_OVERRID;
PORT_InitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PORT_InitStructure.PORT_SPEED = PORT_SPEED_SLOW;
PORT_Init(MDR_PORTE, &PORT_InitStructure);
PORT_InitStructure.PORT_Pin = PORT_Pin_14;//EN RS485
PORT_InitStructure.PORT_OE =PORT_OE_OUT;
PORT_InitStructure.PORT_PD = PORT_PD_OPEN;
PORT_InitStructure.PORT_FUNC = PORT_FUNC_PORT;
PORT_Init(MDR_PORTE, &PORT_InitStructure);
RS485_TX_OFF;
//UART1
RST_CLK_PCLKcmd(RST_CLK_PCLK_UART1,ENABLE);
/* Set the HCLK division factor = 1 for UART1,UART2*/
UART_BRGInit(MDR_UART1, UART_HCLKdiv1);
UART_DeInit(MDR_UART1);
/* Disable interrupt on UART1 */
NVIC_DisableIRQ(UART1_IRQn);
/* Initialize UART_InitStructure */
UART_InitStructure.UART_BaudRate = 38400;
UART_InitStructure.UART_WordLength = UART_WordLength8b;
UART_InitStructure.UART_StopBits = UART_StopBits1;//PKDU2 niobyi
UART_InitStructure.UART_Parity = UART_Parity_No;
UART_InitStructure.UART_FIFOMode = UART_FIFO_OFF;
UART_InitStructure.UART_HardwareFlowControl = UART_HardwareFlowControl_RXE | UART_HardwareFlowControl_TXE;
/* Configure UART1 parameters*/
UART_Init(MDR_UART1,&UART_InitStructure);
NVIC_EnableIRQ(UART1_IRQn);
UART_ITConfig(MDR_UART1,UART_IT_RX, ENABLE);
/* Enables UART1 peripheral */
UART_Cmd(MDR_UART1,ENABLE);
//PORT
/************************ Joystick Initialization *************************/
/* Configure PORTC pins 10..14 for input to handle joystick events */
PORT_StructInit(&PORT_InitStructure);//reset struct
PORT_InitStructure.PORT_Pin = ( PORT_Pin_10 | PORT_Pin_11 | PORT_Pin_12 |
PORT_Pin_13 | PORT_Pin_14 );
PORT_InitStructure.PORT_OE = PORT_OE_IN;
PORT_InitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PORT_InitStructure.PORT_FUNC = PORT_FUNC_PORT;
PORT_InitStructure.PORT_SPEED = PORT_OUTPUT_OFF;
PORT_Init( MDR_PORTC, &PORT_InitStructure );
/************************ LEDs Initialization *************************/
PORT_StructInit( &PORT_InitStructure );//reset struct
/* Configure PORTD pins 10..14 for output to switch LEDs on/off */
PORT_InitStructure.PORT_Pin = LEDs_PINs;
PORT_InitStructure.PORT_OE = PORT_OE_OUT;
PORT_InitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PORT_InitStructure.PORT_FUNC = PORT_FUNC_PORT;
PORT_InitStructure.PORT_SPEED = PORT_SPEED_SLOW;
PORT_Init( MDR_PORTD, &PORT_InitStructure );
/* All LEDs switch off */
PORT_ResetBits(MDR_PORTD, LEDs_PINs);
}
void main(void)
#endif
{
RST_CLK_DeInit();
RST_CLK_CPU_PLLconfig(RST_CLK_CPU_PLLsrcHSIdiv2, 0);
/* Enable peripheral clocks --------------------------------------------------*/
RST_CLK_PCLKcmd(
(RST_CLK_PCLK_RST_CLK |
RST_CLK_PCLK_UART1 |
RST_CLK_PCLK_UART2 |
RST_CLK_PCLK_DMA),
ENABLE);
RST_CLK_PCLKcmd((RST_CLK_PCLK_PORTC | RST_CLK_PCLK_PORTD), ENABLE);
/* Disable all DMA request */
MDR_DMA ->CHNL_REQ_MASK_CLR = 0xFFFFFFFF;
MDR_DMA ->CHNL_USEBURST_CLR = 0xFFFFFFFF;
/* Reset PORTC settings */
PORT_DeInit(MDR_PORTC );
/* Reset PORTC settings */
PORT_DeInit(MDR_PORTD );
/* Configure UART1 pins: RXD, TXD */
/* Configure PORTB pins 3, 4 */
PORT_InitStructure.PORT_Pin = PORT_Pin_4;
PORT_InitStructure.PORT_OE = PORT_OE_IN;
PORT_InitStructure.PORT_FUNC = PORT_FUNC_MAIN;
PORT_InitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PORT_InitStructure.PORT_SPEED = PORT_SPEED_FAST;
PORT_Init(MDR_PORTC, &PORT_InitStructure);
PORT_InitStructure.PORT_Pin = PORT_Pin_3;
PORT_InitStructure.PORT_OE = PORT_OE_OUT;
PORT_Init(MDR_PORTC, &PORT_InitStructure);
/* Configure UART2 pins: RXD, TXD */
/* Configure PORTF pins 13, 14 */
PORT_InitStructure.PORT_Pin = PORT_Pin_14;
PORT_InitStructure.PORT_FUNC = PORT_FUNC_MAIN;
PORT_InitStructure.PORT_OE = PORT_OE_IN;
PORT_Init(MDR_PORTD, &PORT_InitStructure);
PORT_InitStructure.PORT_Pin = (PORT_Pin_13);
PORT_InitStructure.PORT_OE = PORT_OE_OUT;
PORT_Init(MDR_PORTD, &PORT_InitStructure);
/* Init RAM */
Init_RAM(DstBuf1, BufferSize);
Init_RAM(SrcBuf1, BufferSize);
Init_RAM(DstBuf2, BufferSize);
Init_RAM(SrcBuf2, BufferSize);
/* Reset all UART settings */
UART_DeInit(MDR_UART1 );
UART_DeInit(MDR_UART2 );
UART_BRGInit(MDR_UART1, UART_HCLKdiv1 );
UART_BRGInit(MDR_UART2, UART_HCLKdiv1 );
/* UART1 configuration ------------------------------------------------*/
UART_StructInit(&sUART);
sUART.UART_BaudRate = 1200;
sUART.UART_WordLength = UART_WordLength8b;
sUART.UART_StopBits = UART_StopBits1;
sUART.UART_Parity = UART_Parity_No;
sUART.UART_FIFOMode = UART_FIFO_ON;
sUART.UART_HardwareFlowControl = (UART_HardwareFlowControl_RXE
| UART_HardwareFlowControl_TXE );
UART_Init(MDR_UART1, &sUART);
UART_DMAConfig( MDR_UART1,
UART_IT_FIFO_LVL_8words,
UART_IT_FIFO_LVL_8words );
/* UART2 configuration ------------------------------------------------*/
UART_Init(MDR_UART2, &sUART);
UART_DMAConfig(MDR_UART2,
UART_IT_FIFO_LVL_8words,
UART_IT_FIFO_LVL_8words );
/* Enable UART1 DMA Rx and Tx request */
UART_DMACmd(MDR_UART1, (UART_DMA_RXE | UART_DMA_TXE ), ENABLE);
/* Enable UART2 DMA Rx and Tx request */
UART_DMACmd(MDR_UART2, (UART_DMA_RXE | UART_DMA_TXE ), ENABLE);
/* Reset all DMA settings */
DMA_DeInit();
DMA_StructInit(&DMA_InitStr);
/* DMA_Channel_UART1_RX configuration ---------------------------------*/
/* Set Primary Control Data */
DMA_PriCtrlStr.DMA_SourceBaseAddr = (uint32_t) (&(MDR_UART1 ->DR));
DMA_PriCtrlStr.DMA_DestBaseAddr = (uint32_t) DstBuf1;
DMA_PriCtrlStr.DMA_SourceIncSize = DMA_SourceIncNo;
DMA_PriCtrlStr.DMA_DestIncSize = DMA_DestIncByte;
DMA_PriCtrlStr.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_PriCtrlStr.DMA_Mode = DMA_Mode_Basic;
DMA_PriCtrlStr.DMA_CycleSize = BufferSize;
DMA_PriCtrlStr.DMA_NumContinuous = DMA_Transfers_8;
DMA_PriCtrlStr.DMA_SourceProtCtrl = DMA_SourcePrivileged;
DMA_PriCtrlStr.DMA_DestProtCtrl = DMA_DestPrivileged;
/* Set Channel Structure */
DMA_InitStr.DMA_PriCtrlData = &DMA_PriCtrlStr;
DMA_InitStr.DMA_Priority = DMA_Priority_High;
DMA_InitStr.DMA_UseBurst = DMA_BurstClear;
DMA_InitStr.DMA_SelectDataStructure = DMA_CTRL_DATA_PRIMARY;
/* Init DMA channel */
DMA_Init(DMA_Channel_REQ_UART1_RX, &DMA_InitStr);
/* DMA_Channel_UART2_RX configuration ---------------------------------*/
/* Set Primary Control Data */
DMA_PriCtrlStr.DMA_SourceBaseAddr = (uint32_t) (&(MDR_UART2 ->DR));
DMA_PriCtrlStr.DMA_DestBaseAddr = (uint32_t) DstBuf2;
/* Init DMA channel */
DMA_Init(DMA_Channel_REQ_UART2_RX, &DMA_InitStr);
/* DMA_Channel_UART1_TX configuration ---------------------------------*/
/* Set Primary Control Data */
DMA_PriCtrlStr.DMA_SourceBaseAddr = (uint32_t) SrcBuf1;
DMA_PriCtrlStr.DMA_DestBaseAddr = (uint32_t) (&(MDR_UART1 ->DR));
DMA_PriCtrlStr.DMA_SourceIncSize = DMA_SourceIncByte;
DMA_PriCtrlStr.DMA_DestIncSize = DMA_DestIncNo;
DMA_InitStr.DMA_Priority = DMA_Priority_Default;
/* Init DMA channel */
DMA_Init(DMA_Channel_REQ_UART1_TX, &DMA_InitStr);
/* DMA_Channel_UART2_TX configuration ---------------------------------*/
/* Set Primary Control Data */
DMA_PriCtrlStr.DMA_SourceBaseAddr = (uint32_t) SrcBuf2;
DMA_PriCtrlStr.DMA_DestBaseAddr = (uint32_t) (&(MDR_UART2 ->DR));
/* Init DMA channel */
DMA_Init(DMA_Channel_REQ_UART2_TX, &DMA_InitStr);
/* Enable UART1 */
UART_Cmd(MDR_UART1, ENABLE);
/* Enable UART2 */
UART_Cmd(MDR_UART2, ENABLE);
/* Transfer complete */
while ((DMA_GetFlagStatus(DMA_Channel_REQ_UART1_TX, DMA_FLAG_CHNL_ENA )));
while ((DMA_GetFlagStatus(DMA_Channel_REQ_UART1_RX, DMA_FLAG_CHNL_ENA )));
while ((DMA_GetFlagStatus(DMA_Channel_REQ_UART2_TX, DMA_FLAG_CHNL_ENA )));
while ((DMA_GetFlagStatus(DMA_Channel_REQ_UART2_RX, DMA_FLAG_CHNL_ENA )));
/* Check the corectness of written dada */
TransferStatus1 = Verif_mem((BufferSize / 2), SrcBuf1, DstBuf2);
TransferStatus2 = Verif_mem((BufferSize / 2), SrcBuf2, DstBuf1);
/* TransferStatus1, TransferStatus2 = PASSED, if the data transmitted and received
are correct */
/* TransferStatus1, TransferStatus2 = FAILED, if the data transmitted and received
are different */
while (1);
}
/**
* @brief Main program.
* @param None
* @retval None
*/
int main (void)
{
uint8_t DataByte=0x01;
static uint8_t ReciveByte[16];
uint32_t i;
/* Enables the HSI clock on PORTB,PORTD */
RST_CLK_PCLKcmd(RST_CLK_PCLK_PORTB,ENABLE);
RST_CLK_PCLKcmd(RST_CLK_PCLK_PORTD,ENABLE);
/* Fill PortInit structure*/
PortInit.PORT_PULL_UP = PORT_PULL_UP_OFF;
PortInit.PORT_PULL_DOWN = PORT_PULL_DOWN_OFF;
PortInit.PORT_PD_SHM = PORT_PD_SHM_OFF;
PortInit.PORT_PD = PORT_PD_DRIVER;
PortInit.PORT_GFEN = PORT_GFEN_OFF;
PortInit.PORT_FUNC = PORT_FUNC_ALTER;
PortInit.PORT_SPEED = PORT_SPEED_MAXFAST;
PortInit.PORT_MODE = PORT_MODE_DIGITAL;
/* Configure PORTB pins 5 (UART1_TX) as output */
PortInit.PORT_OE = PORT_OE_OUT;
PortInit.PORT_Pin = PORT_Pin_5;
PORT_Init(MDR_PORTB, &PortInit);
/* Configure PORTB pins 6 (UART1_RX) as input */
PortInit.PORT_OE = PORT_OE_IN;
PortInit.PORT_Pin = PORT_Pin_6;
PORT_Init(MDR_PORTB, &PortInit);
/* Configure PORTD pins 1 (UART2_TX) as output */
PortInit.PORT_OE = PORT_OE_OUT;
PortInit.PORT_Pin = PORT_Pin_1;
PORT_Init(MDR_PORTD, &PortInit);
/* Configure PORTD pins 0 (UART1_RX) as input */
PortInit.PORT_OE = PORT_OE_IN;
PortInit.PORT_Pin = PORT_Pin_0;
PORT_Init(MDR_PORTD, &PortInit);
/* Select HSI/2 as CPU_CLK source*/
RST_CLK_CPU_PLLconfig (RST_CLK_CPU_PLLsrcHSIdiv2,0);
/* Enables the CPU_CLK clock on UART1,UART2 */
RST_CLK_PCLKcmd(RST_CLK_PCLK_UART1, ENABLE);
RST_CLK_PCLKcmd(RST_CLK_PCLK_UART2, ENABLE);
/* Set the HCLK division factor = 1 for UART1,UART2*/
UART_BRGInit(MDR_UART1, UART_HCLKdiv1);
UART_BRGInit(MDR_UART2, UART_HCLKdiv1);
/* Initialize UART_InitStructure */
UART_InitStructure.UART_BaudRate = 115000;
UART_InitStructure.UART_WordLength = UART_WordLength8b;
UART_InitStructure.UART_StopBits = UART_StopBits1;
UART_InitStructure.UART_Parity = UART_Parity_No;
UART_InitStructure.UART_FIFOMode = UART_FIFO_ON;
UART_InitStructure.UART_HardwareFlowControl = UART_HardwareFlowControl_RXE | UART_HardwareFlowControl_TXE;
/* Configure UART1 parameters*/
UART_Init (MDR_UART1,&UART_InitStructure);
/* Configure DMA for UART1*/
UART_DMAConfig (MDR_UART1, UART_IT_FIFO_LVL_12words, UART_IT_FIFO_LVL_12words);
UART_DMACmd(MDR_UART1, UART_DMA_TXE | UART_DMA_RXE | UART_DMA_ONERR, ENABLE);
/* Enables UART1 peripheral */
UART_Cmd(MDR_UART1,ENABLE);
/* Configure UART2 parameters*/
UART_Init (MDR_UART2,&UART_InitStructure);
/* Configure DMA for UART2*/
UART_DMAConfig (MDR_UART2, UART_IT_FIFO_LVL_12words, UART_IT_FIFO_LVL_12words);
UART_DMACmd(MDR_UART2, UART_DMA_TXE | UART_DMA_RXE | UART_DMA_ONERR, ENABLE);
/* Enables UART2 peripheral */
UART_Cmd(MDR_UART2,ENABLE);
while (1)
{
/* Check TXFE flag */
while (UART_GetFlagStatus (MDR_UART1, UART_FLAG_TXFE)!= SET)
{
}
/* Send Data from UART1 */
for (i=0;i<16;i++)
{
UART_SendData (MDR_UART1, (uint16_t)(i+16*DataByte));
}
/* Check RXFF flag */
while (UART_GetFlagStatus (MDR_UART2, UART_FLAG_RXFF)!= SET)
{
}
/* Recive data */
for (i=0;i<16;i++)
{
ReciveByte[i] = UART_ReceiveData (MDR_UART2);
}
/* Increment Data */
DataByte++;
}
}
