LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "ucg.h"
//static const uint8_t ucg_dev_ssd1351_132x132_init_seq[] PROGMEM = {
static const ucg_pgm_uint8_t ucg_tft_132x132_pcf8833_init_seq_OBSOLETE[] = {
UCG_CFG_CD(0,1), /* DC=0 for command mode, DC=1 for data and args */
UCG_RST(1),
UCG_CS(1), /* disable chip */
UCG_DLY_MS(5),
UCG_RST(0),
UCG_DLY_MS(5),
UCG_RST(1),
UCG_DLY_MS(50),
UCG_CS(0), /* enable chip */
UCG_C10(0x01), /* reset */
UCG_DLY_MS(199),
UCG_C10(0x011), /* sleep out */
UCG_DLY_MS(10),
UCG_C10(0x038), /* idle mode off */
//UCG_C10(0x0b5), /* mirror */
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "ucg.h"
/* the following code is from the UG2828GDEAF02 Datasheet */
static const ucg_pgm_uint8_t aaa_ucg_univision_seps225_init_seq[] = {
UCG_CFG_CD(0,1), /* First arg: level for commands, Second arg: level for command arguments */
UCG_RST(1),
UCG_CS(1), /* disable chip */
UCG_DLY_MS(1),
UCG_RST(0),
UCG_DLY_MS(1),
UCG_RST(1),
UCG_DLY_MS(50),
UCG_CS(0), /* enable chip */
UCG_C11(0x002, 0x001), /* OSC_CTL: external resistor, internal OSC */
UCG_C11(0x004, 0x000), /* REDUCE_CURRENT: normal operation, no current reduction */
UCG_C11(0x003, 0x030), /* CLK_DIV: 90Hz, ratio 1 */
UCG_C11(0x008, 0x000), /* Precharge time red */
UCG_C11(0x009, 0x000), /* Precharge time green */
UCG_C11(0x00a, 0x000), /* Precharge time blue */
UCG_C11(0x00b, 0x000), /* Precharge current red */
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "ucg.h"
static const ucg_pgm_uint8_t ucg_univision_ssd1331_init_seq[] = {
UCG_CFG_CD(0,0), /* First arg: level for commands, Second arg: level for command arguments */
UCG_RST(1),
UCG_CS(1), /* disable chip */
UCG_DLY_MS(1),
UCG_RST(0),
UCG_DLY_MS(1),
UCG_RST(1),
UCG_DLY_MS(50),
UCG_CS(0), /* enable chip */
//UCG_C11(0x0fd, 0x012), /* Unlock normal commands, reset default: unlocked */
UCG_C10(0x0ae), /* Set Display Off */
//UCG_C10(0x0af), /* Set Display On */
UCG_C11(0x0a0, 0x0b2), /* 65k format 2, RGB Mode */
UCG_C11(0x0a1, 0x000), /* Set Display Start Line */
UCG_C11(0x0a2, 0x000), /* Set Display Offset */
UCG_C11(0x0a8, 0x03f), /* Multiplex, reset value = 0x03f */
UCG_C11(0x0ad, 0x08e), /* select supply (must be set before 0x0af) */
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "ucg.h"
//static const uint8_t ucg_dev_ssd1351_128x128_init_seq[] PROGMEM = {
static const ucg_pgm_uint8_t ucg_tft_240x320_ili9325_spi_init_seq[] = {
UCG_CFG_CD(0,1), /* DC=0 for command mode, DC=1 for data and args */
UCG_RST(1),
UCG_CS(1), /* disable chip */
UCG_DLY_MS(5),
UCG_RST(0),
UCG_DLY_MS(5),
UCG_RST(1),
UCG_DLY_MS(50),
UCG_CS(0), /* enable chip */
UCG_DLY_MS(1), /* delay 1 ms */
UCG_C12(0x001,0x001, 0x000), /* Driver Output Control, bits 8 & 10 */
UCG_C12(0x002, 0x007, 0x000), /* LCD Driving Wave Control, bit 9: Set line inversion */
//UCG_C12(0x003, 0x010, 0x030), /* Entry Mode, GRAM write direction and BGR (Bit 12)=1 (16 bit transfer, 65K Mode)*/
UCG_C12(0x003, 0xc0 | 0x010, 0x030), /* Entry Mode, GRAM write direction and BGR (Bit 12)=1, set TRI (Bit 15) and DFM (Bit 14) --> three byte transfer */
//UCG_C12(0x004, 0x000, 0x000), /* Resize register, all 0: no resize */
UCG_C12(0x008, 0x002, 0x007), /* Display Control 2: set the back porch and front porch */
//UCG_C12(0x009, 0x000, 0x000), /* Display Control 3: normal scan */
//UCG_C12(0x00a, 0x000, 0x000), /* Display Control 4: set to "no FMARK output" */
UCG_C12(0x00c, 0x000, 0x000), /* RGB Display Interface Control 1, RIM=10 (3x6 Bit), 12 Jan 14: RIM=00 */
