bool run_a_cycle(memory_c *main_memory){ // please modify run_a_cycle function argument /** NEW-LAB2 */
int i = 0;
for (;;) {
if (((KNOB(KNOB_MAX_SIM_COUNT)->getValue() && (cycle_count >= KNOB(KNOB_MAX_SIM_COUNT)->getValue())) ||
(KNOB(KNOB_MAX_INST_COUNT)->getValue() && (retired_instruction >= KNOB(KNOB_MAX_INST_COUNT)->getValue())) || (sim_end_condition))) {
// please complete sim_end_condition
// finish the simulation
print_heartbeat();
print_stats();
return TRUE;
}
cycle_count++;
if (!(cycle_count%5000))
{
print_heartbeat();
}
main_memory->run_a_cycle(); // *NEW-LAB2
WB_stage(main_memory);
MEM_stage(main_memory); // please modify MEM_stage function argument /** NEW-LAB2 */
EX_stage();
ID_stage();
FE_stage();
if (KNOB(KNOB_PRINT_PIPE_FREQ)->getValue() && !(cycle_count%KNOB(KNOB_PRINT_PIPE_FREQ)->getValue())) print_pipeline();
}
return TRUE;
}
bool run_a_cycle(){
int i = 0;
for (;;) {
if (((KNOB(KNOB_MAX_SIM_COUNT)->getValue() && (cycle_count >= KNOB(KNOB_MAX_SIM_COUNT)->getValue())) || (KNOB(KNOB_MAX_INST_COUNT)->getValue() && (retired_instruction >= KNOB(KNOB_MAX_INST_COUNT)->getValue())) || (sim_end_condition)))
{
// please complete sim_end_condition
// finish the simulation
print_heartbeat();
print_stats();
return TRUE;
}
cycle_count++;
if (!(cycle_count%5000))
{
print_heartbeat();
}
WB_stage();
MEM_stage();
EX_stage();
ID_stage();
FE_stage();
if (KNOB(KNOB_PRINT_PIPE_FREQ)->getValue() && !(cycle_count%KNOB(KNOB_PRINT_PIPE_FREQ)->getValue())) print_pipeline();
}
return TRUE;
}
int main()
{
if(!load_image()){
puts("Cannot load the images");
return 0;
}
init();
cycle = 0;
error_halt = false;
int i = PC/4;
while( i < MEM_SIZE/4){
haltCnt = 0;
print_cycle();
/*if( (imem[i]>>26)==HALT){
haltCnt++;
printf("cycle: %d %s %08X\n",cycle, instr_toString(imem[i]), imem[i]);
}*/
load_hazard = false;
cycle++;
WB_stage();
DM_stage();
EX_stage();
ID_stage();
IF_stage(&i);
updateReg();
print_pipeline_stage();
if(error_halt || haltCnt==5){
break;
}
}
//printf("%08X %08X %08X\n", imem[0x28/4], imem[0x34/4], imem[0x38/4]);
// printf("haltCnt:%d error_halt:%d\n",haltCnt, error_halt);
// printf("%d\n",cycle);
fclose(snapshot);
fclose(error_dump);
return 0;
}
bool run_a_cycle(memory_c *main_memory){
long int retired_instruction_cpy=0;
int terminate_count=0;
bool terminate_program=false;
for (;;) {
if ((KNOB(KNOB_MAX_SIM_COUNT)->getValue() && (cycle_count >= KNOB(KNOB_MAX_SIM_COUNT)->getValue())) ||
(KNOB(KNOB_MAX_INST_COUNT)->getValue() && (retired_instruction >= KNOB(KNOB_MAX_INST_COUNT)->getValue())) || (sim_end_condition) || terminate_program) {
// please complete sim_end_condition
// finish the simulation
print_heartbeat();
print_stats();
return TRUE;
}
cycle_count++;
if (!(cycle_count%5000)) {
print_heartbeat();
}
/*section to terminate the program if it fails to exit normally*/
if(terminate_count>1000)
{
if(retired_instruction_cpy==retired_instruction)
terminate_program=true;
else
{
retired_instruction_cpy=retired_instruction;
terminate_count=0;
}
}
else
terminate_count++;
/*section to terminate the program if it fails to exit normally*/
main_memory->run_a_cycle(); // *NEW-LAB2
WB_stage();
MEM_stage(main_memory); // please modify MEM_stage function argument /** NEW-LAB2 */
EX_stage();
ID_stage();
FE_stage();
if(trace_over && main_memory->all_mem_structures_empty() && pipeline_latches_empty())
sim_end_condition = true;
if (KNOB(KNOB_PRINT_PIPE_FREQ)->getValue() && !(cycle_count%KNOB(KNOB_PRINT_PIPE_FREQ)->getValue())) print_pipeline();
}
return TRUE;
}