static void write_reg(char *para) { char count=2; vout_reg_t reg; memcpy(®, parse_para(para+1,&count), sizeof(vout_reg_t)); if (((*para) == 'm') || ((*para) == 'M')){ WRITE_MPEG_REG(reg.addr,reg.value); amlog_level(LOG_LEVEL_HIGH,"[0x%x] = 0x%x 0x%x\r\n", CBUS_REG_ADDR(reg.addr), reg.value, READ_MPEG_REG(reg.addr)); } else if (((*para) == 'p') || ((*para) == 'P')) { if (APB_REG_ADDR_VALID(reg.addr)){ WRITE_APB_REG(reg.addr,reg.value); amlog_level(LOG_LEVEL_HIGH,"[0x%x] = 0x%x 0x%x\r\n", APB_REG_ADDR(reg.addr), reg.value, READ_APB_REG(reg.addr)); } } else if (((*para) == 'h') || ((*para) == 'H')) { WRITE_AHB_REG(reg.addr,reg.value); amlog_level(LOG_LEVEL_HIGH,"[0x%x] = 0x%x 0x%x\r\n", AHB_REG_ADDR(reg.addr), reg.value, READ_AHB_REG(reg.addr)); } }
void am_set_regmap(unsigned int cnt, struct am_reg_s *p) { unsigned short i; unsigned int temp = 0; for (i=0; i<cnt; i++) { switch (p->type) { case REG_TYPE_PHY: #ifdef PQ_DEBUG_EN pr_info("%s: bus type: phy..............\n", __func__); #endif break; case REG_TYPE_CBUS: if (p->mask == 0xffffffff) WRITE_CBUS_REG(p->addr, p->val); else WRITE_CBUS_REG(p->addr, (READ_CBUS_REG(p->addr) & (~p->mask)) | (p->val & p->mask)); #ifdef PQ_DEBUG_EN pr_info("%s: cbus: Reg0x%x = 0x%x...............\n", __func__, p->addr, (p->val & p->mask)); #endif break; case REG_TYPE_APB: if (p->mask == 0xffffffff) WRITE_APB_REG(p->addr, p->val); else WRITE_APB_REG(p->addr, (READ_APB_REG(p->addr) & (~p->mask)) | (p->val & p->mask)); #ifdef PQ_DEBUG_EN pr_info("%s: apb bus: Reg0x%x = 0x%x...............\n", __func__, p->addr, (p->val & p->mask)); #endif break; case REG_TYPE_MPEG: if (p->mask == 0xffffffff) WRITE_MPEG_REG(p->addr, p->val); else WRITE_MPEG_REG(p->addr, (READ_MPEG_REG(p->addr) & (~p->mask)) | (p->val & p->mask)); #ifdef PQ_DEBUG_EN pr_info("%s: mpeg: Reg0x%x = 0x%x...............\n", __func__, p->addr, (p->val & p->mask)); #endif break; case REG_TYPE_AXI: if (p->mask == 0xffffffff) WRITE_AXI_REG(p->addr, p->val); else WRITE_AXI_REG(p->addr, (READ_AXI_REG(p->addr) & (~p->mask)) | (p->val & p->mask)); #ifdef PQ_DEBUG_EN pr_info("%s: axi: Reg0x%x = 0x%x...............\n", __func__, p->addr, (p->val & p->mask)); #endif break; case REG_TYPE_AHB: if (p->mask == 0xffffffff) WRITE_AHB_REG(p->addr, p->val); else WRITE_AHB_REG(p->addr, (READ_AHB_REG(p->addr) & (~p->mask)) | (p->val & p->mask)); #ifdef PQ_DEBUG_EN pr_info("%s: ahb: Reg0x%x = 0x%x...............\n", __func__, p->addr, (p->val & p->mask)); #endif break; case REG_TYPE_INDEX_VPPCHROMA: WRITE_CBUS_REG(VPP_CHROMA_ADDR_PORT, p->addr); if (p->mask == 0xffffffff) { WRITE_CBUS_REG(VPP_CHROMA_DATA_PORT, p->val); } else { temp = READ_CBUS_REG(VPP_CHROMA_DATA_PORT); WRITE_CBUS_REG(VPP_CHROMA_ADDR_PORT, p->addr); WRITE_CBUS_REG(VPP_CHROMA_DATA_PORT, (temp & (~p->mask)) | (p->val & p->mask)); } #ifdef PQ_DEBUG_EN pr_info("%s: vppchroma: 0x1d70:port0x%x = 0x%x...............\n", __func__, p->addr, (p->val & p->mask)); #endif break; case REG_TYPE_INDEX_GAMMA: #ifdef PQ_DEBUG_EN pr_info("%s: bus type: REG_TYPE_INDEX_GAMMA..............\n", __func__); #endif break; case VALUE_TYPE_CONTRAST_BRIGHTNESS: #ifdef PQ_DEBUG_EN pr_info("%s: bus type: VALUE_TYPE_CONTRAST_BRIGHTNESS..............\n", __func__); #endif break; case REG_TYPE_INDEX_VPP_COEF: if (((p->addr&0xf) == 0)||((p->addr&0xf) == 0x8)) { WRITE_CBUS_REG(VPP_CHROMA_ADDR_PORT, p->addr); WRITE_CBUS_REG(VPP_CHROMA_DATA_PORT, p->val); } else { WRITE_CBUS_REG(VPP_CHROMA_DATA_PORT, p->val); } #ifdef PQ_DEBUG_EN pr_info("%s: vppcoef: 0x1d70:port0x%x = 0x%x...............\n", __func__, p->addr, (p->val & p->mask)); #endif break; default: pr_info("%s: bus type error!!!bustype = 0x%x................\n", __func__, p->type); break; } p++; } return; }
void analog_switch(int flag) { int i; unsigned reg_value = 0; if (flag) { printf("analog on\n"); SET_CBUS_REG_MASK(AM_ANALOG_TOP_REG0, 1 << 1); // set 0x206e bit[1] 1 to power on top analog for (i = 0; i < ANALOG_COUNT; i++) { if (analog_regs[i].enable && (analog_regs[i].set_bits || analog_regs[i].clear_bits)) { if (analog_regs[i].enable == 1) { WRITE_CBUS_REG(analog_regs[i].reg_addr, analog_regs[i].reg_value); } else if (analog_regs[i].enable == 2) { WRITE_APB_REG(analog_regs[i].reg_addr, analog_regs[i].reg_value); } else if (analog_regs[i].enable == 3) { WRITE_AHB_REG(analog_regs[i].reg_addr, analog_regs[i].reg_value); } } } } else { printf("analog off\n"); for (i = 0; i < ANALOG_COUNT; i++) { if (analog_regs[i].enable && (analog_regs[i].set_bits || analog_regs[i].clear_bits)) { if (analog_regs[i].enable == 1) { analog_regs[i].reg_value = READ_CBUS_REG(analog_regs[i].reg_addr); printf("%s(0x%x):0x%x", analog_regs[i].name, CBUS_REG_ADDR(analog_regs[i].reg_addr), analog_regs[i].reg_value); if (analog_regs[i].clear_bits) { CLEAR_CBUS_REG_MASK(analog_regs[i].reg_addr, analog_regs[i].clear_bits); printf(" & ~0x%x", analog_regs[i].clear_bits); } if (analog_regs[i].set_bits) { SET_CBUS_REG_MASK(analog_regs[i].reg_addr, analog_regs[i].set_bits); printf(" | 0x%x", analog_regs[i].set_bits); } reg_value = READ_CBUS_REG(analog_regs[i].reg_addr); printf(" = 0x%x\n", reg_value); } else if (analog_regs[i].enable == 2) { analog_regs[i].reg_value = READ_APB_REG(analog_regs[i].reg_addr); printf("%s(0x%x):0x%x", analog_regs[i].name, APB_REG_ADDR(analog_regs[i].reg_addr), analog_regs[i].reg_value); if (analog_regs[i].clear_bits) { CLEAR_APB_REG_MASK(analog_regs[i].reg_addr, analog_regs[i].clear_bits); printf(" & ~0x%x", analog_regs[i].clear_bits); } if (analog_regs[i].set_bits) { SET_APB_REG_MASK(analog_regs[i].reg_addr, analog_regs[i].set_bits); printf(" | 0x%x", analog_regs[i].set_bits); } reg_value = READ_APB_REG(analog_regs[i].reg_addr); printf(" = 0x%x\n", reg_value); } else if (analog_regs[i].enable == 3) { analog_regs[i].reg_value = READ_AHB_REG(analog_regs[i].reg_addr); printf("%s(0x%x):0x%x", analog_regs[i].name, AHB_REG_ADDR(analog_regs[i].reg_addr), analog_regs[i].reg_value); if (analog_regs[i].clear_bits) { CLEAR_AHB_REG_MASK(analog_regs[i].reg_addr, analog_regs[i].clear_bits); printf(" & ~0x%x", analog_regs[i].clear_bits); } if (analog_regs[i].set_bits) { SET_AHB_REG_MASK(analog_regs[i].reg_addr, analog_regs[i].set_bits); printf(" | 0x%x", analog_regs[i].set_bits); } reg_value = READ_AHB_REG(analog_regs[i].reg_addr); printf(" = 0x%x\n", reg_value); } } } CLEAR_CBUS_REG_MASK(AM_ANALOG_TOP_REG0, 1 << 1); // set 0x206e bit[1] 0 to shutdown top analog } }
void am_set_regmap(struct am_regs_s *p) { unsigned short i; unsigned int temp = 0; for (i=0; i<p->length; i++) { switch (p->am_reg[i].type) { case REG_TYPE_PHY: #ifdef PQ_DEBUG_EN pr_info("%s: bus type: phy..............\n", __func__); #endif break; case REG_TYPE_CBUS: if (p->am_reg[i].mask == 0xffffffff) WRITE_CBUS_REG(p->am_reg[i].addr, p->am_reg[i].val); else WRITE_CBUS_REG(p->am_reg[i].addr, (READ_CBUS_REG(p->am_reg[i].addr) & (~(p->am_reg[i].mask))) | (p->am_reg[i].val & p->am_reg[i].mask)); #ifdef PQ_DEBUG_EN pr_info("%s: cbus: Reg0x%x(%u)=0x%x(%u)val=%x(%u)mask=%x(%u)\n", __func__, p->am_reg[i].addr,p->am_reg[i].addr, (p->am_reg[i].val & p->am_reg[i].mask),(p->am_reg[i].val & p->am_reg[i].mask), p->am_reg[i].val,p->am_reg[i].val,p->am_reg[i].mask,p->am_reg[i].mask); #endif break; case REG_TYPE_APB: if (p->am_reg[i].mask == 0xffffffff) WRITE_APB_REG(p->am_reg[i].addr, p->am_reg[i].val); else WRITE_APB_REG(p->am_reg[i].addr, (READ_APB_REG(p->am_reg[i].addr) & (~(p->am_reg[i].mask))) | (p->am_reg[i].val & p->am_reg[i].mask)); #ifdef PQ_DEBUG_EN pr_info("%s: apb: Reg0x%x(%u)=0x%x(%u)val=%x(%u)mask=%x(%u)\n", __func__, p->am_reg[i].addr,p->am_reg[i].addr, (p->am_reg[i].val & p->am_reg[i].mask),(p->am_reg[i].val & p->am_reg[i].mask), p->am_reg[i].val,p->am_reg[i].val,p->am_reg[i].mask,p->am_reg[i].mask); #endif break; case REG_TYPE_MPEG: if (p->am_reg[i].mask == 0xffffffff) WRITE_MPEG_REG(p->am_reg[i].addr, p->am_reg[i].val); else WRITE_MPEG_REG(p->am_reg[i].addr, (READ_MPEG_REG(p->am_reg[i].addr) & (~(p->am_reg[i].mask))) | (p->am_reg[i].val & p->am_reg[i].mask)); #ifdef PQ_DEBUG_EN pr_info("%s: mpeg: Reg0x%x(%u)=0x%x(%u)val=%x(%u)mask=%x(%u)\n", __func__, p->am_reg[i].addr,p->am_reg[i].addr, (p->am_reg[i].val & p->am_reg[i].mask),(p->am_reg[i].val & p->am_reg[i].mask), p->am_reg[i].val,p->am_reg[i].val,p->am_reg[i].mask,p->am_reg[i].mask); #endif break; case REG_TYPE_AXI: if (p->am_reg[i].mask == 0xffffffff) WRITE_AXI_REG(p->am_reg[i].addr, p->am_reg[i].val); else WRITE_AXI_REG(p->am_reg[i].addr, (READ_AXI_REG(p->am_reg[i].addr) & (~(p->am_reg[i].mask))) | (p->am_reg[i].val & p->am_reg[i].mask)); #ifdef PQ_DEBUG_EN pr_info("%s: axi: Reg0x%x(%u)=0x%x(%u)val=%x(%u)mask=%x(%u)\n", __func__, p->am_reg[i].addr,p->am_reg[i].addr, (p->am_reg[i].val & p->am_reg[i].mask),(p->am_reg[i].val & p->am_reg[i].mask), p->am_reg[i].val,p->am_reg[i].val,p->am_reg[i].mask,p->am_reg[i].mask); #endif break; case REG_TYPE_AHB: if (p->am_reg[i].mask == 0xffffffff) WRITE_AHB_REG(p->am_reg[i].addr, p->am_reg[i].val); else WRITE_AHB_REG(p->am_reg[i].addr, (READ_AHB_REG(p->am_reg[i].addr) & (~(p->am_reg[i].mask))) | (p->am_reg[i].val & p->am_reg[i].mask)); #ifdef PQ_DEBUG_EN pr_info("%s: ahb: Reg0x%x(%u)=0x%x(%u)val=%x(%u)mask=%x(%u)\n", __func__, p->am_reg[i].addr,p->am_reg[i].addr, (p->am_reg[i].val & p->am_reg[i].mask),(p->am_reg[i].val & p->am_reg[i].mask), p->am_reg[i].val,p->am_reg[i].val,p->am_reg[i].mask,p->am_reg[i].mask); #endif break; case REG_TYPE_INDEX_VPPCHROMA: WRITE_CBUS_REG(VPP_CHROMA_ADDR_PORT, p->am_reg[i].addr); if (p->am_reg[i].mask == 0xffffffff) { WRITE_CBUS_REG(VPP_CHROMA_DATA_PORT, p->am_reg[i].val); } else { temp = READ_CBUS_REG(VPP_CHROMA_DATA_PORT); WRITE_CBUS_REG(VPP_CHROMA_ADDR_PORT, p->am_reg[i].addr); WRITE_CBUS_REG(VPP_CHROMA_DATA_PORT, (temp & (~(p->am_reg[i].mask))) | (p->am_reg[i].val & p->am_reg[i].mask)); } #ifdef PQ_DEBUG_EN pr_info("%s: chroma: Reg0x%x(%u)=0x%x(%u)val=%x(%u)mask=%x(%u)\n", __func__, p->am_reg[i].addr,p->am_reg[i].addr, (p->am_reg[i].val & p->am_reg[i].mask),(p->am_reg[i].val & p->am_reg[i].mask), p->am_reg[i].val,p->am_reg[i].val,p->am_reg[i].mask,p->am_reg[i].mask); #endif break; case REG_TYPE_INDEX_GAMMA: #ifdef PQ_DEBUG_EN pr_info("%s: bus type: REG_TYPE_INDEX_GAMMA..............\n", __func__); #endif break; case VALUE_TYPE_CONTRAST_BRIGHTNESS: #ifdef PQ_DEBUG_EN pr_info("%s: bus type: VALUE_TYPE_CONTRAST_BRIGHTNESS..............\n", __func__); #endif break; case REG_TYPE_INDEX_VPP_COEF: if (((p->am_reg[i].addr&0xf) == 0)||((p->am_reg[i].addr&0xf) == 0x8)) { WRITE_CBUS_REG(VPP_CHROMA_ADDR_PORT, p->am_reg[i].addr); WRITE_CBUS_REG(VPP_CHROMA_DATA_PORT, p->am_reg[i].val); } else { WRITE_CBUS_REG(VPP_CHROMA_DATA_PORT, p->am_reg[i].val); } #ifdef PQ_DEBUG_EN pr_info("%s: coef: Reg0x%x(%u)=0x%x(%u)val=%x(%u)mask=%x(%u)\n", __func__, p->am_reg[i].addr,p->am_reg[i].addr, (p->am_reg[i].val & p->am_reg[i].mask),(p->am_reg[i].val & p->am_reg[i].mask), p->am_reg[i].val,p->am_reg[i].val,p->am_reg[i].mask,p->am_reg[i].mask); #endif break; default: #ifdef PQ_DEBUG_EN pr_info("%s: bus type error!!!bustype = 0x%x................\n", __func__, p->am_reg[i].type); #endif break; } } return; }