/* -------------------------------------------------------------------------
  Disable interrupt in the card hardware
  ------------------------------------------------------------------------- */
static void disable_pri_interrupt (PISDN_ADAPTER IoAdapter) {
 dword volatile __iomem *cfgReg = (dword volatile __iomem *)DIVA_OS_MEM_ATTACH_CFG(IoAdapter) ;
 WRITE_DWORD(&cfgReg[3], 0);
 WRITE_DWORD(&cfgReg[1], 0);
 WRITE_DWORD(&cfgReg[0], (dword)(~0x03E00000)) ;
 DIVA_OS_MEM_DETACH_CFG(IoAdapter, cfgReg);
}
Exemple #2
0
// flatten_header: serialize a header into a pre-allocated byte array
// at a given offset. The offset is updated as bytes are written.  If
// offset pointer is NULL this function starts at offset 0.
kssl_error_code flatten_header(kssl_header *header, // Pointer to kssl_header
                               // to serialize
                               BYTE *bytes,         // Byte buffer to write
                               // into (must be allocated
                               // and have sufficient
                               // space for a
                               // kssl_header)
                               int *offset) {       // (optional) offset into
    // bytes to
    int local_offset = 0;
    // write to
    if (bytes == NULL || header == NULL) {
        return KSSL_ERROR_INTERNAL;
    }

    if (offset != NULL) {
        local_offset = *offset;
    }

    WRITE_BYTE(bytes, local_offset, header->version_maj);
    WRITE_BYTE(bytes, local_offset, header->version_min);
    WRITE_WORD(bytes, local_offset, header->length);
    WRITE_DWORD(bytes, local_offset, header->id);

    if (offset != NULL) {
        *offset = local_offset;
    }

    return KSSL_ERROR_NONE;
}
Exemple #3
0
// PwrSmu9MessageService: Smu9 message is used for reading counter table base address.
static bool PwrSmu9MessageService(Smu9Interface* pSmu, uint32 msgId, uint32* arg, uint32* pData, uint32 retry)
{
    bool ret = false;
    volatile uint32 repeatCnt = retry;
    uint64 res = 0;

    // Write 0 to resp to check if it is busy
    WRITE_DWORD(pSmu->m_msg.m_resp, 0);

    // Write argument if any
    if (NULL != arg)
    {
        WRITE_DWORD(pSmu->m_msg.m_arg, *arg);
    }

    // Write message id
    WRITE_DWORD(pSmu->m_msg.m_msg, msgId);

    // Wait for completion
    do
    {
        res = READ_DWORD(pSmu->m_msg.m_resp);

        if (res & SMC_RESULT_OK)
        {
            ret = true;
        }
    }
    while ((false == ret) && --repeatCnt);

    // Read the result
    if ((true == ret) && (NULL != pData))
    {
        *pData = (uint32)READ_DWORD(pSmu->m_msg.m_arg);
    }

    return ((true == ret) && (NULL != pData)) ? true : false;
}
Exemple #4
0
// PwrSmu9ReadIndexDataMapping: Index and data pair mapping for reading soft register values
static void PwrSmu9ReadIndexDataMapping(Smu9Interface* pSmu, uint64 reg, uint32* pValue)
{
    if (SMU_REG_ADDRESS_UNDEFINED != reg)
    {
        // use indirect mapping
        uint32* Reg = (uint32*)pSmu->m_gmmxPair.m_index;
        WRITE_DWORD(Reg, (uint32)reg);
        *pValue = READ_DWORD((uint32*)pSmu->m_gmmxPair.m_data);
    }
    else
    {
        *pValue = 0xDEADBEEF;
    }
}
/* -------------------------------------------------------------------------
  Stop Card Hardware
  ------------------------------------------------------------------------- */
static void stop_pri_hardware (PISDN_ADAPTER IoAdapter) {
 dword i;
 byte __iomem *p;
 dword volatile __iomem *cfgReg = (void __iomem *)DIVA_OS_MEM_ATTACH_CFG(IoAdapter);
 WRITE_DWORD(&cfgReg[3], 0);
 WRITE_DWORD(&cfgReg[1], 0);
 DIVA_OS_MEM_DETACH_CFG(IoAdapter, cfgReg);
 IoAdapter->a.ram_out (&IoAdapter->a, &RAM->SWReg, SWREG_HALT_CPU) ;
 i = 0 ;
 while ( (i < 100) && (IoAdapter->a.ram_in (&IoAdapter->a, &RAM->SWReg) != 0) )
 {
  diva_os_wait (1) ;
  i++ ;
 }
 DBG_TRC(("%s: PRI stopped (%d)", IoAdapter->Name, i))
 cfgReg = (void __iomem *)DIVA_OS_MEM_ATTACH_CFG(IoAdapter);
 WRITE_DWORD(&cfgReg[0],((dword)(~0x03E00000)));
 DIVA_OS_MEM_DETACH_CFG(IoAdapter, cfgReg);
 diva_os_wait (1) ;
 p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
 WRITE_BYTE(p, _MP_RISC_RESET | _MP_LED1 | _MP_LED2);
 DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
}
/* --------------------------------------------------------------------------
  PRI Adapter interrupt Service Routine
   -------------------------------------------------------------------------- */
static int pri_ISR (struct _ISDN_ADAPTER* IoAdapter) {
 byte __iomem *cfg = DIVA_OS_MEM_ATTACH_CFG(IoAdapter);
 if ( !(READ_DWORD(cfg) & 0x80000000) ) {
  DIVA_OS_MEM_DETACH_CFG(IoAdapter, cfg);
  return (0) ;
 }
 /*
  clear interrupt line
  */
 WRITE_DWORD(cfg, (dword)~0x03E00000) ;
 DIVA_OS_MEM_DETACH_CFG(IoAdapter, cfg);
 IoAdapter->IrqCount++ ;
 if ( IoAdapter->Initialized )
 {
  diva_os_schedule_soft_isr (&IoAdapter->isr_soft_isr);
 }
 return (1) ;
}
Exemple #7
0
void video_config_init(void)
{
/*     gettermcap(0); */

    switch (config.cardtype) {
    case CARD_MDA:
	{
	    configuration |= (MDA_CONF_SCREEN_MODE);
	    video_mode = MDA_INIT_SCREEN_MODE;
	    phys_text_base = MDA_PHYS_TEXT_BASE;
	    virt_text_base = MDA_VIRT_TEXT_BASE;
	    video_combo = MDA_VIDEO_COMBO;
	    video_subsys = MDA_VIDEO_SUBSYS;
	    break;
	}
    case CARD_CGA:
	{
	    configuration |= (CGA_CONF_SCREEN_MODE);
	    video_mode = CGA_INIT_SCREEN_MODE;
	    phys_text_base = CGA_PHYS_TEXT_BASE;
	    virt_text_base = CGA_VIRT_TEXT_BASE;
	    video_combo = CGA_VIDEO_COMBO;
	    video_subsys = CGA_VIDEO_SUBSYS;

	    break;
	}
    case CARD_EGA:
	{
	    configuration |= (EGA_CONF_SCREEN_MODE);
	    video_mode = EGA_INIT_SCREEN_MODE;
	    phys_text_base = EGA_PHYS_TEXT_BASE;
	    virt_text_base = EGA_VIRT_TEXT_BASE;
	    video_combo = EGA_VIDEO_COMBO;
	    video_subsys = EGA_VIDEO_SUBSYS;
	    break;
	}
    case CARD_VGA:
	{
	    configuration |= (VGA_CONF_SCREEN_MODE);
	    video_mode = VGA_INIT_SCREEN_MODE;
	    phys_text_base = VGA_PHYS_TEXT_BASE;
	    virt_text_base = VGA_VIRT_TEXT_BASE;
	    video_combo = VGA_VIDEO_COMBO;
	    video_subsys = VGA_VIDEO_SUBSYS;
	    break;
	}
    default:			/* or Terminal, is this correct ? */
	{
	    configuration |= (CGA_CONF_SCREEN_MODE);
	    video_mode = CGA_INIT_SCREEN_MODE;
	    phys_text_base = CGA_PHYS_TEXT_BASE;
	    virt_text_base = CGA_VIRT_TEXT_BASE;
	    video_combo = CGA_VIDEO_COMBO;
	    video_subsys = CGA_VIDEO_SUBSYS;
	    break;
	}
    }

#if 0                 /* FIXME XXX  why/where does config.console get cleared?  */
    if (!config.console) {
	/* NOTE: BIG FAT WARNING !!!
	 *       without this you will reproduceable KILL LINUX
	 *       (seen with Linux-2.0.28)            ^^^^^^^^^^
	 *       This happens in xterm, not console and not xdos.
	 *       I was unable to trace it down, because directly at
	 *       startup you get a black screen and no logs are left
	 *       once you repaired your files system :(
	 *       Though this is a userspace bug, it should not
	 *       kill the kernel IMHO. -- Hans
	 */
	v_printf("VID: not running on console - resetting to terminal mode\n");
	config.console_video = 0;
/*      scr_state.console_no = 0; */
	config.console_keyb = 0;
	config.console_video = 0;
	config.mapped_bios = 0;
	config.vga = 0;
	config.graphics = 0;
	config.console = 0;
	if (config.speaker == SPKR_NATIVE)
	    config.speaker = SPKR_EMULATED;
    }
#endif
    video_page = 0;
    screen_mask = 1 << (((int) phys_text_base - 0xA0000) / 4096);
    screen_adr = SCREEN_ADR(0);
    if (!config.vga) {
	WRITE_BYTE(BIOS_CURRENT_SCREEN_PAGE, 0x0);	/* Current Screen Page */
	WRITE_WORD(BIOS_CURSOR_SHAPE, (configuration & MDA_CONF_SCREEN_MODE) ? 0x0A0B : 0x0607);

	/* This is needed in the video stuff. Grabbed from boot(). */
	if ((configuration & MDA_CONF_SCREEN_MODE) == MDA_CONF_SCREEN_MODE)
	    WRITE_WORD(BIOS_VIDEO_PORT, 0x3b4);		/* base port of CRTC - IMPORTANT! */
	else
	    WRITE_WORD(BIOS_VIDEO_PORT, 0x3d4);		/* base port of CRTC - IMPORTANT! */

	WRITE_BYTE(BIOS_VDU_CONTROL, 9);	/* current 3x8 (x=b or d) value */

	WRITE_BYTE(BIOS_VIDEO_MODE, video_mode);	/* video mode */
	set_video_bios_size();
	WRITE_WORD(BIOS_VIDEO_MEMORY_ADDRESS, 0);	/* offset of current page in buffer */

	WRITE_WORD(BIOS_FONT_HEIGHT, 16);

	/* XXX - these are the values for VGA color!
	   should reflect the real display hardware. */
	WRITE_BYTE(BIOS_VIDEO_INFO_0, 0x60);
	WRITE_BYTE(BIOS_VIDEO_INFO_1, 0xF9);
	WRITE_BYTE(BIOS_VIDEO_INFO_2, 0x51);
	WRITE_BYTE(BIOS_VIDEO_COMBO, video_combo);

	WRITE_DWORD(BIOS_VIDEO_SAVEPTR, 0);	/* pointer to video table */
    }

/*     if (config.console_video && !config.usesX) */
/* 	set_process_control(); */
    if (config.console_video) {
	set_console_video();
    }
/*     if (config.usesX) */
/* 	set_consoleX_video(); */

    video_init();

    reserve_video_memory();
    get_video_ram(0);
}
Exemple #8
0
int mscdex(void)
{
	unsigned char *buf = MK_FP32(_ES, _BX);
	unsigned long dev;
	unsigned seg, strat, intr;
	int error;
	int i;
	char devname[] = "MSCD0001";

	if (numDrives == 0)
		return 0;

	switch (_AL) {
	case 0x00:		/* install check */
		_BX = numDrives;
		if (_BX > 0) {
			int firstdrive = INT_MAX;
			for (i = 0; i < 4; i++) {
				if (cd_drives[i] != -1
				    && cd_drives[i] < firstdrive)
					firstdrive = cd_drives[i];
			}
			_CX = firstdrive;
		}
		break;
	case 0x01:		/* driver info */
		for (i = 0; i < 4; i++) {
			if (cd_drives[i] != -1) {
				/* subunit: always 0 for cdrom.sys */
				WRITE_BYTE(buf, 0x00);
				devname[7] = i + '1';
				WRITE_DWORD(buf + 1, is_dos_device(devname));
				buf += 5;
			}
		};
		break;
	case 0x02:		/* copyright file name */
	case 0x03:		/* abstract file name */
	case 0x04:		/* documentation file name */
		{
			char readbuf[CD_FRAMESIZE];
			if (ReadVTOC(_CX, 0x00, readbuf) == 0) {
				MEMCPY_2DOS(buf, readbuf + 702 + (_AL - 2) * 37,
					    37);
				WRITE_BYTE(buf + 37, 0);
				NOCARRY;
			} else {
				_AX = MSCDEX_ERROR_UNKNOWN_DRIVE;
				CARRY;
			}
			break;
		}
	case 0x05:		/* read vtoc */
		NOCARRY;
		error = ReadVTOC(_CX, _DX, buf);
		if (error) {
			_AL = error;
			CARRY;
		};
		break;
	case 0x08:		/* read sectors */
		NOCARRY;
		error = ReadSectors(_CX, (_SI << 16) + _DI, _DX, buf);
		if (error) {
			_AL = error;
			CARRY;
		};
		break;
	case 0x09:		/* write sectors - not supported */
		_AL = MSCDEX_ERROR_DRIVE_NOT_READY;
		CARRY;
		break;
	case 0x0B:		/* CD-ROM drive check */
		_AX = 0;
		for (i = 0; i < 4; i++)
			if (_CX == cd_drives[i]) {
				_AX = 1;
				break;
			}
		_BX = 0xadad;
		break;
	case 0x0C:
		_BX = (MSCDEX_VERSION_HIGH << 8) + MSCDEX_VERSION_LOW;
		break;
	case 0x0D:		/* get drives */
		for (i = 0; i < 4; i++)
			if (cd_drives[i] != -1)
				WRITE_BYTE(buf++, cd_drives[i]);
		break;
	case 0x0F:		/* Get directory entry */
		CARRY;
		_AX =
		    GetDirectoryEntry(_CL, _CH & 1, buf,
				      SEGOFF2LINEAR(_SI, _DI));
		if (_AX == 0 || _AX == 1)
			NOCARRY;
		break;
	case 0x10:
		{
			int driver = GetDriver(_CX);
			if (driver >= 4)
				break;
			devname[7] = driver + '1';
			dev = is_dos_device(devname);
			seg = dev >> 16;
			dev = SEGOFF2LINEAR(seg, dev & 0xffff);
			strat = READ_WORD(dev + 6);
			intr = READ_WORD(dev + 8);
			fake_call_to(seg, intr);
			fake_call_to(seg, strat);
			break;
		}
	default:
		C_printf("unknown mscdex\n");
		return 0;
	}
	return 1;
}
Exemple #9
0
int x86_reg_write(struct uc_struct *uc, unsigned int regid, const void *value)
{
    CPUState *mycpu = first_cpu;

    switch(uc->mode) {
        default:
            break;

        case UC_MODE_16:
            switch(regid) {
                default: break;
                case UC_X86_REG_ES:
                    X86_CPU(uc, mycpu)->env.segs[R_ES].selector = *(uint16_t *)value;
                    return 0;
                case UC_X86_REG_SS:
                    X86_CPU(uc, mycpu)->env.segs[R_SS].selector = *(uint16_t *)value;
                    return 0;
                case UC_X86_REG_DS:
                    X86_CPU(uc, mycpu)->env.segs[R_DS].selector = *(uint16_t *)value;
                    return 0;
                case UC_X86_REG_FS:
                    X86_CPU(uc, mycpu)->env.segs[R_FS].selector = *(uint16_t *)value;
                    return 0;
                case UC_X86_REG_GS:
                    X86_CPU(uc, mycpu)->env.segs[R_GS].selector = *(uint16_t *)value;
                    return 0;
            }
            // fall-thru
        case UC_MODE_32:
            switch(regid) {
                default:
                    break;
                case UC_X86_REG_CR0 ... UC_X86_REG_CR4:
                    X86_CPU(uc, mycpu)->env.cr[regid - UC_X86_REG_CR0] = *(uint32_t *)value;
                    break;
                case UC_X86_REG_DR0 ... UC_X86_REG_DR7:
                    X86_CPU(uc, mycpu)->env.dr[regid - UC_X86_REG_DR0] = *(uint32_t *)value;
                    break;
                case UC_X86_REG_EFLAGS:
                    X86_CPU(uc, mycpu)->env.eflags = *(uint32_t *)value;
                    X86_CPU(uc, mycpu)->env.eflags0 = *(uint32_t *)value;
                    break;
                case UC_X86_REG_EAX:
                    X86_CPU(uc, mycpu)->env.regs[R_EAX] = *(uint32_t *)value;
                    break;
                case UC_X86_REG_AX:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[R_EAX], *(uint16_t *)value);
                    break;
                case UC_X86_REG_AH:
                    WRITE_BYTE_H(X86_CPU(uc, mycpu)->env.regs[R_EAX], *(uint8_t *)value);
                    break;
                case UC_X86_REG_AL:
                    WRITE_BYTE_L(X86_CPU(uc, mycpu)->env.regs[R_EAX], *(uint8_t *)value);
                    break;
                case UC_X86_REG_EBX:
                    X86_CPU(uc, mycpu)->env.regs[R_EBX] = *(uint32_t *)value;
                    break;
                case UC_X86_REG_BX:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[R_EBX], *(uint16_t *)value);
                    break;
                case UC_X86_REG_BH:
                    WRITE_BYTE_H(X86_CPU(uc, mycpu)->env.regs[R_EBX], *(uint8_t *)value);
                    break;
                case UC_X86_REG_BL:
                    WRITE_BYTE_L(X86_CPU(uc, mycpu)->env.regs[R_EBX], *(uint8_t *)value);
                    break;
                case UC_X86_REG_ECX:
                    X86_CPU(uc, mycpu)->env.regs[R_ECX] = *(uint32_t *)value;
                    break;
                case UC_X86_REG_CX:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[R_ECX], *(uint16_t *)value);
                    break;
                case UC_X86_REG_CH:
                    WRITE_BYTE_H(X86_CPU(uc, mycpu)->env.regs[R_ECX], *(uint8_t *)value);
                    break;
                case UC_X86_REG_CL:
                    WRITE_BYTE_L(X86_CPU(uc, mycpu)->env.regs[R_ECX], *(uint8_t *)value);
                    break;
                case UC_X86_REG_EDX:
                    X86_CPU(uc, mycpu)->env.regs[R_EDX] = *(uint32_t *)value;
                    break;
                case UC_X86_REG_DX:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[R_EDX], *(uint16_t *)value);
                    break;
                case UC_X86_REG_DH:
                    WRITE_BYTE_H(X86_CPU(uc, mycpu)->env.regs[R_EDX], *(uint8_t *)value);
                    break;
                case UC_X86_REG_DL:
                    WRITE_BYTE_L(X86_CPU(uc, mycpu)->env.regs[R_EDX], *(uint8_t *)value);
                    break;
                case UC_X86_REG_ESP:
                    X86_CPU(uc, mycpu)->env.regs[R_ESP] = *(uint32_t *)value;
                    break;
                case UC_X86_REG_SP:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[R_ESP], *(uint16_t *)value);
                    break;
                case UC_X86_REG_EBP:
                    X86_CPU(uc, mycpu)->env.regs[R_EBP] = *(uint32_t *)value;
                    break;
                case UC_X86_REG_BP:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[R_EBP], *(uint16_t *)value);
                    break;
                case UC_X86_REG_ESI:
                    X86_CPU(uc, mycpu)->env.regs[R_ESI] = *(uint32_t *)value;
                    break;
                case UC_X86_REG_SI:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[R_ESI], *(uint16_t *)value);
                    break;
                case UC_X86_REG_EDI:
                    X86_CPU(uc, mycpu)->env.regs[R_EDI] = *(uint32_t *)value;
                    break;
                case UC_X86_REG_DI:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[R_EDI], *(uint16_t *)value);
                    break;
                case UC_X86_REG_EIP:
                    X86_CPU(uc, mycpu)->env.eip = *(uint32_t *)value;
                    // force to quit execution and flush TB
                    uc->quit_request = true;
                    uc_emu_stop(uc);
                    break;
                case UC_X86_REG_IP:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.eip, *(uint16_t *)value);
                    // force to quit execution and flush TB
                    uc->quit_request = true;
                    uc_emu_stop(uc);
                    break;
                case UC_X86_REG_CS:
                    X86_CPU(uc, mycpu)->env.segs[R_CS].selector = *(uint16_t *)value;
                    break;
                case UC_X86_REG_DS:
                    X86_CPU(uc, mycpu)->env.segs[R_DS].selector = *(uint16_t *)value;
                    break;
                case UC_X86_REG_SS:
                    X86_CPU(uc, mycpu)->env.segs[R_SS].selector = *(uint16_t *)value;
                    break;
                case UC_X86_REG_ES:
                    X86_CPU(uc, mycpu)->env.segs[R_ES].selector = *(uint16_t *)value;
                    break;
                case UC_X86_REG_FS:
                    X86_CPU(uc, mycpu)->env.segs[R_FS].selector = *(uint16_t *)value;
                    break;
                case UC_X86_REG_GS:
                    X86_CPU(uc, mycpu)->env.segs[R_GS].selector = *(uint16_t *)value;
                    break;
                case UC_X86_REG_IDTR:
                    X86_CPU(uc, mycpu)->env.idt.limit = (uint16_t)((uc_x86_mmr *)value)->limit;
                    X86_CPU(uc, mycpu)->env.idt.base = (uint32_t)((uc_x86_mmr *)value)->base;
                    break;
                case UC_X86_REG_GDTR:
                    X86_CPU(uc, mycpu)->env.gdt.limit = (uint16_t)((uc_x86_mmr *)value)->limit;
                    X86_CPU(uc, mycpu)->env.gdt.base = (uint32_t)((uc_x86_mmr *)value)->base;
                    break;
                case UC_X86_REG_LDTR:
                    X86_CPU(uc, mycpu)->env.ldt.limit = ((uc_x86_mmr *)value)->limit;
                    X86_CPU(uc, mycpu)->env.ldt.base = (uint32_t)((uc_x86_mmr *)value)->base;
                    X86_CPU(uc, mycpu)->env.ldt.selector = (uint16_t)((uc_x86_mmr *)value)->selector;
                    X86_CPU(uc, mycpu)->env.ldt.flags = ((uc_x86_mmr *)value)->flags;
                    break;
                case UC_X86_REG_TR:
                    X86_CPU(uc, mycpu)->env.tr.limit = ((uc_x86_mmr *)value)->limit;
                    X86_CPU(uc, mycpu)->env.tr.base = (uint32_t)((uc_x86_mmr *)value)->base;
                    X86_CPU(uc, mycpu)->env.tr.selector = (uint16_t)((uc_x86_mmr *)value)->selector;
                    X86_CPU(uc, mycpu)->env.tr.flags = ((uc_x86_mmr *)value)->flags;
                    break;
            }
            break;

#ifdef TARGET_X86_64
        case UC_MODE_64:
            switch(regid) {
                default:
                    break;
                case UC_X86_REG_CR0 ... UC_X86_REG_CR4:
                    X86_CPU(uc, mycpu)->env.cr[regid - UC_X86_REG_CR0] = *(uint64_t *)value;
                    break;
                case UC_X86_REG_DR0 ... UC_X86_REG_DR7:
                    X86_CPU(uc, mycpu)->env.dr[regid - UC_X86_REG_DR0] = *(uint64_t *)value;
                    break;
                case UC_X86_REG_EFLAGS:
                    X86_CPU(uc, mycpu)->env.eflags = *(uint64_t *)value;
                    X86_CPU(uc, mycpu)->env.eflags0 = *(uint64_t *)value;
                    break;
                case UC_X86_REG_RAX:
                    X86_CPU(uc, mycpu)->env.regs[R_EAX] = *(uint64_t *)value;
                    break;
                case UC_X86_REG_EAX:
                    WRITE_DWORD(X86_CPU(uc, mycpu)->env.regs[R_EAX], *(uint32_t *)value);
                    break;
                case UC_X86_REG_AX:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[R_EAX], *(uint16_t *)value);
                    break;
                case UC_X86_REG_AH:
                    WRITE_BYTE_H(X86_CPU(uc, mycpu)->env.regs[R_EAX], *(uint8_t *)value);
                    break;
                case UC_X86_REG_AL:
                    WRITE_BYTE_L(X86_CPU(uc, mycpu)->env.regs[R_EAX], *(uint8_t *)value);
                    break;
                case UC_X86_REG_RBX:
                    X86_CPU(uc, mycpu)->env.regs[R_EBX] = *(uint64_t *)value;
                    break;
                case UC_X86_REG_EBX:
                    WRITE_DWORD(X86_CPU(uc, mycpu)->env.regs[R_EBX], *(uint32_t *)value);
                    break;
                case UC_X86_REG_BX:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[R_EBX], *(uint16_t *)value);
                    break;
                case UC_X86_REG_BH:
                    WRITE_BYTE_H(X86_CPU(uc, mycpu)->env.regs[R_EBX], *(uint8_t *)value);
                    break;
                case UC_X86_REG_BL:
                    WRITE_BYTE_L(X86_CPU(uc, mycpu)->env.regs[R_EBX], *(uint8_t *)value);
                    break;
                case UC_X86_REG_RCX:
                    X86_CPU(uc, mycpu)->env.regs[R_ECX] = *(uint64_t *)value;
                    break;
                case UC_X86_REG_ECX:
                    WRITE_DWORD(X86_CPU(uc, mycpu)->env.regs[R_ECX], *(uint32_t *)value);
                    break;
                case UC_X86_REG_CX:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[R_ECX], *(uint16_t *)value);
                    break;
                case UC_X86_REG_CH:
                    WRITE_BYTE_H(X86_CPU(uc, mycpu)->env.regs[R_ECX], *(uint8_t *)value);
                    break;
                case UC_X86_REG_CL:
                    WRITE_BYTE_L(X86_CPU(uc, mycpu)->env.regs[R_ECX], *(uint8_t *)value);
                    break;
                case UC_X86_REG_RDX:
                    X86_CPU(uc, mycpu)->env.regs[R_EDX] = *(uint64_t *)value;
                    break;
                case UC_X86_REG_EDX:
                    WRITE_DWORD(X86_CPU(uc, mycpu)->env.regs[R_EDX], *(uint32_t *)value);
                    break;
                case UC_X86_REG_DX:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[R_EDX], *(uint16_t *)value);
                    break;
                case UC_X86_REG_DH:
                    WRITE_BYTE_H(X86_CPU(uc, mycpu)->env.regs[R_EDX], *(uint8_t *)value);
                    break;
                case UC_X86_REG_DL:
                    WRITE_BYTE_L(X86_CPU(uc, mycpu)->env.regs[R_EDX], *(uint8_t *)value);
                    break;
                case UC_X86_REG_RSP:
                    X86_CPU(uc, mycpu)->env.regs[R_ESP] = *(uint64_t *)value;
                    break;
                case UC_X86_REG_ESP:
                    WRITE_DWORD(X86_CPU(uc, mycpu)->env.regs[R_ESP], *(uint32_t *)value);
                    break;
                case UC_X86_REG_SP:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[R_ESP], *(uint16_t *)value);
                    break;
                case UC_X86_REG_SPL:
                    WRITE_BYTE_L(X86_CPU(uc, mycpu)->env.regs[R_ESP], *(uint8_t *)value);
                    break;
                case UC_X86_REG_RBP:
                    X86_CPU(uc, mycpu)->env.regs[R_EBP] = *(uint64_t *)value;
                    break;
                case UC_X86_REG_EBP:
                    WRITE_DWORD(X86_CPU(uc, mycpu)->env.regs[R_EBP], *(uint32_t *)value);
                    break;
                case UC_X86_REG_BP:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[R_EBP], *(uint16_t *)value);
                    break;
                case UC_X86_REG_BPL:
                    WRITE_BYTE_L(X86_CPU(uc, mycpu)->env.regs[R_EBP], *(uint8_t *)value);
                    break;
                case UC_X86_REG_RSI:
                    X86_CPU(uc, mycpu)->env.regs[R_ESI] = *(uint64_t *)value;
                    break;
                case UC_X86_REG_ESI:
                    WRITE_DWORD(X86_CPU(uc, mycpu)->env.regs[R_ESI], *(uint32_t *)value);
                    break;
                case UC_X86_REG_SI:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[R_ESI], *(uint16_t *)value);
                    break;
                case UC_X86_REG_SIL:
                    WRITE_BYTE_L(X86_CPU(uc, mycpu)->env.regs[R_ESI], *(uint8_t *)value);
                    break;
                case UC_X86_REG_RDI:
                    X86_CPU(uc, mycpu)->env.regs[R_EDI] = *(uint64_t *)value;
                    break;
                case UC_X86_REG_EDI:
                    WRITE_DWORD(X86_CPU(uc, mycpu)->env.regs[R_EDI], *(uint32_t *)value);
                    break;
                case UC_X86_REG_DI:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[R_EDI], *(uint16_t *)value);
                    break;
                case UC_X86_REG_DIL:
                    WRITE_BYTE_L(X86_CPU(uc, mycpu)->env.regs[R_EDI], *(uint8_t *)value);
                    break;
                case UC_X86_REG_RIP:
                    X86_CPU(uc, mycpu)->env.eip = *(uint64_t *)value;
                    // force to quit execution and flush TB
                    uc->quit_request = true;
                    uc_emu_stop(uc);
                    break;
                case UC_X86_REG_EIP:
                    WRITE_DWORD(X86_CPU(uc, mycpu)->env.eip, *(uint32_t *)value);
                    // force to quit execution and flush TB
                    uc->quit_request = true;
                    uc_emu_stop(uc);
                    break;
                case UC_X86_REG_IP:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.eip, *(uint16_t *)value);
                    // force to quit execution and flush TB
                    uc->quit_request = true;
                    uc_emu_stop(uc);
                    break;
                case UC_X86_REG_CS:
                    X86_CPU(uc, mycpu)->env.segs[R_CS].selector = *(uint16_t *)value;
                    break;
                case UC_X86_REG_DS:
                    X86_CPU(uc, mycpu)->env.segs[R_DS].selector = *(uint16_t *)value;
                    break;
                case UC_X86_REG_SS:
                    X86_CPU(uc, mycpu)->env.segs[R_SS].selector = *(uint16_t *)value;
                    break;
                case UC_X86_REG_ES:
                    X86_CPU(uc, mycpu)->env.segs[R_ES].selector = *(uint16_t *)value;
                    break;
                case UC_X86_REG_FS:
                    X86_CPU(uc, mycpu)->env.segs[R_FS].selector = *(uint16_t *)value;
                    break;
                case UC_X86_REG_GS:
                    X86_CPU(uc, mycpu)->env.segs[R_GS].selector = *(uint16_t *)value;
                    break;
                case UC_X86_REG_R8:
                    X86_CPU(uc, mycpu)->env.regs[8] = *(uint64_t *)value;
                    break;
                case UC_X86_REG_R8D:
                    WRITE_DWORD(X86_CPU(uc, mycpu)->env.regs[8], *(uint32_t *)value);
                    break;
                case UC_X86_REG_R8W:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[8], *(uint16_t *)value);
                    break;
                case UC_X86_REG_R8B:
                    WRITE_BYTE_L(X86_CPU(uc, mycpu)->env.regs[8], *(uint8_t *)value);
                    break;
                case UC_X86_REG_R9:
                    X86_CPU(uc, mycpu)->env.regs[9] = *(uint64_t *)value;
                    break;
                case UC_X86_REG_R9D:
                    WRITE_DWORD(X86_CPU(uc, mycpu)->env.regs[9], *(uint32_t *)value);
                    break;
                case UC_X86_REG_R9W:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[9], *(uint16_t *)value);
                    break;
                case UC_X86_REG_R9B:
                    WRITE_BYTE_L(X86_CPU(uc, mycpu)->env.regs[9], *(uint8_t *)value);
                    break;
                case UC_X86_REG_R10:
                    X86_CPU(uc, mycpu)->env.regs[10] = *(uint64_t *)value;
                    break;
                case UC_X86_REG_R10D:
                    WRITE_DWORD(X86_CPU(uc, mycpu)->env.regs[10], *(uint32_t *)value);
                    break;
                case UC_X86_REG_R10W:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[10], *(uint16_t *)value);
                    break;
                case UC_X86_REG_R10B:
                    WRITE_BYTE_L(X86_CPU(uc, mycpu)->env.regs[10], *(uint8_t *)value);
                    break;
                case UC_X86_REG_R11:
                    X86_CPU(uc, mycpu)->env.regs[11] = *(uint64_t *)value;
                    break;
                case UC_X86_REG_R11D:
                    WRITE_DWORD(X86_CPU(uc, mycpu)->env.regs[11], *(uint32_t *)value);
                    break;
                case UC_X86_REG_R11W:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[11], *(uint16_t *)value);
                    break;
                case UC_X86_REG_R11B:
                    WRITE_BYTE_L(X86_CPU(uc, mycpu)->env.regs[11], *(uint8_t *)value);
                    break;
                case UC_X86_REG_R12:
                    X86_CPU(uc, mycpu)->env.regs[12] = *(uint64_t *)value;
                    break;
                case UC_X86_REG_R12D:
                    WRITE_DWORD(X86_CPU(uc, mycpu)->env.regs[12], *(uint32_t *)value);
                    break;
                case UC_X86_REG_R12W:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[12], *(uint16_t *)value);
                    break;
                case UC_X86_REG_R12B:
                    WRITE_BYTE_L(X86_CPU(uc, mycpu)->env.regs[12], *(uint8_t *)value);
                    break;
                case UC_X86_REG_R13:
                    X86_CPU(uc, mycpu)->env.regs[13] = *(uint64_t *)value;
                    break;
                case UC_X86_REG_R13D:
                    WRITE_DWORD(X86_CPU(uc, mycpu)->env.regs[13], *(uint32_t *)value);
                    break;
                case UC_X86_REG_R13W:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[13], *(uint16_t *)value);
                    break;
                case UC_X86_REG_R13B:
                    WRITE_BYTE_L(X86_CPU(uc, mycpu)->env.regs[13], *(uint8_t *)value);
                    break;
                case UC_X86_REG_R14:
                    X86_CPU(uc, mycpu)->env.regs[14] = *(uint64_t *)value;
                    break;
                case UC_X86_REG_R14D:
                    WRITE_DWORD(X86_CPU(uc, mycpu)->env.regs[14], *(uint32_t *)value);
                    break;
                case UC_X86_REG_R14W:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[14], *(uint16_t *)value);
                    break;
                case UC_X86_REG_R14B:
                    WRITE_BYTE_L(X86_CPU(uc, mycpu)->env.regs[14], *(uint8_t *)value);
                    break;
                case UC_X86_REG_R15:
                    X86_CPU(uc, mycpu)->env.regs[15] = *(uint64_t *)value;
                    break;
                case UC_X86_REG_R15D:
                    WRITE_DWORD(X86_CPU(uc, mycpu)->env.regs[15], *(uint32_t *)value);
                    break;
                case UC_X86_REG_R15W:
                    WRITE_WORD(X86_CPU(uc, mycpu)->env.regs[15], *(uint16_t *)value);
                    break;
                case UC_X86_REG_R15B:
                    WRITE_BYTE_L(X86_CPU(uc, mycpu)->env.regs[15], *(uint8_t *)value);
                    break;
                case UC_X86_REG_IDTR:
                    X86_CPU(uc, mycpu)->env.idt.limit = (uint16_t)((uc_x86_mmr *)value)->limit;
                    X86_CPU(uc, mycpu)->env.idt.base = ((uc_x86_mmr *)value)->base;
                    break;
                case UC_X86_REG_GDTR:
                    X86_CPU(uc, mycpu)->env.gdt.limit = (uint16_t)((uc_x86_mmr *)value)->limit;
                    X86_CPU(uc, mycpu)->env.gdt.base = ((uc_x86_mmr *)value)->base;
                    break;
                case UC_X86_REG_LDTR:
                    X86_CPU(uc, mycpu)->env.ldt.limit = ((uc_x86_mmr *)value)->limit;
                    X86_CPU(uc, mycpu)->env.ldt.base = ((uc_x86_mmr *)value)->base;
                    X86_CPU(uc, mycpu)->env.ldt.selector = (uint16_t)((uc_x86_mmr *)value)->selector;
                    X86_CPU(uc, mycpu)->env.ldt.flags = ((uc_x86_mmr *)value)->flags;
                    break;
                case UC_X86_REG_TR:
                    X86_CPU(uc, mycpu)->env.tr.limit = ((uc_x86_mmr *)value)->limit;
                    X86_CPU(uc, mycpu)->env.tr.base = ((uc_x86_mmr *)value)->base;
                    X86_CPU(uc, mycpu)->env.tr.selector = (uint16_t)((uc_x86_mmr *)value)->selector;
                    X86_CPU(uc, mycpu)->env.tr.flags = ((uc_x86_mmr *)value)->flags;
                    break;
            }
            break;
#endif
    }

    return 0;
}