/**
* This function enables a HDCP port device.
*
* @param InstancePtr is the device to enable.
*
* @return
* - XST_SUCCESS if successful.
*
* @note None.
*
******************************************************************************/
static int XHdcp1x_PortDpRxEnable(XHdcp1x *InstancePtr)
{
XDprx *HwDp = InstancePtr->Port.PhyIfPtr;
u32 IntMask = 0;
u8 Buf[4];
int Status = XST_SUCCESS;
/* Verify arguments. */
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->Port.PhyIfPtr != NULL);
/* Initialize Buf */
memset(Buf, 0, 4);
/* Initialize Bstatus register */
XHdcp1x_PortDpRxWrite(InstancePtr, XHDCP1X_PORT_OFFSET_BSTATUS, Buf, 1);
/* Initialize Binfo register */
XHdcp1x_PortDpRxWrite(InstancePtr, XHDCP1X_PORT_OFFSET_BINFO, Buf, 2);
/* Initialize Bcaps register */
Buf[0] |= XHDCP1X_PORT_BIT_BCAPS_HDCP_CAPABLE;
XHdcp1x_PortDpRxWrite(InstancePtr, XHDCP1X_PORT_OFFSET_BCAPS, Buf, 1);
/* Initialize some debug registers */
Buf[0] = 0xDE;
Buf[1] = 0xAD;
Buf[2] = 0xBE;
Buf[3] = 0xEF;
XHdcp1x_PortDpRxWrite(InstancePtr, XHDCP1X_PORT_OFFSET_DBG, Buf, 4);
/* Register callbacks */
XDp_RxSetIntrHdcpAksvWriteHandler(HwDp,
&XHdcp1x_PortDpRxProcessAKsvWrite, InstancePtr);
XDp_RxSetIntrHdcpBinfoReadHandler(HwDp,
&XHdcp1x_PortDpRxProcessBinfoRead, InstancePtr);
XDp_RxSetIntrHdcpRoReadHandler(HwDp,
&XHdcp1x_PortDpRxProcessRoRead, InstancePtr);
/* Enable interrupts */
IntMask = XDP_RX_INTERRUPT_MASK_HDCP_AKSV_WRITE_MASK;
IntMask |= XDP_RX_INTERRUPT_MASK_HDCP_RO_READ_MASK;
IntMask |= XDP_RX_INTERRUPT_MASK_HDCP_BINFO_READ_MASK;
XDp_RxInterruptEnable(HwDp, IntMask);
return (Status);
}
/**
* This function is the callback function for when a training lost interrupt
* occurs.
*
* @param InstancePtr is a pointer to the XDp instance.
*
* @return None.
*
* @note None.
*
*******************************************************************************/
static void Dprx_InterruptHandlerTrainingLost(void *InstancePtr)
{
xil_printf("> Interrupt: training lost.\n");
/* Re-enable vertical blanking interrupt and counter. */
VBlankEnable = 1;
XDp_RxInterruptEnable(InstancePtr, XDP_RX_INTERRUPT_MASK_VBLANK_MASK);
VBlankCount = 0;
xil_printf("\tDisabling the display timing generator.\n");
XDp_RxDtgDis(InstancePtr);
xil_printf("\tResetting the video output pipeline.\n");
/* This is hardware system specific - it is up to the user to implement
* this function if needed. */
Dprx_VidpipeReset();
/*******************/
}