/*
* IIC Init
*/
int iic_init(XIicPs *IicPs, u16 DeviceId, u32 ClkRate) {
int Status;
XIicPs_Config *IicPs_Config;
XIicPs_DisableAllInterrupts(IicPs->Config.BaseAddress);
/*
* Initialize the IIC driver.
*/
IicPs_Config = XIicPs_LookupConfig(DeviceId);
if (IicPs_Config == NULL) {
myprintf("No XIicPs instance found for ID %d\n\r", DeviceId);
return XST_FAILURE;
}
Status = XIicPs_CfgInitialize(IicPs, IicPs_Config,
IicPs_Config->BaseAddress);
if (Status != XST_SUCCESS) {
myprintf("XIicPs Initialization failed for ID %d\n\r", DeviceId);
return XST_FAILURE;
}
/*
* Set the IIC serial clock rate.
*/
//Status = XIicPs_SetSClk(IicPs, ClkRate);
Status = SetIiCSClk(IicPs, ClkRate);
if (Status != XST_SUCCESS) {
myprintf("Setting XIicPs clock rate failed for ID %d, Status: %d\n\r",
DeviceId, Status);
return XST_FAILURE;
}
return XST_SUCCESS;
}
/* ---------------------------------------------------------------------------- *
* IicConfig() *
* ---------------------------------------------------------------------------- *
* IIC initialization with clock configuration.
* ---------------------------------------------------------------------------- */
unsigned char adau1761_I2CMaster_init(tAdau1761 *pThis, unsigned int I2C_DeviceId, unsigned int I2C_CLK)
{
XIicPs_Config *Config;
Config = XIicPs_LookupConfig(I2C_DeviceId);
XIicPs_CfgInitialize(&(pThis->Iic), Config, Config->BaseAddress);
XIicPs_SetSClk(&(pThis->Iic), I2C_CLK);
return 0;
}
/**
*
* This function does a minimal test on the Iic device and driver as a
* design example. The purpose of this function is to illustrate
* how to use the XIicPs component.
*
*
* @param DeviceId is the Device ID of the IicPs Device and is the
* XPAR_<IICPS_instance>_DEVICE_ID value from xparameters.h
*
* @return XST_SUCCESS if successful, otherwise XST_FAILURE.
*
* @note None.
*
*
*******************************************************************************/
int IicPsSelfTestExample(u16 DeviceId)
{
int Status;
XIicPs_Config *Config;
/* Initialize the IIC driver so that it's ready to use
* Look up the configuration in the config table, then initialize it. */
Config = XIicPs_LookupConfig(DeviceId);
if (NULL == Config) { return XST_FAILURE; }
Status = XIicPs_CfgInitialize(&Iic, Config, Config->BaseAddress);
if (Status != XST_SUCCESS) { return XST_FAILURE; }
printf(" pointeur : %X%X%X%X%X \n\r",Iic);
/* Perform a self-test. */
Status = XIicPs_SelfTest(&Iic);
if (Status != XST_SUCCESS) { return XST_FAILURE; }
return XST_SUCCESS;
}
unsigned char IicConfig(unsigned int DeviceIdPS)
{
XIicPs_Config *Config;
int Status;
//Initialize the IIC driver so that it's ready to use
//Look up the configuration in the config table, then initialize it.
Config = XIicPs_LookupConfig(DeviceIdPS);
if(NULL == Config) {
return XST_FAILURE;
}
Status = XIicPs_CfgInitialize(&Iic, Config, Config->BaseAddress);
if(Status != XST_SUCCESS) {
return XST_FAILURE;
}
//Set the IIC serial clock rate.
XIicPs_SetSClk(&Iic, IIC_SCLK_RATE);
return XST_SUCCESS;
}
/**
* This function is used to perform GT configuration for ZCU102 board.
* It also provides reset to GEM, enables FMC ADJ
*
* @param none
*
* @return
* - XFSBL_SUCCESS for successful configuration
* - errors as mentioned in xfsbl_error.h
*
*****************************************************************************/
static s32 XFsbl_BoardConfig(void)
{
u8 WriteBuffer[BUF_LEN] = {0};
XIicPs_Config *I2c0CfgPtr;
s32 Status = XFSBL_SUCCESS;
u32 ICMCfg0;
u32 ICMCfg1;
/* Initialize the IIC0 driver so that it is ready to use */
I2c0CfgPtr = XIicPs_LookupConfig(XPAR_XIICPS_0_DEVICE_ID);
if (I2c0CfgPtr == NULL) {
Status = XFSBL_ERROR_I2C_INIT;
XFsbl_Printf(DEBUG_GENERAL,"XFSBL_ERROR_I2C_INIT\r\n");
goto END;
}
Status = XIicPs_CfgInitialize(&I2c0InstancePtr, I2c0CfgPtr,
I2c0CfgPtr->BaseAddress);
if (Status != XST_SUCCESS) {
Status = XFSBL_ERROR_I2C_INIT;
XFsbl_Printf(DEBUG_GENERAL,"XFSBL_ERROR_I2C_INIT\r\n");
goto END;
}
/* Set the IIC serial clock rate */
XIicPs_SetSClk(&I2c0InstancePtr, IIC_SCLK_RATE_IOEXP);
/* Configure I/O pins as Output */
WriteBuffer[0] = CMD_CFG_0_REG;
WriteBuffer[1] = DATA_OUTPUT;
Status = XIicPs_MasterSendPolled(&I2c0InstancePtr,
WriteBuffer, 2, IOEXPANDER1_ADDR);
if (Status != XST_SUCCESS) {
Status = XFSBL_ERROR_I2C_WRITE;
XFsbl_Printf(DEBUG_GENERAL,"XFSBL_ERROR_I2C_WRITE\r\n");
goto END;
}
/* Wait until bus is idle to start another transfer */
while (XIicPs_BusIsBusy(&I2c0InstancePtr));
/*
* Deasserting I2C_MUX_RESETB
* And GEM3 Resetb
* Selecting lanes based on configuration
*/
WriteBuffer[0] = CMD_OUTPUT_0_REG;
/* Populate WriteBuffer[1] based on ICM_CFG configuration */
ICMCfg0 = XFsbl_In32(SERDES_ICM_CFG0) &
(SERDES_ICM_CFG0_L0_ICM_CFG_MASK | SERDES_ICM_CFG0_L1_ICM_CFG_MASK);
ICMCfg1 = XFsbl_In32(SERDES_ICM_CFG1) &
(SERDES_ICM_CFG1_L2_ICM_CFG_MASK | SERDES_ICM_CFG1_L3_ICM_CFG_MASK);
if ((ICMCfg0 == ICM_CFG0_PCIE_DP) && (ICMCfg1 == ICM_CFG1_USB_SATA))
{
/* gt1110 */
WriteBuffer[1] = DATA_COMMON_CFG | DATA_GT_1110_CFG;
}
else
if ((ICMCfg0 == ICM_CFG0_DP_DP) && (ICMCfg1 == ICM_CFG1_USB_SATA))
{
/* gt1111 */
WriteBuffer[1] = DATA_COMMON_CFG | DATA_GT_1111_CFG;
}
else
if ((ICMCfg0 == ICM_CFG0_PCIE_PCIE) && (ICMCfg1 == ICM_CFG1_USB_SATA))
{
/* gt1100 */
WriteBuffer[1] = DATA_COMMON_CFG | DATA_GT_1100_CFG;
}
else
{
/* gt0000 or no GT configuration */
WriteBuffer[1] = DATA_COMMON_CFG | DATA_GT_0000_CFG;
}
/* Send the Data */
Status = XIicPs_MasterSendPolled(&I2c0InstancePtr,
WriteBuffer, 2, IOEXPANDER1_ADDR);
if (Status != XST_SUCCESS) {
Status = XFSBL_ERROR_I2C_WRITE;
XFsbl_Printf(DEBUG_GENERAL,"XFSBL_ERROR_I2C_WRITE\r\n");
goto END;
}
/* Wait until bus is idle */
while (XIicPs_BusIsBusy(&I2c0InstancePtr));
/* Change the IIC serial clock rate */
XIicPs_SetSClk(&I2c0InstancePtr, IIC_SCLK_RATE_I2CMUX);
/* Set I2C Mux for channel-2 (MAXIM_PMBUS) */
WriteBuffer[0] = CMD_CH_2_REG;
Status = XIicPs_MasterSendPolled(&I2c0InstancePtr,
WriteBuffer, 1, PCA9544A_ADDR);
if (Status != XST_SUCCESS) {
Status = XFSBL_ERROR_I2C_WRITE;
XFsbl_Printf(DEBUG_GENERAL,"XFSBL_ERROR_I2C_WRITE\r\n");
goto END;
}
/* Wait until bus is idle */
while (XIicPs_BusIsBusy(&I2c0InstancePtr));
/* Enable Regulator (FMC ADJ) */
WriteBuffer[0] = CMD_ON_OFF_CFG;
WriteBuffer[1] = ON_OFF_CFG_VAL;
Status = XIicPs_MasterSendPolled(&I2c0InstancePtr,
WriteBuffer, 2, MAX15301_ADDR);
if (Status != XST_SUCCESS) {
Status = XFSBL_ERROR_I2C_WRITE;
XFsbl_Printf(DEBUG_GENERAL,"XFSBL_ERROR_I2C_WRITE\r\n");
goto END;
}
/* Wait until bus is idle */
while (XIicPs_BusIsBusy(&I2c0InstancePtr));
XFsbl_Printf(DEBUG_INFO,"Board Configuration successful \n\r");
END:
return Status;
}
int i2c_init_clk()
{
// We only need the I2C device for the clock setup, so just move it all here instead
XIicPs i2c_dev;
int rv = 0;
XIicPs_Config* cfg = XIicPs_LookupConfig(I2C_DEV);
if(cfg == NULL)
{
printf("Could not lookup config for device %d\r\n", I2C_DEV);
return -1;
}
rv = XIicPs_CfgInitialize(&i2c_dev, cfg, cfg->BaseAddress);
if(rv != XST_SUCCESS)
{
printf("Could not init I2C device\r\n");
return -1;
}
rv = XIicPs_SelfTest(&i2c_dev);
if(rv != XST_SUCCESS)
{
printf("I2C Self-test failed\r\n");
return -1;
}
XIicPs_SetSClk(&i2c_dev, I2C_CLK);
// Ok, try and read from the bus switch
uint8_t val = 0;
rv = i2c_recv(&i2c_dev, I2C_BUS_SWITCH, &val, 1);
if(rv != XST_SUCCESS)
{
printf("i2c_recv failed with code %d\r\n", rv);
return -1;
}
val = I2C_BUS_SWITCH_DIR_SI5324;
rv = i2c_write_await(&i2c_dev, I2C_BUS_SWITCH, &val, 1);
if(rv != XST_SUCCESS)
{
printf("i2c_send failed with code %d\r\n", rv);
return -1;
}
rv = i2c_recv(&i2c_dev, I2C_BUS_SWITCH, &val, 1);
if(rv != XST_SUCCESS)
{
printf("i2c_read failed with code %d\r\n", rv);
return -1;
}
i2c_write_single_reg(&i2c_dev, I2C_SI5324, 0x0, 0x54); // FREE_RUN
i2c_write_single_reg(&i2c_dev, I2C_SI5324, 0x1, 0xE4); // CK_PRIOR2,CK_PRIOR1
i2c_write_single_reg(&i2c_dev, I2C_SI5324, 0x2, 0x12); // BWSEL was 32
i2c_write_single_reg(&i2c_dev, I2C_SI5324, 0x3, 0x15); // CKSEL_REG
i2c_write_single_reg(&i2c_dev, I2C_SI5324, 0x4, 0x92); // AUTOSEL_REG
i2c_write_single_reg(&i2c_dev, I2C_SI5324, 0xa, 0x08); // DSBL2_REG
i2c_write_single_reg(&i2c_dev, I2C_SI5324, 0xb, 0x40); // PD_CK2
i2c_write_single_reg(&i2c_dev, I2C_SI5324, 0x19, 0xA0); // N1_HS
i2c_write_single_reg(&i2c_dev, I2C_SI5324, 0x1f, 0x00); // NC1_LS[19:16]
i2c_write_single_reg(&i2c_dev, I2C_SI5324, 0x20, 0x00); // NC1_LS[15:8]
i2c_write_single_reg(&i2c_dev, I2C_SI5324, 0x21, 0x03); // NC1_LS[7:0]
i2c_write_single_reg(&i2c_dev, I2C_SI5324, 0x28, 0xC2); // N2_HS, N2_LS[19:16]
i2c_write_single_reg(&i2c_dev, I2C_SI5324, 0x29, 0x49); // N2_LS[15:8]
i2c_write_single_reg(&i2c_dev, I2C_SI5324, 0x2a, 0xEF); // N2_LS[7:0]
i2c_write_single_reg(&i2c_dev, I2C_SI5324, 0x2b, 0x00); // N31[18:16]
i2c_write_single_reg(&i2c_dev, I2C_SI5324, 0x2c, 0x77); // N31[15:8]
i2c_write_single_reg(&i2c_dev, I2C_SI5324, 0x2d, 0x0B); // N31[7:0]
i2c_write_single_reg(&i2c_dev, I2C_SI5324, 0x2e, 0x00); // N32[18:16]
i2c_write_single_reg(&i2c_dev, I2C_SI5324, 0x2f, 0x77); // N32[15:8]
i2c_write_single_reg(&i2c_dev, I2C_SI5324, 0x30, 0x0B); // N32[7:0]
i2c_write_single_reg(&i2c_dev, I2C_SI5324, 0x88, 0x40); // RST_REG,ICAL
return XST_SUCCESS;
}
/**
*
* This function does polled mode transfer in slave mode. It first sends to
* master then receives.
*
* @param DeviceId is the Device ID of the IicPs Device and is the
* XPAR_<IICPS_instance>_DEVICE_ID value from xparameters.h
*
* @return XST_SUCCESS if successful, otherwise XST_FAILURE.
*
* @note None.
*
*******************************************************************************/
int IicPsSlavePolledExample(u16 DeviceId)
{
int Status;
XIicPs_Config *Config;
int Index;
/*
* Initialize the IIC driver so that it's ready to use
* Look up the configuration in the config table,
* then initialize it.
*/
Config = XIicPs_LookupConfig(DeviceId);
if (NULL == Config) {
return XST_FAILURE;
}
Status = XIicPs_CfgInitialize(&Iic, Config, Config->BaseAddress);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Perform a self-test to ensure that the hardware was built correctly.
*/
Status = XIicPs_SelfTest(&Iic);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
XIicPs_SetupSlave(&Iic, IIC_SLAVE_ADDR);
/*
* Set the IIC serial clock rate.
*/
XIicPs_SetSClk(&Iic, IIC_SCLK_RATE);
/*
* Initialize the send buffer bytes with a pattern to send and the
* the receive buffer bytes to zero to allow the receive data to be
* verified.
*/
for (Index = 0; Index < TEST_BUFFER_SIZE; Index++) {
SendBuffer[Index] = (Index % TEST_BUFFER_SIZE);
RecvBuffer[Index] = 0;
}
/*
* Send the buffer using the IIC and ignore the number of bytes sent
* as the return value since we are using it in interrupt mode.
*/
Status = XIicPs_SlaveSendPolled(&Iic, SendBuffer,
TEST_BUFFER_SIZE);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
while (XIicPs_BusIsBusy(&Iic)) {
/* NOP */
}
Status = XIicPs_SlaveRecvPolled(&Iic, RecvBuffer,
TEST_BUFFER_SIZE);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Verify received data is correct.
*/
for(Index = 0; Index < TEST_BUFFER_SIZE; Index ++) {
if (RecvBuffer[Index] != Index % TEST_BUFFER_SIZE) {
return XST_FAILURE;
}
}
return XST_SUCCESS;
}
/**
*
* This function simply initializes the iic component of the board
*
*******************************************************************************/
int IicInit()
{
xil_printf("Initialize iic component\r\n");
int Status;
XIicPs_Config *Config;
int Index;
/*
* Initialize the IIC driver so that it's ready to use
* Look up the configuration in the config table,
* then initialize it.
*/
Config = XIicPs_LookupConfig(IIC_DEVICE_ID);
if (NULL == Config)
{
return XST_FAILURE;
}
Status = XIicPs_CfgInitialize(&Iic, Config, Config->BaseAddress);
if (Status != XST_SUCCESS)
{
return XST_FAILURE;
}
/*
* Perform a self-test to ensure that the hardware was built correctly.
*/
Status = XIicPs_SelfTest(&Iic);
if (Status != XST_SUCCESS)
{
return XST_FAILURE;
}
/*
* Set the IIC serial clock rate.
*/
XIicPs_SetSClk(&Iic, IIC_SCLK_RATE);
/*
* Initialize the send buffer bytes with a pattern to send and the
* the receive buffer bytes to zero to allow the receive data to be
* verified.
*/
for (Index = 0; Index < RECV_BUFFER_SIZE; Index++)
{
RecvBuffer[Index] = 0;
}
/*
* Wait until bus is idle to start another transfer.
*/
while (XIicPs_BusIsBusy(&Iic)) {
/* NOP */
}
// Wait until slave is ready to communicate
Status = XIicPs_MasterRecvPolled(&Iic, RecvBuffer, RECV_BUFFER_SIZE, IIC_SLAVE_ADDR);
while (Status != XST_SUCCESS)
{
Status = XIicPs_MasterRecvPolled(&Iic, RecvBuffer, RECV_BUFFER_SIZE, IIC_SLAVE_ADDR);
usleep(100000);
}
xil_printf("iic component initialized and ready to request data!\r\n");
return XST_SUCCESS;
}
/**
*
* This function does a minimal test on the Iic device and driver as a
* design example. The purpose of this function is to illustrate
* how to use the XIicPs driver.
*
* This function sends data and expects to receive the same data through the IIC
* using the Aardvark test hardware.
*
* This function uses interrupt driver mode of the IIC.
*
* @param DeviceId is the Device ID of the IicPs Device and is the
* XPAR_<IICPS_instance>_DEVICE_ID value from xparameters.h
*
* @return XST_SUCCESS if successful, otherwise XST_FAILURE.
*
* @note
*
* This function contains an infinite loop such that if interrupts are not
* working it may never return.
*
*******************************************************************************/
int IicPsMasterIntrExample(u16 DeviceId)
{
int Status;
XIicPs_Config *Config;
int Index;
int tmp;
int BufferSizes[NUMBER_OF_SIZES] = {1, 2, 19, 31, 32, 33, 62, 63, 64,
65, 66, 94, 95, 96, 97, 98, 99, 250};
/*
* Initialize the IIC driver so that it's ready to use
* Look up the configuration in the config table, then initialize it.
*/
Config = XIicPs_LookupConfig(DeviceId);
if (NULL == Config) {
return XST_FAILURE;
}
Status = XIicPs_CfgInitialize(&Iic, Config, Config->BaseAddress);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Perform a self-test to ensure that the hardware was built correctly.
*/
Status = XIicPs_SelfTest(&Iic);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Connect the IIC to the interrupt subsystem such that interrupts can
* occur. This function is application specific.
*/
Status = SetupInterruptSystem(&Iic);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Setup the handlers for the IIC that will be called from the
* interrupt context when data has been sent and received, specify a
* pointer to the IIC driver instance as the callback reference so
* the handlers are able to access the instance data.
*/
XIicPs_SetStatusHandler(&Iic, (void *) &Iic, Handler);
/*
* Set the IIC serial clock rate.
*/
XIicPs_SetSClk(&Iic, IIC_SCLK_RATE);
/*
* Initialize the send buffer bytes with a pattern to send and the
* the receive buffer bytes to zero to allow the receive data to be
* verified.
*/
for (Index = 0; Index < TEST_BUFFER_SIZE; Index++) {
SendBuffer[Index] = (Index % TEST_BUFFER_SIZE);
RecvBuffer[Index] = 0;
}
for(Index = 0; Index < NUMBER_OF_SIZES; Index++) {
/* Wait for bus to become idle
*/
while (XIicPs_BusIsBusy(&Iic)) {
/* NOP */
}
SendComplete = FALSE;
/*
* Send the buffer, errors are reported by TotalErrorCount.
*/
XIicPs_MasterSend(&Iic, SendBuffer, BufferSizes[Index],
IIC_SLAVE_ADDR);
/*
* Wait for the entire buffer to be sent, letting the interrupt
* processing work in the background, this function may get
* locked up in this loop if the interrupts are not working
* correctly.
*/
while (!SendComplete) {
if (0 != TotalErrorCount) {
return XST_FAILURE;
}
}
/*
* Wait bus activities to finish.
*/
while (XIicPs_BusIsBusy(&Iic)) {
/* NOP */
}
/*
* Receive data from slave, errors are reported through
* TotalErrorCount.
*/
RecvComplete = FALSE;
XIicPs_MasterRecv(&Iic, RecvBuffer, BufferSizes[Index],
IIC_SLAVE_ADDR);
while (!RecvComplete) {
if (0 != TotalErrorCount) {
return XST_FAILURE;
}
}
/* Check for received data.
*/
for(tmp = 0; tmp < BufferSizes[Index]; tmp ++) {
/*
* Aardvark as slave can only set up to 64 bytes for
* output.
*/
if (RecvBuffer[tmp] != tmp % 64) {
return XST_FAILURE;
}
}
}
return XST_SUCCESS;
}
