/* * See the serial2.h header file. */ xComPortHandle xSerialPortInitMinimal( uint32_t ulWantedBaud, UBaseType_t uxQueueLength ) { BaseType_t xStatus; XUartPs_Config *pxConfig; /* Create the queue used to hold received characters. NOTE THE COMMENTS AT THE TOP OF THIS FILE REGARDING THE USE OF QUEUES FOR THIS PURPSOE. */ xRxQueue = xQueueCreate( uxQueueLength, sizeof( char ) ); configASSERT( xRxQueue ); /* Create the semaphore used to signal the end of a transmission, then take the semaphore so it is in the correct state the first time xSerialSendString() is called. A block time of zero is used when taking the semaphore as it is guaranteed to be available (it was just created). */ xTxCompleteSemaphore = xSemaphoreCreateBinary(); configASSERT( xTxCompleteSemaphore ); xSemaphoreTake( xTxCompleteSemaphore, 0 ); /* Look up the UART configuration then initialise the dirver. */ pxConfig = XUartPs_LookupConfig( XPAR_XUARTPS_0_DEVICE_ID ); /* Initialise the driver. */ xStatus = XUartPs_CfgInitialize( &xUARTInstance, pxConfig, XPAR_PS7_UART_1_BASEADDR ); configASSERT( xStatus == XST_SUCCESS ); ( void ) xStatus; /* Remove compiler warning if configASSERT() is not defined. */ /* Misc. parameter configuration. */ XUartPs_SetBaudRate( &xUARTInstance, ulWantedBaud ); XUartPs_SetOperMode( &xUARTInstance, XUARTPS_OPER_MODE_NORMAL ); /* Install the interrupt service routine that is defined within this file. */ xStatus = XScuGic_Connect( &xInterruptController, XPAR_XUARTPS_1_INTR, (Xil_ExceptionHandler) prvUART_Handler, (void *) &xUARTInstance ); configASSERT( xStatus == XST_SUCCESS ); ( void ) xStatus; /* Remove compiler warning if configASSERT() is not defined. */ /* Ensure interrupts start clear. */ XUartPs_WriteReg( XPAR_PS7_UART_1_BASEADDR, XUARTPS_ISR_OFFSET, XUARTPS_IXR_MASK ); /* Enable the UART interrupt within the GIC. */ XScuGic_Enable( &xInterruptController, XPAR_XUARTPS_1_INTR ); /* Enable the interrupts of interest in the UART. */ XUartPs_SetInterruptMask( &xUARTInstance, XUARTPS_IXR_RXFULL | XUARTPS_IXR_RXOVR | XUARTPS_IXR_TOUT | XUARTPS_IXR_TXEMPTY ); /* Set the receive timeout. */ XUartPs_SetRecvTimeout( &xUARTInstance, 8 ); return ( xComPortHandle ) 0; }
/** * * This function does a minimal test on the UartPS device and driver as a * design example. The purpose of this function is to illustrate * how to use the XUartPs driver. * * This function sends data and expects to receive the same data through the * device using the local loopback mode. * * This function uses interrupt mode of the device. * * @param IntcInstPtr is a pointer to the instance of the Scu Gic driver. * @param UartInstPtr is a pointer to the instance of the UART driver * which is going to be connected to the interrupt controller. * @param DeviceId is the device Id of the UART device and is typically * XPAR_<UARTPS_instance>_DEVICE_ID value from xparameters.h. * @param UartIntrId is the interrupt Id and is typically * XPAR_<UARTPS_instance>_INTR value from xparameters.h. * * @return XST_SUCCESS if successful, otherwise XST_FAILURE. * * @note * * This function contains an infinite loop such that if interrupts are not * working it may never return. * **************************************************************************/ int UartPsIntrExample(XScuGic *IntcInstPtr, XUartPs *UartInstPtr, u16 DeviceId, u16 UartIntrId) { int Status; XUartPs_Config *Config; int Index; u32 IntrMask; int BadByteCount = 0; /* * Initialize the UART driver so that it's ready to use * Look up the configuration in the config table, then initialize it. */ Config = XUartPs_LookupConfig(DeviceId); if (NULL == Config) { return XST_FAILURE; } Status = XUartPs_CfgInitialize(UartInstPtr, Config, Config->BaseAddress); if (Status != XST_SUCCESS) { return XST_FAILURE; } /* * Check hardware build */ Status = XUartPs_SelfTest(UartInstPtr); if (Status != XST_SUCCESS) { return XST_FAILURE; } /* * Connect the UART to the interrupt subsystem such that interrupts * can occur. This function is application specific. */ Status = SetupInterruptSystem(IntcInstPtr, UartInstPtr, UartIntrId); if (Status != XST_SUCCESS) { return XST_FAILURE; } /* * Setup the handlers for the UART that will be called from the * interrupt context when data has been sent and received, specify * a pointer to the UART driver instance as the callback reference * so the handlers are able to access the instance data */ XUartPs_SetHandler(UartInstPtr, (XUartPs_Handler)Handler, UartInstPtr); /* * Enable the interrupt of the UART so interrupts will occur, setup * a local loopback so data that is sent will be received. */ IntrMask = XUARTPS_IXR_TOUT | XUARTPS_IXR_PARITY | XUARTPS_IXR_FRAMING | XUARTPS_IXR_OVER | XUARTPS_IXR_TXEMPTY | XUARTPS_IXR_RXFULL | XUARTPS_IXR_RXOVR; XUartPs_SetInterruptMask(UartInstPtr, IntrMask); XUartPs_SetOperMode(UartInstPtr, XUARTPS_OPER_MODE_LOCAL_LOOP); /* * Set the receiver timeout. If it is not set, and the last few bytes * of data do not trigger the over-water or full interrupt, the bytes * will not be received. By default it is disabled. * * The setting of 8 will timeout after 8 x 4 = 32 character times. * Increase the time out value if baud rate is high, decrease it if * baud rate is low. */ XUartPs_SetRecvTimeout(UartInstPtr, 8); /* * Initialize the send buffer bytes with a pattern and the * the receive buffer bytes to zero to allow the receive data to be * verified */ for (Index = 0; Index < TEST_BUFFER_SIZE; Index++) { SendBuffer[Index] = (Index % 26) + 'A'; RecvBuffer[Index] = 0; } /* * Start receiving data before sending it since there is a loopback, * ignoring the number of bytes received as the return value since we * know it will be zero */ XUartPs_Recv(UartInstPtr, RecvBuffer, TEST_BUFFER_SIZE); /* * Send the buffer using the UART and ignore the number of bytes sent * as the return value since we are using it in interrupt mode. */ XUartPs_Send(UartInstPtr, SendBuffer, TEST_BUFFER_SIZE); /* * Wait for the entire buffer to be received, letting the interrupt * processing work in the background, this function may get locked * up in this loop if the interrupts are not working correctly. */ while (1) { if ((TotalSentCount == TEST_BUFFER_SIZE) && (TotalReceivedCount == TEST_BUFFER_SIZE)) { break; } } /* * Verify the entire receive buffer was successfully received */ for (Index = 0; Index < TEST_BUFFER_SIZE; Index++) { if (RecvBuffer[Index] != SendBuffer[Index]) { BadByteCount++; } } /* * Set the UART in Normal Mode */ XUartPs_SetOperMode(UartInstPtr, XUARTPS_OPER_MODE_NORMAL); /* * If any bytes were not correct, return an error */ if (BadByteCount != 0) { return XST_FAILURE; } return XST_SUCCESS; }
/** * * This function does a minimal test on the XUartPs device in polled mode. * * This function sends data and expects to receive the data thru the UART * using the local loopback mode. * * * @param DeviceId is the unique device id from hardware build. * * @return XST_SUCCESS if successful, XST_FAILURE if unsuccessful * * @note * This function polls the UART, it may hang if the hardware is not * working correctly. * ****************************************************************************/ int UartPsPolledExample(u16 DeviceId) { int Status; XUartPs_Config *Config; unsigned int SentCount; unsigned int ReceivedCount; u16 Index; u32 LoopCount = 0; /* * Initialize the UART driver so that it's ready to use. * Look up the configuration in the config table, then initialize it. */ Config = XUartPs_LookupConfig(DeviceId); if (NULL == Config) { return XST_FAILURE; } Status = XUartPs_CfgInitialize(&Uart_PS, Config, Config->BaseAddress); if (Status != XST_SUCCESS) { return XST_FAILURE; } /* * Check hardware build. */ Status = XUartPs_SelfTest(&Uart_PS); if (Status != XST_SUCCESS) { return XST_FAILURE; } /* * Use local loopback mode. */ XUartPs_SetOperMode(&Uart_PS, XUARTPS_OPER_MODE_LOCAL_LOOP); /* * Initialize the send buffer bytes with a pattern and zero out * the receive buffer. */ for (Index = 0; Index < TEST_BUFFER_SIZE; Index++) { SendBuffer[Index] = '0' + Index; RecvBuffer[Index] = 0; } /* * Block sending the buffer. */ SentCount = XUartPs_Send(&Uart_PS, SendBuffer, TEST_BUFFER_SIZE); if (SentCount != TEST_BUFFER_SIZE) { return XST_FAILURE; } /* * Wait while the UART is sending the data so that we are guaranteed * to get the data the 1st time we call receive, otherwise this function * may enter receive before the data has arrived */ while (XUartPs_IsSending(&Uart_PS)) { LoopCount++; } /* * Block receiving the buffer. */ ReceivedCount = 0; while (ReceivedCount < TEST_BUFFER_SIZE) { ReceivedCount += XUartPs_Recv(&Uart_PS, &RecvBuffer[ReceivedCount], (TEST_BUFFER_SIZE - ReceivedCount)); } /* * Check the receive buffer against the send buffer and verify the * data was correctly received */ for (Index = 0; Index < TEST_BUFFER_SIZE; Index++) { if (SendBuffer[Index] != RecvBuffer[Index]) { return XST_FAILURE; } } /* * Restore to normal mode. */ XUartPs_SetOperMode(&Uart_PS, XUARTPS_OPER_MODE_NORMAL); return XST_SUCCESS; }
//////////////////////////// MAIN //////////////////// MAIN ////////////// int main() { // Local Variables for main() int i = 0; // index int menusel = 99999; // Menu Select int mode = 9; // Mode of Operation int enable_state = 0; // 0: disabled, 1: enabled int thres = 0; // Trigger Threshold char updateint = 'N'; // switch to change integral values u32 databuff = 0; // size of the data buffer // Initialize System init_platform(); // This initializes the platform, which is ... ps7_post_config(); Xil_DCacheDisable(); // InitializeAXIDma(); // Initialize the AXI DMA Transfer Interface Xil_Out32 (XPAR_AXI_GPIO_16_BASEADDR, 16384); Xil_Out32 (XPAR_AXI_GPIO_17_BASEADDR , 1); InitializeInterruptSystem(XPAR_PS7_SCUGIC_0_DEVICE_ID); for (i=0; i<32; i++ ) { RecvBuffer[i] = '_'; } // Clear RecvBuffer Variable for (i=0; i<32; i++ ) { SendBuffer[i] = '_'; } // Clear SendBuffer Variable //*******************Setup the UART **********************// XUartPs_Config *Config = XUartPs_LookupConfig(UART_DEVICEID); if (NULL == Config) { return 1;} Status = XUartPs_CfgInitialize(&Uart_PS, Config, Config->BaseAddress); if (Status != 0){ return 1; } /* Conduct a Selftest for the UART */ Status = XUartPs_SelfTest(&Uart_PS); if (Status != 0) { return 1; } /* Set to normal mode. */ XUartPs_SetOperMode(&Uart_PS, XUARTPS_OPER_MODE_NORMAL); //*******************Setup the UART **********************// //*******************Receive and Process Packets **********************// Xil_Out32 (XPAR_AXI_GPIO_0_BASEADDR, 11); Xil_Out32 (XPAR_AXI_GPIO_1_BASEADDR, 71); Xil_Out32 (XPAR_AXI_GPIO_2_BASEADDR, 167); Xil_Out32 (XPAR_AXI_GPIO_3_BASEADDR, 2015); Xil_Out32 (XPAR_AXI_GPIO_4_BASEADDR, 12); Xil_Out32 (XPAR_AXI_GPIO_5_BASEADDR, 75); Xil_Out32 (XPAR_AXI_GPIO_6_BASEADDR, 75); Xil_Out32 (XPAR_AXI_GPIO_7_BASEADDR, 5); Xil_Out32 (XPAR_AXI_GPIO_8_BASEADDR, 25); //*******************Receive and Process Packets **********************// //******************Setup Detector and Module Objects*****************// //LDetector *Detector = LDetector(); //Detector->SetMode(1); // Processed Data Mode //******************Setup Detector and Module Objects*****************// // *********** Setup the Hardware Reset GPIO ****************// GPIOConfigPtr = XGpioPs_LookupConfig(XPAR_PS7_GPIO_0_DEVICE_ID); Status = XGpioPs_CfgInitialize(&Gpio, GPIOConfigPtr, GPIOConfigPtr ->BaseAddr); if (Status != XST_SUCCESS) { return XST_FAILURE; } XGpioPs_SetDirectionPin(&Gpio, SW_BREAK_GPIO, 1); // *********** Setup the Hardware Reset MIO ****************// // ******************* POLLING LOOP *******************// xil_printf("\n\r Turn on Local Echo: under Terminal-Setup in Tera Term \n\r"); xil_printf(" Code is expecting a 'Return' after Each Command \n\r"); while(1){ sw = 0; // stop switch reset to 0 XUartPs_SetOptions(&Uart_PS,XUARTPS_OPTION_RESET_RX); // Clear UART Read Buffer for (i=0; i<32; i++ ) { RecvBuffer[i] = '_'; } // Clear RecvBuffer Variable sleep(0.5); // Built in Latency ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 0.5 s xil_printf("\n\r MAIN MENU \n\r"); xil_printf("******************************\n\r"); xil_printf(" 0) Set Mode of Operation\n\r"); xil_printf(" 1) Enable or disable the system\n\r"); xil_printf(" 2) Continuously Read of Processed Data\n\r"); xil_printf("\n\r **Setup Parameters ** \n\r"); xil_printf(" 3) Set Trigger Threshold\n\r"); xil_printf(" 4) Set Integration Times (number of clock cycles * 4ns) \n\r"); xil_printf("\n\r ** Additional Commands ** \n\r"); xil_printf(" 5) Perform a DMA transfer of Waveform Data\n\r"); xil_printf(" 6) Perform a DMA transfer of Processed Data\n\r"); xil_printf(" 7) Check the Size of the Data Buffered (Max = 4095) \n\r"); xil_printf(" 8) Clear the Processed Data Buffers\n\r"); xil_printf(" 9) Execute Print of Data on DRAM \n\r"); xil_printf("******************************\n\n\r"); while (XUartPs_IsSending(&Uart_PS)) {i++;} // Wait until Write Buffer is Sent // Wait for Input, Check // If input is valid break while and enter case statement // If input is invalid break and try again ReadCommandPoll(); menusel = 99999; sscanf(RecvBuffer,"%01d",&menusel); if ( menusel < 0 || menusel > 9 ) { xil_printf(" Invalid Command: Enter 0-9 \n\r"); sleep(1); // Built in Latency ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 s } switch (menusel) { // Switch-Case Menu Select case 0: //Set Mode of Operation mode = 99; //Detector->GetMode(); xil_printf("\n\r Waveform Data: \t Enter 0 <return>\n\r"); xil_printf(" LPF Waveform Data: \t Enter 1 <return>\n\r"); xil_printf(" DFF Waveform Data: \t Enter 2 <return>\n\r"); xil_printf(" TRG Waveform Data: \t Enter 3 <return>\n\r"); xil_printf(" Processed Data: \t Enter 4 <return>\n\r"); ReadCommandPoll(); sscanf(RecvBuffer,"%01d",&mode); if (mode < 0 || mode > 4 ) { xil_printf("Invalid Command\n\r"); break; } // mode = 0, AA waveform // mode = 1, LPF waveform // mode = 2, DFF waveform // mode = 3, TRG waveform // mode = 4, Processed Data //Detector->SetMode(mode); // Set Mode for Detector Xil_Out32 (XPAR_AXI_GPIO_14_BASEADDR, ((u32)mode)); // Register 14 if ( mode == 0 ) { xil_printf("Transfer AA Waveforms\n\r"); } if ( mode == 1 ) { xil_printf("Transfer LPF Waveforms\n\r"); } if ( mode == 2 ) { xil_printf("Transfer DFF Waveforms\n\r"); } if ( mode == 3 ) { xil_printf("Transfer TRG Waveforms\n\r"); } if ( mode == 4 ) { xil_printf("Transfer Processed Data\n\r"); } sleep(1); // Built in Latency ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 s break; case 1: //Enable or disable the system xil_printf("\n\r Disable: Enter 0 <return>\n\r"); xil_printf(" Enable: Enter 1 <return>\n\r"); ReadCommandPoll(); sscanf(RecvBuffer,"%01d",&enable_state); if (enable_state != 0 && enable_state != 1) { xil_printf("Invalid Command\n\r"); break; } Xil_Out32(XPAR_AXI_GPIO_18_BASEADDR, ((u32)enable_state)); // Register 18 Out enabled, In Disabled if ( enable_state == 1 ) { xil_printf("DAQ Enabled\n\r"); } if ( enable_state == 0 ) { xil_printf("DAQ Disabled\n\r"); } sleep(1); // Built in Latency ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 s break; case 2: //Continuously Read of Processed Data xil_printf("\n\r ********Data Acquisition:\n\r"); xil_printf(" Press 'q' to Stop or Press Hardware USR reset button \n\r"); xil_printf(" Press <return> to Start"); ReadCommandPoll(); DAQ(); sw = 0; // broke out of the read loop, stop swith reset to 0 break; case 3: //Set Threshold xil_printf("\n\r Existing Threshold = %d \n\r",Xil_In32(XPAR_AXI_GPIO_10_BASEADDR)); xil_printf(" Enter Threshold (6144 to 10240) <return> \n\r"); ReadCommandPoll(); sscanf(RecvBuffer,"%04d",&thres); Xil_Out32(XPAR_AXI_GPIO_10_BASEADDR, ((u32)thres)); xil_printf("New Threshold = %d \n\r",Xil_In32(XPAR_AXI_GPIO_10_BASEADDR)); sleep(1); // Built in Latency ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 s break; case 4: //Set Integration Times xil_printf("\n\r Existing Integration Times \n\r"); xil_printf(" Time = 0 ns is when the Pulse Crossed Threshold \n\r"); xil_printf(" Baseline Integral Window \t [-200ns,%dns] \n\r",-52 + ((int)Xil_In32(XPAR_AXI_GPIO_0_BASEADDR))*4 ); xil_printf(" Short Integral Window \t [-200ns,%dns] \n\r",-52 + ((int)Xil_In32(XPAR_AXI_GPIO_1_BASEADDR))*4 ); xil_printf(" Long Integral Window \t [-200ns,%dns] \n\r",-52 + ((int)Xil_In32(XPAR_AXI_GPIO_2_BASEADDR))*4 ); xil_printf(" Full Integral Window \t [-200ns,%dns] \n\r",-52 + ((int)Xil_In32(XPAR_AXI_GPIO_3_BASEADDR))*4 ); xil_printf(" Change: (Y)es (N)o <return>\n\r"); ReadCommandPoll(); sscanf(RecvBuffer,"%c",&updateint); if (updateint == 'N' || updateint == 'n') { break; } if (updateint == 'Y' || updateint == 'y') { SetIntegrationTimes(0); } sleep(1); // Built in Latency ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 s break; case 5: //Perform a DMA transfer xil_printf("\n\r Perform DMA Transfer of Waveform Data\n\r"); xil_printf(" Press 'q' to Exit Transfer \n\r"); Xil_Out32 (XPAR_AXI_DMA_0_BASEADDR + 0x48, 0xa000000); Xil_Out32 (XPAR_AXI_DMA_0_BASEADDR + 0x58 , 65536); sleep(1); // Built in Latency ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 s PrintData(); // Display data to console. sw = 0; // broke out of the read loop, stop swith reset to 0 break; case 6: //Perform a DMA transfer of Processed data xil_printf("\n\r ********Perform DMA Transfer of Processed Data \n\r"); xil_printf(" Press 'q' to Exit Transfer \n\r"); //Xil_Out32 (XPAR_AXI_GPIO_18_BASEADDR, 0); // Disable : GPIO Reg Capture Module Xil_Out32 (XPAR_AXI_GPIO_15_BASEADDR, 1); // Enable: GPIO Reg to Readout Data MUX //sleep(1); // Built in Latency ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 s Xil_Out32 (XPAR_AXI_DMA_0_BASEADDR + 0x48, 0xa000000); // Transfer from BRAM to DRAM, start address 0xa000000, 16-bit length Xil_Out32 (XPAR_AXI_DMA_0_BASEADDR + 0x58 , 65536); sleep(1); // Built in Latency ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 s Xil_Out32 (XPAR_AXI_GPIO_15_BASEADDR, 0); // Disable: GPIO Reg turn off Readout Data MUX ClearBuffers(); PrintData(); // Display data to console. //Xil_Out32 (XPAR_AXI_GPIO_18_BASEADDR, 1); // Enable : GPIO Reg Capture Module sw = 0; // broke out of the read loop, stop swith reset to 0 sleep(1); // Built in Latency ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 s break; case 7: //Check the Size of the Data Buffers databuff = Xil_In32 (XPAR_AXI_GPIO_11_BASEADDR); xil_printf("\n\r BRAM Data Buffer Size = %d \n\r",databuff); sleep(1); // Built in Latency ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 s break; case 8: //Clear the processed data buffers xil_printf("\n\r Clear the Data Buffers\n\r"); ClearBuffers(); sleep(1); // Built in Latency ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 s break; case 9: //Print DMA Data xil_printf("\n\r Print Data\n\r"); PrintData(); break; default : break; } // End Switch-Case Menu Select } // ******************* POLLING LOOP *******************// cleanup_platform(); // Clean up the platform, which is ... return 0; }
int main() { char buff[4]; init_platform(); int Status; XUartPs_Config *Config; int Index; u32 IntrMask = 0; int BadByteCount = 0; if (XGetPlatform_Info() == XPLAT_ZYNQ_ULTRA_MP) { #ifdef XPAR_XUARTPS_1_DEVICE_ID DeviceId = XPAR_XUARTPS_1_DEVICE_ID; #endif } /* * Initialize the UART driver so that it's ready to use * Look up the configuration in the config table, then initialize it. */ Config = XUartPs_LookupConfig(UART_DEVICE_ID); if (NULL == Config) { return XST_FAILURE; } Status = XUartPs_CfgInitialize(&uart, Config, Config->BaseAddress); if (Status != XST_SUCCESS) { return XST_FAILURE; } /* Check hardware build */ Status = XUartPs_SelfTest(&uart); if (Status != XST_SUCCESS) { return XST_FAILURE; } /* * Connect the UART to the interrupt subsystem such that interrupts * can occur. This function is application specific. */ Status = SetupInterruptSystem(&intc, &uart, UART_INT_IRQ_ID); if (Status != XST_SUCCESS) { return XST_FAILURE; } //force receive interrupt for every byte (char) XUartPs_SetFifoThreshold(&uart, 1); /* * Setup the handlers for the UART that will be called from the * interrupt context when data has been sent and received, specify * a pointer to the UART driver instance as the callback reference * so the handlers are able to access the instance data */ XUartPs_SetHandler(&uart, (XUartPs_Handler)Handler, &uart); /* * Enable the interrupt of the UART so interrupts will occur */ IntrMask = XUARTPS_IXR_TOUT | XUARTPS_IXR_PARITY | XUARTPS_IXR_FRAMING | XUARTPS_IXR_OVER | XUARTPS_IXR_TXEMPTY | XUARTPS_IXR_RXFULL | XUARTPS_IXR_RXOVR; if (uart.Platform == XPLAT_ZYNQ_ULTRA_MP) { IntrMask |= XUARTPS_IXR_RBRK; } XUartPs_SetInterruptMask(&uart, IntrMask); //XUartPs_SetOperMode(UartInstPtr, XUARTPS_OPER_MODE_LOCAL_LOOP); /* Set the UART in Normal Mode */ XUartPs_SetOperMode(&uart, XUARTPS_OPER_MODE_NORMAL); /* * Set the receiver timeout. If it is not set, and the last few bytes * of data do not trigger the over-water or full interrupt, the bytes * will not be received. By default it is disabled. * * The setting of 8 will timeout after 8 x 4 = 32 character times. * Increase the time out value if baud rate is high, decrease it if * baud rate is low. */ //XUartPs_SetRecvTimeout(&uart, 8); /* Run the UartPs Interrupt example, specify the the Device ID */ //currently sets up some of uart.Need to pull out what is needed Status = UartPsIntrExample(&intc, &uart,UART_DEVICE_ID, UART_INT_IRQ_ID); /* if (Status != XST_SUCCESS) { xil_printf("UART Interrupt Example Test Failed\r\n"); return XST_FAILURE; } */ xil_printf("Successfully ran UART Interrupt Example Test\r\n"); xil_printf("count = %i\r\n", count); return XST_SUCCESS; cleanup_platform(); return 0; }