int
fesetenv (const fenv_t *envp)
{
fpu_control_t fpcr;
fpu_fpsr_t fpsr;
_FPU_GETCW (fpcr);
_FPU_GETFPSR (fpsr);
fpcr &= _FPU_RESERVED;
fpsr &= _FPU_FPSR_RESERVED;
if (envp == FE_DFL_ENV)
{
fpcr |= _FPU_DEFAULT;
fpsr |= _FPU_FPSR_DEFAULT;
}
else if (envp == FE_NOMASK_ENV)
{
fpcr |= _FPU_FPCR_IEEE;
fpsr |= _FPU_FPSR_IEEE;
}
else
{
fpcr |= envp->__fpcr & ~_FPU_RESERVED;
fpsr |= envp->__fpsr & ~_FPU_FPSR_RESERVED;
}
_FPU_SETFPSR (fpsr);
_FPU_SETCW (fpcr);
return 0;
}
int
fesetenv (const fenv_t *envp)
{
fpu_control_t fpcr;
fpu_control_t fpcr_new;
fpu_control_t updated_fpcr;
fpu_fpsr_t fpsr;
fpu_fpsr_t fpsr_new;
_FPU_GETCW (fpcr);
_FPU_GETFPSR (fpsr);
fpcr_new = fpcr & _FPU_RESERVED;
fpsr_new = fpsr & _FPU_FPSR_RESERVED;
if (envp == FE_DFL_ENV)
{
fpcr_new |= _FPU_DEFAULT;
fpsr_new |= _FPU_FPSR_DEFAULT;
}
else if (envp == FE_NOMASK_ENV)
{
fpcr_new |= _FPU_FPCR_IEEE;
fpsr_new |= _FPU_FPSR_IEEE;
}
else
{
fpcr_new |= envp->__fpcr & ~_FPU_RESERVED;
fpsr_new |= envp->__fpsr & ~_FPU_FPSR_RESERVED;
}
if (fpsr != fpsr_new)
_FPU_SETFPSR (fpsr_new);
if (fpcr != fpcr_new)
_FPU_SETCW (fpcr_new);
/* Trapping exceptions are optional in AArch64 the relevant enable
bits in FPCR are RES0 hence the absence of support can be
detected by reading back the FPCR and comparing with the required
value. */
_FPU_GETCW (updated_fpcr);
if ((updated_fpcr & fpcr_new) != fpcr_new)
return 1;
return 0;
}
int
feclearexcept (int excepts)
{
fpu_fpsr_t fpsr;
fpu_fpsr_t fpsr_new;
excepts &= FE_ALL_EXCEPT;
_FPU_GETFPSR (fpsr);
fpsr_new = fpsr & ~excepts;
if (fpsr != fpsr_new)
_FPU_SETFPSR (fpsr_new);
return 0;
}
int
fesetexceptflag (const fexcept_t *flagp, int excepts)
{
fpu_fpsr_t fpsr;
fpu_fpsr_t fpsr_new;
/* Get the current environment. */
_FPU_GETFPSR (fpsr);
/* Set the desired exception mask. */
fpsr_new = fpsr & ~(excepts & FE_ALL_EXCEPT);
fpsr_new |= (*flagp & excepts & FE_ALL_EXCEPT);
/* Save state back to the FPU. */
if (fpsr != fpsr_new)
_FPU_SETFPSR (fpsr_new);
return 0;
}
int
feholdexcept (fenv_t *envp)
{
fpu_fpsr_t fpsr;
fpu_control_t fpcr;
_FPU_GETCW (fpcr);
envp->__fpcr = fpcr;
_FPU_GETFPSR (fpsr);
envp->__fpsr = fpsr;
/* Now set all exceptions to non-stop. */
fpcr &= ~(FE_ALL_EXCEPT << FE_EXCEPT_SHIFT);
/* And clear all exception flags. */
fpsr &= ~FE_ALL_EXCEPT;
_FPU_SETFPSR (fpsr);
_FPU_SETCW (fpcr);
return 0;
}