static bool hasEventsofType(const RprMidiTakePtr &midiTake, int cc)
{
if( cc > 120) {
for(int i = 0; i < __ARRAY_SIZE(eventIndexTable); ++i) {
if( cc != eventIndexTable[i].index)
continue;
if(midiTake->hasEventType(eventIndexTable[i].messageType))
return true;
return false;
}
return false;
}
if(cc == -1) {
if(midiTake->countNotes() > 0)
return true;
return false;
}
if(midiTake->countCCs(cc) > 0)
return true;
return false;
}
os_status osMpicInit()
{
mpic_memmap_t *mpic_memmap;
uint32_t total_isr_count = MPIC_NUM_OF_INTR_SOURCES + 1;
volatile uint32_t iack;
uint16_t i, j, multi_src_idx, multi_src_offset, multi_src_vector;
os_mpic_multi_src_entry_t multi_src_entries[] = MPIC_MULTI_SRC_INTERNAL_INTERRUPTS;
/*Sanity checks*/
OS_ASSERT_COND(g_dsp_mpic_handle != NULL);
mpic_memmap = &g_soc_ccsr_map->mpic_memmap;
/* totalIsrCount is initialized to MPIC_NUM_OF_INTR_SOURCES + 1 (spurious).
We also need to add entries for multi-source interrupt handlers */
for (i=0; i < __ARRAY_SIZE(multi_src_entries); i++)
total_isr_count += multi_src_entries[i].num_of_sources;
/* Initialize interrupt service table */
for (i=0; i < total_isr_count; i++)
{
/* Single device per interrupt source */
g_dsp_mpic_handle->isr_table[i].isr = osMpicUnassignedIsr;
g_dsp_mpic_handle->isr_table[i].arg = (os_mpic_arg)i; /* For error reporting */
}
/* Initialize multi-source interrupt handlers */
multi_src_offset = (uint16_t)(MPIC_NUM_OF_INTR_SOURCES + 1/* spurious */);
for (i=0; i < __ARRAY_SIZE(multi_src_entries); i++)
{
multi_src_idx = (uint16_t)(g_dsp_mpic_handle->intr_group_base_idx[OS_MPIC_INTR_GROUP_INTERNAL] + multi_src_entries[i].index);
multi_src_vector = multi_src_idx;
g_dsp_mpic_handle->isr_table[multi_src_vector].isr = osMpicMultiSourceIsr;
g_dsp_mpic_handle->isr_table[multi_src_vector].arg =
MPIC_MAKE_MULTI_SRC_HANDLE(multi_src_offset, multi_src_entries[i].num_of_sources);
multi_src_offset += multi_src_entries[i].num_of_sources;
}
/* Set the dedicated ISR to the ORed error interrupt */
g_dsp_mpic_handle->isr_table[MPIC_ORED_ERROR_VECTOR].isr = osMpicErrorIsr;
/* Set the spurious interrupt handler in the last entry */
g_dsp_mpic_handle->isr_table[MPIC_NUM_OF_INTR_SOURCES].isr = osMpicSpuriousIsr;
g_dsp_mpic_handle->isr_table[MPIC_NUM_OF_INTR_SOURCES].arg = NULL;
/* Initialize g_dsp_mpic_handle registers in master mode only */
if (g_dsp_mpic_handle->guest_id == osGetMpicMasterCore())
{
/**
* Set spurious interrupt vector.
* Under certain circumstances, the MPIC has no valid vector to return to a processor core during an interrupt acknowledge cycle.
* In these cases, the spurious vector from the spurious vector register is returned.
*/
WRITE_UINT32(mpic_memmap->mpic_global_memmap.gcr.svr, (uint32_t)MPIC_NUM_OF_INTR_SOURCES);
/* Set Mixed mode */
SET_UINT32(mpic_memmap->mpic_global_memmap.gcr.gcr, GCR_MIXED_MODE);
/* Enable message interrupts */
WRITE_UINT32(mpic_memmap->mpic_global_memmap.global_msg_a.mer, MER_INIT_MASK);
WRITE_UINT32(mpic_memmap->mpic_global_memmap.global_msg_b.mer, MER_INIT_MASK);
/* Read IACK repeatedly to clear all pending and in-service registers for all DSP cores*/
for (i=0; i <OS_SOC_MAX_NUM_OF_CORES; i++)
{
for (j=0; j < MPIC_NUM_OF_INTR_SOURCES; j++)
{
/**
* Reading IACK returns the interrupt vector corresponding to the highest priority pending interrupt
* and it also has the following side effects:
* The associated field in the corresponding interrupt pending register (IPR) is cleared for edge-sensitive interrupts.
* The corresponding in-service register (ISR) is updated.
* The corresponding int output signal from the MPIC is negated.
*/
iack = (volatile uint32_t)GET_UINT32(mpic_memmap->mpic_core_memmap.core_per_cpu_par[OS_MPIC_CORES_ID_OFFSET +i].per_cpu_par.iack);
WRITE_UINT32(mpic_memmap->mpic_core_memmap.core_per_cpu_par[OS_MPIC_CORES_ID_OFFSET +i].per_cpu_par.eoi, EOI_CODE);
}
}
}
/* Set Task Priority threshold to 0 to enable all interrupts */
for (i = 0; i< OS_SOC_MAX_NUM_OF_CORES; i++)
WRITE_UINT32(mpic_memmap->mpic_core_memmap.core_per_cpu_par[OS_MPIC_CORES_ID_OFFSET +i].per_cpu_par.ctpr, 0);
g_dsp_mpic_handle->initialized = TRUE;
return OS_SUCCESS;
}
