/** * @brief This function handles I2S interrupt request. * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains * the configuration information for I2S module * @retval None */ __weak void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s) { uint32_t tmp1 = 0, tmp2 = 0; if(hi2s->State == HAL_I2S_STATE_BUSY_RX) { tmp1 = __HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_RXNE); tmp2 = __HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE); /* I2S in mode Receiver ------------------------------------------------*/ if((tmp1 != RESET) && (tmp2 != RESET)) { I2S_Receive_IT(hi2s); } tmp1 = __HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_OVR); tmp2 = __HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR); /* I2S Overrun error interrupt occurred ---------------------------------*/ if((tmp1 != RESET) && (tmp2 != RESET)) { __HAL_I2S_CLEAR_OVRFLAG(hi2s); hi2s->ErrorCode |= HAL_I2S_ERROR_OVR; } } if(hi2s->State == HAL_I2S_STATE_BUSY_TX) { tmp1 = __HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_TXE); tmp2 = __HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE); /* I2S in mode Transmitter -----------------------------------------------*/ if((tmp1 != RESET) && (tmp2 != RESET)) { I2S_Transmit_IT(hi2s); } tmp1 = __HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_UDR); tmp2 = __HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR); /* I2S Underrun error interrupt occurred --------------------------------*/ if((tmp1 != RESET) && (tmp2 != RESET)) { __HAL_I2S_CLEAR_UDRFLAG(hi2s); hi2s->ErrorCode |= HAL_I2S_ERROR_UDR; } } /* Call the Error call Back in case of Errors */ if(hi2s->ErrorCode != HAL_I2S_ERROR_NONE) { /* Set the I2S state ready to be able to start again the process */ hi2s->State= HAL_I2S_STATE_READY; HAL_I2S_ErrorCallback(hi2s); } }
/** * @brief This function handles I2S interrupt request. * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains * the configuration information for I2S module * @retval HAL status */ void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s) { __IO uint32_t i2ssr = hi2s->Instance->SR; if(hi2s->State == HAL_I2S_STATE_BUSY_RX) { /* I2S in mode Receiver ----------------------------------------------------*/ if(((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET)) { I2S_Receive_IT(hi2s); } /* I2S Overrun error interrupt occured -------------------------------------*/ if(((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) { /* Disable RXNE and ERR interrupt */ __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); /* Set the I2S State ready */ hi2s->State = HAL_I2S_STATE_READY; /* Set the error code and execute error callback*/ hi2s->ErrorCode |= HAL_I2S_ERROR_OVR; HAL_I2S_ErrorCallback(hi2s); } } else if(hi2s->State == HAL_I2S_STATE_BUSY_TX) { /* I2S in mode Tramitter ---------------------------------------------------*/ if(((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET)) { I2S_Transmit_IT(hi2s); } /* I2S Underrun error interrupt occured ------------------------------------*/ if(((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) { /* Disable TXE and ERR interrupt */ __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); /* Set the I2S State ready */ hi2s->State = HAL_I2S_STATE_READY; /* Set the error code and execute error callback*/ hi2s->ErrorCode |= HAL_I2S_ERROR_UDR; HAL_I2S_ErrorCallback(hi2s); } } }