void uart_deinit(pyb_uart_obj_t *uart_obj) { uart_obj->is_enabled = false; UART_HandleTypeDef *uart = &uart_obj->uart; HAL_UART_DeInit(uart); if (uart->Instance == USART1) { __USART1_FORCE_RESET(); __USART1_RELEASE_RESET(); __USART1_CLK_DISABLE(); } else if (uart->Instance == USART2) { __USART2_FORCE_RESET(); __USART2_RELEASE_RESET(); __USART2_CLK_DISABLE(); } else if (uart->Instance == USART3) { __USART3_FORCE_RESET(); __USART3_RELEASE_RESET(); __USART3_CLK_DISABLE(); } else if (uart->Instance == UART4) { __UART4_FORCE_RESET(); __UART4_RELEASE_RESET(); __UART4_CLK_DISABLE(); } else if (uart->Instance == USART6) { __USART6_FORCE_RESET(); __USART6_RELEASE_RESET(); __USART6_CLK_DISABLE(); } }
void serial_free(serial_t *obj) { struct serial_s *obj_s = SERIAL_S(obj); // Reset UART and disable clock if (obj_s->uart == UART_1) { __USART1_FORCE_RESET(); __USART1_RELEASE_RESET(); __USART1_CLK_DISABLE(); } if (obj_s->uart == UART_2) { __USART2_FORCE_RESET(); __USART2_RELEASE_RESET(); __USART2_CLK_DISABLE(); } #if defined(USART3_BASE) if (obj_s->uart == UART_3) { __USART3_FORCE_RESET(); __USART3_RELEASE_RESET(); __USART3_CLK_DISABLE(); } #endif #if defined(UART4_BASE) if (obj_s->uart == UART_4) { __UART4_FORCE_RESET(); __UART4_RELEASE_RESET(); __UART4_CLK_DISABLE(); } #endif #if defined(UART5_BASE) if (obj_s->uart == UART_5) { __UART5_FORCE_RESET(); __UART5_RELEASE_RESET(); __UART5_CLK_DISABLE(); } #endif // Configure GPIOs pin_function(obj_s->pin_tx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); pin_function(obj_s->pin_rx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); serial_irq_ids[obj_s->index] = 0; }
void serial_free(serial_t *obj) { // Reset UART and disable clock switch (obj->uart) { case UART_1: __USART1_FORCE_RESET(); __USART1_RELEASE_RESET(); __USART1_CLK_DISABLE(); break; case UART_2: __USART2_FORCE_RESET(); __USART2_RELEASE_RESET(); __USART2_CLK_DISABLE(); break; case UART_3: __USART3_FORCE_RESET(); __USART3_RELEASE_RESET(); __USART3_CLK_DISABLE(); break; case UART_4: __UART4_FORCE_RESET(); __UART4_RELEASE_RESET(); __UART4_CLK_DISABLE(); break; case UART_5: __UART5_FORCE_RESET(); __UART5_RELEASE_RESET(); __UART5_CLK_DISABLE(); break; case UART_6: __USART6_FORCE_RESET(); __USART6_RELEASE_RESET(); __USART6_CLK_DISABLE(); break; } // Configure GPIOs pin_function(obj->pin_tx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); pin_function(obj->pin_rx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); serial_irq_ids[obj->index] = 0; }
void serial_free(serial_t *obj) { // Reset UART and disable clock switch (SERIAL_OBJ(uart)) { case UART_1: __USART1_FORCE_RESET(); __USART1_RELEASE_RESET(); __USART1_CLK_DISABLE(); break; case UART_2: __USART2_FORCE_RESET(); __USART2_RELEASE_RESET(); __USART2_CLK_DISABLE(); break; #if defined(USART3_BASE) case UART_3: __USART3_FORCE_RESET(); __USART3_RELEASE_RESET(); __USART3_CLK_DISABLE(); break; #endif #if defined(UART4_BASE) case UART_4: __UART4_FORCE_RESET(); __UART4_RELEASE_RESET(); __UART4_CLK_DISABLE(); #if DEVICE_SERIAL_ASYNCH_DMA __HAL_RCC_DMA1_CLK_DISABLE(); #endif break; #endif #if defined(UART5_BASE) case UART_5: __UART5_FORCE_RESET(); __UART5_RELEASE_RESET(); __UART5_CLK_DISABLE(); break; #endif #if defined(USART6_BASE) case UART_6: __USART6_FORCE_RESET(); __USART6_RELEASE_RESET(); __USART6_CLK_DISABLE(); break; #endif #if defined(UART7_BASE) case UART_7: __UART7_FORCE_RESET(); __UART7_RELEASE_RESET(); __UART7_CLK_DISABLE(); break; #endif #if defined(UART8_BASE) case UART_8: __UART8_FORCE_RESET(); __UART8_RELEASE_RESET(); __UART8_CLK_DISABLE(); break; #endif } // Configure GPIOs pin_function(SERIAL_OBJ(pin_tx), STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); pin_function(SERIAL_OBJ(pin_rx), STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); serial_irq_ids[SERIAL_OBJ(index)] = 0; }
void serial_free(serial_t *obj) { struct serial_s *obj_s = SERIAL_S(obj); // Reset UART and disable clock switch (obj_s->index) { case 0: __USART1_FORCE_RESET(); __USART1_RELEASE_RESET(); __USART1_CLK_DISABLE(); break; case 1: __USART2_FORCE_RESET(); __USART2_RELEASE_RESET(); __USART2_CLK_DISABLE(); break; #if defined(USART3_BASE) case 2: __USART3_FORCE_RESET(); __USART3_RELEASE_RESET(); __USART3_CLK_DISABLE(); break; #endif #if defined(UART4_BASE) case 3: __UART4_FORCE_RESET(); __UART4_RELEASE_RESET(); __UART4_CLK_DISABLE(); break; #endif #if defined(UART5_BASE) case 4: __UART5_FORCE_RESET(); __UART5_RELEASE_RESET(); __UART5_CLK_DISABLE(); break; #endif #if defined(USART6_BASE) case 5: __USART6_FORCE_RESET(); __USART6_RELEASE_RESET(); __USART6_CLK_DISABLE(); break; #endif #if defined(UART7_BASE) case 6: __UART7_FORCE_RESET(); __UART7_RELEASE_RESET(); __UART7_CLK_DISABLE(); break; #endif #if defined(UART8_BASE) case 7: __UART8_FORCE_RESET(); __UART8_RELEASE_RESET(); __UART8_CLK_DISABLE(); break; #endif } // Configure GPIOs pin_function(obj_s->pin_tx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); pin_function(obj_s->pin_rx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); serial_irq_ids[obj_s->index] = 0; }
void serial_free(serial_t *obj) { // Reset UART and disable clock switch (SERIAL_OBJ(index)) { case 0: __USART1_FORCE_RESET(); __USART1_RELEASE_RESET(); __USART1_CLK_DISABLE(); break; case 1: __USART2_FORCE_RESET(); __USART2_RELEASE_RESET(); __USART2_CLK_DISABLE(); #if DEVICE_SERIAL_ASYNCH_DMA __HAL_RCC_DMA1_CLK_DISABLE(); #endif break; #if defined(USART3_BASE) case 2: __USART3_FORCE_RESET(); __USART3_RELEASE_RESET(); __USART3_CLK_DISABLE(); break; #endif #if defined(UART4_BASE) case 3: __UART4_FORCE_RESET(); __UART4_RELEASE_RESET(); __UART4_CLK_DISABLE(); #if DEVICE_SERIAL_ASYNCH_DMA __HAL_RCC_DMA1_CLK_DISABLE(); #endif break; #endif #if defined(UART5_BASE) case 4: __UART5_FORCE_RESET(); __UART5_RELEASE_RESET(); __UART5_CLK_DISABLE(); break; #endif #if defined(USART6_BASE) case 5: __USART6_FORCE_RESET(); __USART6_RELEASE_RESET(); __USART6_CLK_DISABLE(); break; #endif #if defined(UART7_BASE) case 6: __UART7_FORCE_RESET(); __UART7_RELEASE_RESET(); __UART7_CLK_DISABLE(); break; #endif #if defined(UART8_BASE) case 7: __UART8_FORCE_RESET(); __UART8_RELEASE_RESET(); __UART8_CLK_DISABLE(); break; #endif } // Configure GPIOs pin_function(SERIAL_OBJ(pin_tx), STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); pin_function(SERIAL_OBJ(pin_rx), STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); serial_irq_ids[SERIAL_OBJ(index)] = 0; DEBUG_PRINTF("UART%u: Free\n", obj->serial.module+1); }
void serial_init(serial_t *obj, PinName tx, PinName rx) { struct serial_s *obj_s = SERIAL_S(obj); // Determine the UART to use (UART_1, UART_2, ...) UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX); UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX); // Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object obj_s->uart = (UARTName)pinmap_merge(uart_tx, uart_rx); MBED_ASSERT(obj_s->uart != (UARTName)NC); // Enable USART clock + switch to SystemClock if (obj_s->uart == UART_1) { __USART1_FORCE_RESET(); __USART1_RELEASE_RESET(); __USART1_CLK_ENABLE(); #if defined(RCC_USART1CLKSOURCE_SYSCLK) __HAL_RCC_USART1_CONFIG(RCC_USART1CLKSOURCE_SYSCLK); #endif obj_s->index = 0; } #if defined(USART2_BASE) if (obj_s->uart == UART_2) { __USART2_FORCE_RESET(); __USART2_RELEASE_RESET(); __USART2_CLK_ENABLE(); #if defined(RCC_USART2CLKSOURCE_SYSCLK) __HAL_RCC_USART2_CONFIG(RCC_USART2CLKSOURCE_SYSCLK); #endif obj_s->index = 1; } #endif #if defined(USART3_BASE) if (obj_s->uart == UART_3) { __USART3_FORCE_RESET(); __USART3_RELEASE_RESET(); __USART3_CLK_ENABLE(); #if defined(RCC_USART3CLKSOURCE_SYSCLK) __HAL_RCC_USART3_CONFIG(RCC_USART3CLKSOURCE_SYSCLK); #endif obj_s->index = 2; } #endif #if defined(UART4_BASE) if (obj_s->uart == UART_4) { __UART4_FORCE_RESET(); __UART4_RELEASE_RESET(); __UART4_CLK_ENABLE(); #if defined(RCC_UART4CLKSOURCE_SYSCLK) __HAL_RCC_UART4_CONFIG(RCC_UART4CLKSOURCE_SYSCLK); #endif obj_s->index = 3; } #endif #if defined(UART5_BASE) if (obj_s->uart == UART_5) { __HAL_RCC_UART5_FORCE_RESET(); __HAL_RCC_UART5_RELEASE_RESET(); __UART5_CLK_ENABLE(); #if defined(RCC_UART5CLKSOURCE_SYSCLK) __HAL_RCC_UART5_CONFIG(RCC_UART5CLKSOURCE_SYSCLK); #endif obj_s->index = 4; } #endif // Configure the UART pins pinmap_pinout(tx, PinMap_UART_TX); pinmap_pinout(rx, PinMap_UART_RX); if (tx != NC) { pin_mode(tx, PullUp); } if (rx != NC) { pin_mode(rx, PullUp); } // Configure UART obj_s->baudrate = 9600; obj_s->databits = UART_WORDLENGTH_8B; obj_s->stopbits = UART_STOPBITS_1; obj_s->parity = UART_PARITY_NONE; #if DEVICE_SERIAL_FC obj_s->hw_flow_ctl = UART_HWCONTROL_NONE; #endif obj_s->pin_tx = tx; obj_s->pin_rx = rx; init_uart(obj); // For stdio management if (obj_s->uart == STDIO_UART) { stdio_uart_inited = 1; memcpy(&stdio_uart, obj, sizeof(serial_t)); } }
void serial_free(serial_t *obj) { // Reset UART and disable clock switch (obj->serial.module) { case 0: __USART1_FORCE_RESET(); __USART1_RELEASE_RESET(); __USART1_CLK_DISABLE(); break; case 1: __USART2_FORCE_RESET(); __USART2_RELEASE_RESET(); __USART2_CLK_DISABLE(); break; #if defined(USART3_BASE) case 2: __USART3_FORCE_RESET(); __USART3_RELEASE_RESET(); __USART3_CLK_DISABLE(); break; #endif #if defined(UART4_BASE) case 3: __UART4_FORCE_RESET(); __UART4_RELEASE_RESET(); __UART4_CLK_DISABLE(); break; #endif #if defined(UART5_BASE) case 4: __UART5_FORCE_RESET(); __UART5_RELEASE_RESET(); __UART5_CLK_DISABLE(); break; #endif case 5: __USART6_FORCE_RESET(); __USART6_RELEASE_RESET(); __USART6_CLK_DISABLE(); break; #if defined(UART7_BASE) case 6: __UART7_FORCE_RESET(); __UART7_RELEASE_RESET(); __UART7_CLK_DISABLE(); break; #endif #if defined(UART8_BASE) case 7: __UART8_FORCE_RESET(); __UART8_RELEASE_RESET(); __UART8_CLK_DISABLE(); break; #endif } // Configure GPIOs pin_function(obj->serial.pin_tx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); pin_function(obj->serial.pin_rx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); DEBUG_PRINTF("UART%u: Free\n", obj->serial.module+1); }