/** \brief Test case: TC_CoreFunc_FAULTMASK \details - Check if __get_FAULTMASK and __set_FAULTMASK intrinsic can be used to manipulate FAULTMASK. - Check if __enable_fault_irq and __disable_fault_irq are reflected in FAULTMASK. */ void TC_CoreFunc_FAULTMASK (void) { uint32_t orig = __get_FAULTMASK(); // toggle faultmask uint32_t faultmask = (orig & ~0x01U) | (~orig & 0x01U); __set_FAULTMASK(faultmask); uint32_t result = __get_FAULTMASK(); ASSERT_TRUE(result == faultmask); __disable_fault_irq(); result = __get_FAULTMASK(); ASSERT_TRUE((result & 0x01U) == 1U); __enable_fault_irq(); result = __get_FAULTMASK(); ASSERT_TRUE((result & 0x01U) == 0U); __disable_fault_irq(); result = __get_FAULTMASK(); ASSERT_TRUE((result & 0x01U) == 1U); __set_FAULTMASK(orig); }
void MCU_Reset(void) { #ifdef _USE_BM03 __disable_fault_irq(); // STM32 软复�? NVIC_SystemReset(); #endif }
/******************************************************************** * FlashROMの消去、または書き込みを RAM上で実行する. ******************************************************************** この関数はFlashROM上のコードを直接呼んではいけません。 RAM上にコピーしたものを呼び出してください。 */ int FM3_FlashEraseWrite(int cmd,int adrs,short *buf,int size) { int i,d0,d1,d2,d7,data; int err = 0; int bank = adrs & FM3_ROM_MASK; FM3_FLASH_IF_TypeDef *flash_if=FM3_FLASH_IF; __disable_irq(); __disable_fault_irq(); rom_cmd1 = (ushort *) (FM3_ROM_CMD1); // =0x1550 rom_cmd2 = (ushort *) (FM3_ROM_CMD2); // =0x0aa8 rom_cmdp = (ushort *) (bank); flash_if->FASZR = 0x01; // '01' Flash ROM 16bitアクセス dummy_val = flash_if->FASZR; // ダミーリード. (void) dummy_val; if( cmd == FM3_ERASE_CMD) { { ERASE_CMD(); //消去シーケンスコマンド発行. ROMCMDP(0x30); //消去アドレスに0x30を書き込む. d0 = *rom_cmdp; //ダミーリード. (void) d0; #if 1 // FlashROMの構成が32bit + 32bit構成なので、 // 奇数ワードのエリア(xxxxxxx4など) も一緒に消す. { rom_cmdp[2] = 0x30; d7 = *rom_cmdp & TOGG; //1回目読み出し実行. d1 = *rom_cmdp; //2回目読み出し実行. // d1のSETIビット監視(35uS超過チェック)はここでは省略 } #endif //消去完了? while(1) { d7 = *rom_cmdp & TOGG; //1回目読み出し実行. d1 = *rom_cmdp; //2回目読み出し実行. if((d1 & TOGG)==d7) break; //反転データでなければ抜ける. if((d1 & TLOV)) { //TLOV==1なら、タイミングリミット超過. d7 = *rom_cmdp & TOGG; //1回目読み出し実行. d1 = *rom_cmdp; //2回目読み出し実行. if((d1 & TOGG)==d7) break; //反転データでなければ抜ける. //書き込みエラー発生. err=1;break; } //TLOV==0ならwhileループの頭へ. } } } if( cmd == FM3_WRITE_CMD) { size = (size+1) >> 1; rom_cmdp = (ushort *) (adrs); for(i=0;i<size;i++) { data = *buf++; d7 = data & DPOL; //書き込みデータのbit7. WRITE_CMD(); //書き込みシーケンスコマンド発行. ROMCMDP(data); //ハーフワード書き込み. d0 = *rom_cmdp; //ダミーリード. (void) d0; //書き込み完了? while(1) { d1 = *rom_cmdp; //読み出し実行. if((d1 & DPOL)==d7) break; //反転データでなければ抜ける. if((d1 & TLOV)) { //TLOV==1なら、タイミングリミット超過. d2 = *rom_cmdp; //さらに読み出し実行. if((d2 & DPOL)==d7) break; //反転データでなければ抜ける. //書き込みエラー発生. err=1;break; } //TLOV==0ならwhileループの頭へ. } if(err) break; //書き込みエラー発生. //次のアドレス. rom_cmdp++; } }
/* power off whole system, save user data to flash before call this func. * BE SUURE: all hardware has been closed and it's prcm config setted to default value. * @type:0:shutdown, 1:reboot */ static void pm_power_off(pm_operate_t type) { __record_dbg_status(PM_POWEROFF | 0); if (type == PM_REBOOT) { PM_REBOOT(); /* never return */ } #ifdef __CONFIG_ARCH_APP_CORE /* step 1 & 2 has been done when wlan sys poweroff */ /* step3: writel(0x0f, GPRCM_SYS1_WAKEUP_CTRL) to tell PMU that turn on * SW1, SW2, SRSW1, LDO before release application system reset signal. */ HAL_PRCM_SetSys1WakeupPowerFlags(0x0f); __record_dbg_status(PM_POWEROFF | 5); /* step4: writel(0x0f, GPRCM_SYS1_SLEEP_CTRL) to tell PMU that turn off SW1, * SW3 SRSW1, LDO after pull down application system reset signal. */ HAL_PRCM_SetSys1SleepPowerFlags(0x0f); __record_dbg_status(PM_POWEROFF | 7); /* step5: switch to HOSC, close SYS1_CLK. */ PM_SystemDeinit(); __record_dbg_status(PM_POWEROFF | 9); /* step6: set nvic deepsleep flag, and enter wfe. */ SCB->SCR = 0x14; PM_SetCPUBootFlag(0); __disable_fault_irq(); __disable_irq(); if (check_wakeup_irqs()) { PM_REBOOT(); } wfe(); if (check_wakeup_irqs()) { PM_REBOOT(); } wfe(); /* some irq generated when second wfe */ PM_REBOOT(); __record_dbg_status(PM_POWEROFF | 0x0ff); #else /* net cpu */ /* check wifi is closed by app? */ PM_WARN_ON(HAL_PRCM_IsSys3Release()); /* step1: cpu to switch to HOSC */ HAL_PRCM_SetCPUNClk(PRCM_CPU_CLK_SRC_HFCLK, PRCM_SYS_CLK_FACTOR_80M); __record_dbg_status(PM_POWEROFF | 1); /* step2: turn off SYSCLK2. */ HAL_PRCM_DisableSysClk2(PRCM_SYS_CLK_FACTOR_80M); __record_dbg_status(PM_POWEROFF | 3); PM_SystemDeinit(); /* step3: enter WFI state */ arch_suspend_disable_irqs(); while (1) wfi(); __record_dbg_status(PM_POWEROFF | 0x0ff); #endif }
/***cpu reset***/ void mcu_reset(void) { __disable_fault_irq(); NVIC_SystemReset(); }