static void check_and_cede_processor(void) { /* * Ensure our interrupt state is properly tracked, * also checks if no interrupt has occurred while we * were soft-disabled */ if (prep_irq_for_idle()) { cede_processor(); #ifdef CONFIG_TRACE_IRQFLAGS /* Ensure that H_CEDE returns with IRQs on */ if (WARN_ON(!(mfmsr() & MSR_EE))) __hard_irq_enable(); #endif } }
static void cbe_power_save(void) { unsigned long ctrl, thread_switch_control; /* Ensure our interrupt state is properly tracked */ if (!prep_irq_for_idle()) return; ctrl = mfspr(SPRN_CTRLF); /* Enable DEC and EE interrupt request */ thread_switch_control = mfspr(SPRN_TSC_CELL); thread_switch_control |= TSC_CELL_EE_ENABLE | TSC_CELL_EE_BOOST; switch (ctrl & CTRL_CT) { case CTRL_CT0: thread_switch_control |= TSC_CELL_DEC_ENABLE_0; break; case CTRL_CT1: thread_switch_control |= TSC_CELL_DEC_ENABLE_1; break; default: printk(KERN_WARNING "%s: unknown configuration\n", __func__); break; } mtspr(SPRN_TSC_CELL, thread_switch_control); /* * go into low thread priority, medium priority will be * restored for us after wake-up. */ HMT_low(); /* * atomically disable thread execution and runlatch. * External and Decrementer exceptions are still handled when the * thread is disabled but now enter in cbe_system_reset_exception() */ ctrl &= ~(CTRL_RUNLATCH | CTRL_TE); mtspr(SPRN_CTRLT, ctrl); /* Re-enable interrupts in MSR */ __hard_irq_enable(); }
static void cbe_power_save(void) { unsigned long ctrl, thread_switch_control; /* Ensure our interrupt state is properly tracked */ if (!prep_irq_for_idle()) return; ctrl = mfspr(SPRN_CTRLF); thread_switch_control = mfspr(SPRN_TSC_CELL); thread_switch_control |= TSC_CELL_EE_ENABLE | TSC_CELL_EE_BOOST; switch (ctrl & CTRL_CT) { case CTRL_CT0: thread_switch_control |= TSC_CELL_DEC_ENABLE_0; break; case CTRL_CT1: thread_switch_control |= TSC_CELL_DEC_ENABLE_1; break; default: printk(KERN_WARNING "%s: unknown configuration\n", __func__); break; } mtspr(SPRN_TSC_CELL, thread_switch_control); HMT_low(); ctrl &= ~(CTRL_RUNLATCH | CTRL_TE); mtspr(SPRN_CTRLT, ctrl); /* Re-enable interrupts in MSR */ __hard_irq_enable(); }