void uart3_init (void)
{
__disable_irqn(UART3_IRQn);
/* Enable UART3 module */
__set_PCONP(PCUART3, 1);
__set_PCLKSEL(PCLK_UART3, PCLKDIV);
/* Initialize UART */
U3LCR = 0x83; /* Select baud rate divisor latch */
U3DLM = DLVAL3 / 256; /* Set BRG dividers */
U3DLL = DLVAL3 % 256;
U3FDR = (MULVAL << 4) | DIVADD;
U3LCR = 0x03; /* Set serial format N81 and deselect divisor latch */
U3FCR = 0x87; /* Enable FIFO */
U3TER = 0x80; /* Enable Tansmission */
/* Clear Tx/Rx buffers */
TxBuff3.ri = 0; TxBuff3.wi = 0; TxBuff3.ct = 0; TxBuff3.act = 0;
RxBuff3.ri = 0; RxBuff3.wi = 0; RxBuff3.ct = 0;
/* Attach UART3 to I/O pad */
__set_PINSEL(0, 1, 2); /* P0.1 - TXD3 */\
__set_PINSEL(0, 0, 2); /* P0.0 - RXD3 */\
/* Enable Tx/Rx/Error interrupts */
U3IER = 0x07;
__enable_irqn(UART3_IRQn);
}
void uart2_init (void)
{
__disable_irqn(UART2_IRQn);
/* Enable UART2 module */
__set_PCONP(PCUART2, 1);
__set_PCLKSEL(PCLK_UART2, PCLKDIV);
/* Initialize UART */
U2LCR = 0x83; /* Select baud rate divisor latch */
U2DLM = DLVAL2 / 256; /* Set BRG dividers */
U2DLL = DLVAL2 % 256;
U2FDR = (MULVAL << 4) | DIVADD;
U2LCR = 0x03; /* Set serial format N81 and deselect divisor latch */
U2FCR = 0x87; /* Enable FIFO */
U2TER = 0x80; /* Enable Tansmission */
/* Clear Tx/Rx buffers */
TxBuff2.ri = 0; TxBuff2.wi = 0; TxBuff2.ct = 0; TxBuff2.act = 0;
RxBuff2.ri = 0; RxBuff2.wi = 0; RxBuff2.ct = 0;
/* Attach UART2 to I/O pad */
__set_PINSEL(0, 11, 1); /* P0.11 - TXD2 */\
__set_PINSEL(0, 10, 1); /* P0.10 - RXD2 */\
/* Enable Tx/Rx/Error interrupts */
U2IER = 0x07;
__enable_irqn(UART2_IRQn);
}
void uart0_init (void)
{
__disable_irqn(UART0_IRQn);
/* Enable UART0 module */
__set_PCONP(PCUART0, 1);
__set_PCLKSEL(PCLK_UART0, PCLKDIV);
/* Initialize UART */
U0LCR = 0x83; /* Select baud rate divisor latch */
U0DLM = DLVAL0 / 256; /* Set BRG dividers */
U0DLL = DLVAL0 % 256;
U0FDR = (MULVAL << 4) | DIVADD;
U0LCR = 0x03; /* Set serial format N81 and deselect divisor latch */
U0FCR = 0x87; /* Enable FIFO */
U0TER = 0x80; /* Enable Tansmission */
/* Clear Tx/Rx buffers */
TxBuff0.ri = 0; TxBuff0.wi = 0; TxBuff0.ct = 0; TxBuff0.act = 0;
RxBuff0.ri = 0; RxBuff0.wi = 0; RxBuff0.ct = 0;
/* Attach UART0 to I/O pad */
__set_PINSEL(0, 3, 1); /* P0.3 - RXD0 */\
__set_PINSEL(0, 2, 1); /* P0.2 - TXD0 */\
/* Enable Tx/Rx/Error interrupts */
U0IER = 0x07;
__enable_irqn(UART0_IRQn);
}
void uart1_init (void)
{
__disable_irqn(UART1_IRQn);
/* Enable UART1 module */
__set_PCONP(PCUART1, 1);
__set_PCLKSEL(PCLK_UART1, PCLKDIV);
/* Initialize UART */
U1LCR = 0x83; /* Select baud rate divisor latch */
U1DLM = DLVAL1 / 256; /* Set BRG dividers */
U1DLL = DLVAL1 % 256;
U1FDR = (MULVAL << 4) | DIVADD;
U1LCR = 0x03; /* Set serial format N81 and deselect divisor latch */
U1FCR = 0x87; /* Enable FIFO */
U1TER = 0x80; /* Enable Tansmission */
/* Clear Tx/Rx buffers */
TxBuff1.ri = 0; TxBuff1.wi = 0; TxBuff1.ct = 0; TxBuff1.act = 0;
RxBuff1.ri = 0; RxBuff1.wi = 0; RxBuff1.ct = 0;
/* Attach UART1 to I/O pad */
__set_PINSEL(0, 16, 1); /* P0.16 - RXD1 */\
__set_PINSEL(0, 15, 1); /* P0.15 - TXD1 */\
/* Enable Tx/Rx/Error interrupts */
U1IER = 0x07;
__enable_irqn(UART1_IRQn);
}
void uart_init (void)
{
__disable_irqn(UART_IRQn);
/* Enable UART module and set PCLK frequency */
__set_PCONP(PCUART, 1);
__set_PCLKSEL(PCLK_UART, PCLKDIV);
/* Initialize UART0 */
UART_LCR = 0x83; /* Select baud rate divisor latch */
UART_DLM = DLVAL / 256; /* Set BRG dividers */
UART_DLL = DLVAL % 256;
UART_FDR = (MULVAL << 4) | DIVADD;
UART_LCR = 0x03; /* Set serial format N81 and deselect divisor latch */
UART_FCR = 0x87; /* Enable FIFO */
UART_TER = 0x80; /* Enable Tansmission */
/* Clear Tx/Rx buffers */
TxBuff.ri = 0; TxBuff.wi = 0; TxBuff.ct = 0; TxBuff.act = 0;
RxBuff.ri = 0; RxBuff.wi = 0; RxBuff.ct = 0;
/* Attach UART to I/O pad */
ATTACH_UART();
/* Enable Tx/Rx/Error interrupts */
UART_IER = 0x07;
__enable_irqn(UART_IRQn);
}
