void __interrupt() __frame() Reset_Handler( void ) { /* Set flash wait states to 3 */ PREF_FCON = (PREF_FCON & 0xFFFFFFF0) | 0x00000003; SCU_GCU_PEFLAG =0xFFFFFFFF; /* Clear existing parity errors if any */ SCU_GCU_PEEN = 0; /* Disable parity */ /* * Anticipate possible ROM/RAM remapping * by loading the 'real' program address. */ __remap_pc(); /* * Initialize stack pointer. */ __setsp( _lc_ub_stack ); /* * Call a user function which initializes hardware, * such as ROM/RAM re-mapping or MMU configuration. */ SystemInit(); /* * Copy initialized sections from ROM to RAM * and clear uninitialized data sections in RAM. */ __init(); __asm( "_cptable_handled:" ); /* symbol may be used by debugger */ /* * Load VTOR register with the actual vector table * start address */ VTOR = (unsigned int)_lc_vtor_value; #ifdef __POSIX__ __setsp( _posix_boot_stack_top ); #endif #if __PROF_ENABLE__ __prof_init(); #endif #ifdef __POSIX__ exit( posix_main() ); #elif defined __USE_ARGC_ARGV exit( main( _argcv( argcv, __ARGCV_BUFSIZE ), (char **)argcv ) ); #else exit( main( 0, NULL ) ); #endif return; }
/********************************************************************************* * _cstart() - startup code, invoked from the RESET vector *********************************************************************************/ void __interrupt(0) __registerbank( cstart_rb ) _cstart( void ) { #if !__WDT_ENABLED __diswdt(); /* disable watchdog timer */ #endif /* * Initialize registers */ #ifdef __WDTCON if (__WDTCON_INIT) __WDTCON.U = __WDTCON_VALUE; #else /* when no WDTCON available, use WDTREL and WDTCS */ # ifdef __WDTREL if (__WDTREL_INIT) __WDTREL.U = __WDTREL_VALUE; # endif # ifdef __WDTCS if (__WDTCS_INIT) __WDTCS.U = (__WDTCS.U & ~__WDTCS_MASK) | (__WDTCS_VALUE & __WDTCS_MASK); # endif #endif #if __WDT_ENABLED __srvwdt(); /* serve watchdog timer */ #endif #ifdef __XPERCON if (__XPERCON_INIT) __XPERCON.U = __XPERCON_VALUE; #endif #ifdef __SYSCON # if __SYSCON_DO_MASK if ( __SYSCON_INIT) __bfld( &__SYSCON.U, ~__SYSCON_MASK, __SYSCON_VALUE & ~__SYSCON_MASK ); # else if ( __SYSCON_INIT) __SYSCON.U = __SYSCON_VALUE; # endif #endif #if defined(XPEREMU) && defined(XPERCON) && defined(SYSCON) # if (__XPERCON_VALUE & 0x07D3) && (__SYSCON_VALUE & 0x0004) && __XPEREMU_INIT __XPEREMU.U = __XPEREMU_VALUE; # endif #endif #ifdef __RSTCON # if __RSTCON_DO_MASK if ( __RSTCON_INIT) __RSTCON.U = (__RSTCON.U & ~__RSTCON_MASK) | (__RSTCON_MASK & __RSTCON_VALUE); # else if ( __RSTCON_INIT) __RSTCON.U = __RSTCON_VALUE; # endif #endif #ifdef __CPUCON1 if ( __CPUCON1_INIT) __CPUCON1.U = __CPUCON1_VALUE; #endif #ifdef __CPUCON2 if ( __CPUCON2_INIT) __CPUCON2.U = __CPUCON2_VALUE; #endif #ifdef __SYSCON0 if(__SYSCON0_INIT) __SYSCON0.U = __SYSCON0_VALUE; #endif #ifdef __SYSCON1 if(__SYSCON1_INIT) __SYSCON1.U = __SYSCON1_VALUE; #endif #ifdef __SYSCON2 if(__SYSCON2_INIT) __bfld( &__SYSCON2.U, 0x04,__SYSCON2_VALUE & 0x4 ); #endif #ifdef __SYSCON3 if(__SYSCON3_INIT) __SYSCON3.U = __SYSCON3_VALUE; #endif #ifdef __PLLCON if(__PLLCON_INIT) __PLLCON.U = __PLLCON_VALUE; #endif /* * Bus configuration */ #ifdef __EBCMOD0 # if __EBCMOD0_DO_MASK if ( __EBCMOD0_INIT) __EBCMOD0.U |= __EBCMOD0_VALUE & ~__EBCMOD0_MASK; # else if ( __EBCMOD0_INIT) __EBCMOD0.U = __EBCMOD0_VALUE; # endif #endif #ifdef __EBCMOD1 if(__EBCMOD1_INIT) __EBCMOD1.U = __EBCMOD1_VALUE; #endif #ifdef __BUSCON0 # if __BUSCON0_DO_MASK if ( __BUSCON0_INIT) __bfld( &__BUSCON0.U, ~__BUSCON0_MASK, __BUSCON0_VALUE & ~__BUSCON0_MASK ); # else if ( __BUSCON0_INIT) __BUSCON0.U = __BUSCON0_VALUE; # endif #endif #ifdef __BUSCON1 if(__ADDRSEL1_INIT) __ADDRSEL1.U = __ADDRSEL1_VALUE; if(__BUSCON1_INIT) __BUSCON1.U = __BUSCON1_VALUE; #endif #ifdef __BUSCON2 if(__ADDRSEL2_INIT) __ADDRSEL2.U = __ADDRSEL2_VALUE; if(__BUSCON2_INIT) __BUSCON2.U = __BUSCON2_VALUE; #endif #ifdef __BUSCON3 if(__ADDRSEL3_INIT) __ADDRSEL3.U = __ADDRSEL3_VALUE; if(__BUSCON3_INIT) __BUSCON3.U = __BUSCON3_VALUE; #endif #ifdef __BUSCON4 if(__ADDRSEL4_INIT) __ADDRSEL4.U = __ADDRSEL4_VALUE; if(__BUSCON4_INIT) __BUSCON4.U = __BUSCON4_VALUE; #endif #ifdef __XBCON1 if(__XBCON1_INIT) __bfld( &__XBCON1.U, 0x1fff, __XBCON1_VALUE & 0x1fff); #endif #ifdef __XADRS1 if(__XADRS1_INIT) __XADRS1.U = __XADRS1_VALUE; #endif #ifdef __XBCON2 if(__XBCON2_INIT) __bfld( &__XBCON2.U, 0x1fff, __XBCON2_VALUE & 0x1fff); #endif #ifdef __XADRS2 if(__XADRS2_INIT) __XADRS2.U = __XADRS2_VALUE; #endif #ifdef __XBCON3 if(__XBCON3_INIT) __bfld( &__XBCON3.U, 0x1fff, __XBCON3_VALUE & 0x1fff); if(__XADRS3_INIT) __XADRS3.U = __XADRS3_VALUE; #endif #ifdef __XBCON4 if(__XBCON4_INIT) __bfld( &__XBCON4.U, 0x1fff, __XBCON4_VALUE & 0x1fff); if(__XADRS4_INIT) __XADRS4.U = __XADRS4_VALUE; #endif #ifdef __XBCON5 if(__XBCON5_INIT) __bfld( &__XBCON5.U, 0x1fff, __XBCON5_VALUE & 0x1fff); if(__XADRS5_INIT) __XADRS5.U = __XADRS5_VALUE; #endif #ifdef __XBCON6 if(__XBCON6_INIT) __bfld( &__XBCON6.U, 0x1fff, __XBCON6_VALUE & 0x1fff); if(__XADRS6_INIT) __XADRS6.U = __XADRS6_VALUE; #endif #ifdef __TCONBURSTCS0 if(__TCONBURSTCS0_INIT) TCONBURSTCS0 = __TCONBURSTCS0_VALUE; #endif #ifdef __TCONCS0 if(__TCONCS0_INIT) __TCONCS0.U = __TCONCS0_VALUE; # if __FCONCS0_DO_MASK if ( __FCONCS0_INIT) __FCONCS0.U |= __FCONCS0_VALUE & ~__FCONCS0_MASK; # else if ( __FCONCS0_INIT) __FCONCS0.U = __FCONCS0_VALUE; # endif #endif #ifdef __TCONBURSTCS0 if(__TCONBURSTCS0_INIT) __TCONBURSTCS0.U = __TCONBURSTCS0_VALUE; #endif #ifdef __TCONCS0 if(__TCONCS0_INIT) __TCONCS0.U = __TCONCS0_VALUE; if(__FCONCS0_INIT) __FCONCS0.U = __FCONCS0_VALUE; #endif #ifdef __TCONBURSTCS1 if(__TCONBURSTCS1_INIT) __TCONBURSTCS1.U = __TCONBURSTCS1_VALUE; #endif #ifdef __TCONCS1 if(__ADDRSEL1_INIT) __ADDRSEL1.U = __ADDRSEL1_VALUE; if(__TCONCS1_INIT) __TCONCS1.U = __TCONCS1_VALUE; if(__FCONCS1_INIT) __FCONCS1.U = __FCONCS1_VALUE; #endif #ifdef __TCONBURSTCS2 if(__TCONBURSTCS2_INIT) __TCONBURSTCS2.U = __TCONBURSTCS2_VALUE; #endif #ifdef __TCONCS2 if(__ADDRSEL2_INIT) __ADDRSEL2.U = __ADDRSEL2_VALUE; if(__TCONCS2_INIT) __TCONCS2.U = __TCONCS2_VALUE; if(__FCONCS2_INIT) __FCONCS2.U = __FCONCS2_VALUE; #endif #ifdef __TCONBURSTCS3 if(__TCONBURSTCS3_INIT) __TCONBURSTCS3.U = __TCONBURSTCS3_VALUE; #endif #ifdef __TCONCS3 if(__ADDRSEL3_INIT) __ADDRSEL3.U = __ADDRSEL3_VALUE; if(__TCONCS3_INIT) __TCONCS3.U = __TCONCS3_VALUE; if(__FCONCS3_INIT) __FCONCS3.U = __FCONCS3_VALUE; #endif #ifdef __TCONBURSTCS4 if(__TCONBURSTCS4_INIT) __TCONBURSTCS4.U = __TCONBURSTCS4_VALUE; #endif #ifdef __TCONCS4 if(__ADDRSEL4_INIT) __ADDRSEL4.U = __ADDRSEL4_VALUE; if(__TCONCS4_INIT) __TCONCS4.U = __TCONCS4_VALUE; if(__FCONCS4_INIT) __FCONCS4.U = __FCONCS4_VALUE; #endif #ifdef __TCONBURSTCS5 if(__TCONBURSTCS5_INIT) __TCONBURSTCS5.U = __TCONBURSTCS5_VALUE; #endif #ifdef __TCONCS5 if(__ADDRSEL5_INIT) __ADDRSEL5.U = __ADDRSEL5_VALUE; if(__TCONCS5_INIT) __TCONCS5.U = __TCONCS5_VALUE; if(__FCONCS5_INIT) __FCONCS5.U = __FCONCS5_VALUE; #endif #ifdef __TCONBURSTCS6 if(__TCONBURSTCS6_INIT) __TCONBURSTCS6.U = __TCONBURSTCS6_VALUE; #endif #ifdef __TCONCS6 if(__ADDRSEL6_INIT) __ADDRSEL6.U = __ADDRSEL6_VALUE; if(__TCONCS6_INIT) __TCONCS6.U = __TCONCS6_VALUE; if(__FCONCS6_INIT) __FCONCS6.U = __FCONCS6_VALUE; #endif #ifdef __TCONBURSTCS7 if(__TCONBURSTCS7_INIT) __TCONBURSTCS7.U = __TCONBURSTCS7_VALUE; #endif #ifdef __TCONCS7 if(__ADDRSEL7_INIT) __ADDRSEL7.U = __ADDRSEL7_VALUE; if(__TCONCS7_INIT) __TCONCS7.U = __TCONCS7_VALUE; if(__FCONCS7_INIT) __FCONCS7.U = __FCONCS7_VALUE; #endif /* * Miscellaneous */ #ifdef __EXICON if(__EXICON_INIT) __EXICON.U = __EXICON_VALUE; #endif #ifdef __EXISEL0 if(__EXISEL0_INIT) __EXISEL0.U = __EXISEL0_VALUE; #endif #ifdef __EXISEL1 if(__EXISEL1_INIT) __EXISEL1.U = __EXISEL1_VALUE; #endif #ifdef __IMBCTR if(__IMBCTR_INIT) __IMBCTR.U = __IMBCTR_VALUE; #endif #ifdef __IMB_IMBCTRL if(__IMB_IMBCTRL_INIT) __IMB_IMBCTRL.U = __IMB_IMBCTRL_VALUE; #endif #ifdef __IMB_IMBCTRH if(__IMB_IMBCTRH_INIT) __IMB_IMBCTRH.U = __IMB_IMBCTRH_VALUE; #endif #ifdef __ADC_EVS if(__ADC_EVS_INIT) __ADC_EVS.U = __ADC_EVS_VALUE; #endif #ifdef __CAPCOM_EVS if(__CAPCOM_EVS_INIT) __CAPCOM_EVS.U = __CAPCOM_EVS_VALUE; #endif #ifdef __CLK_CONF if(__CLK_CONF_INIT) __CLK_CONF.U = __CLK_CONF_VALUE; #endif #ifdef __CMCTR if(__CMCTR_INIT) __CMCTR.U = __CMCTR_VALUE; #endif #ifdef __EBCCSEN if(__EBCCSEN_INIT) __EBCCSEN.U = __EBCCSEN_VALUE; #endif #ifdef __EMUPCON if(__EMUPCON_INIT) __EMUPCON.U = __EMUPCON_VALUE; #endif #ifdef __EMU_XPCON if(__EMU_XPCON_INIT) __EMU_XPCON.U = __EMU_XPCON_VALUE; #endif #ifdef __EXISEL if(__EXISEL_INIT) __EXISEL.U = __EXISEL_VALUE; #endif #ifdef __FOCON if(__FOCON_INIT) __FOCON.U = __FOCON_VALUE; #endif #ifdef __GPT_EVS if(__GPT_EVS_INIT) __GPT_EVS.U = __GPT_EVS_VALUE; #endif #ifdef __OPSEN if(__OPSEN_INIT) __OPSEN.U = __OPSEN_VALUE; #endif #ifdef __PLL_CONF if(__PLL_CONF_INIT) __PLL_CONF.U = __PLL_CONF_VALUE; #endif #ifdef __SYS_MEM if(__SYS_MEM_INIT) __SYS_MEM.U = __SYS_MEM_VALUE; #endif #ifdef __SYS_PALT if(__SYS_PALT_INIT) __SYS_PALT.U = __SYS_PALT_VALUE; #endif #ifdef __TCONCSMM if(__TCONCSMM_INIT) __TCONCSMM.U = __TCONCSMM_VALUE; #endif #ifdef __TCONCSSM if(__TCONCSSM_INIT) __TCONCSSM.U = __TCONCSSM_VALUE; #endif #ifdef __VREG_CONF if(__VREG_CONF_INIT) __VREG_CONF.U = __VREG_CONF_VALUE; #endif #ifdef __XPERCONC if(__XPERCONC_INIT) __XPERCONC.U = __XPERCONC_VALUE; #endif #ifdef __XPERCONS if(__XPERCONS_INIT) __XPERCONS.U = __XPERCONS_VALUE; #endif /* * Kernel State Configuration Registers */ #ifdef __RTC_KSCCFG if(__RTC_KSCCFG_INIT) __RTC_KSCCFG.U = __RTC_KSCCFG_VALUE; #endif #ifdef __GPT12E_KSCCFG if(__GPT12E_KSCCFG_INIT)__GPT12E_KSCCFG.U = __GPT12E_KSCCFG_VALUE; #endif #ifdef __CC2_KSCCFG if(__CC2_KSCCFG_INIT) __CC2_KSCCFG.U = __CC2_KSCCFG_VALUE; #endif #ifdef __MEM_KSCCFG if(__MEM_KSCCFG_INIT) __MEM_KSCCFG.U = __MEM_KSCCFG_VALUE; #endif #ifdef __FL_KSCCFG if(__FL_KSCCFG_INIT) __FL_KSCCFG.U = __FL_KSCCFG_VALUE; #endif #ifdef __MCAN_KSCCFG if(__MCAN_KSCCFG_INIT) __MCAN_KSCCFG.U = __MCAN_KSCCFG_VALUE; #endif /* * ICACHE */ #ifdef __ICACHE_CTRL # if __ICACHE_CTRL_DO_MASK if ( __ICACHE_CTRL_INIT) __ICACHE_CTRL.U |= __ICACHE_CTRL_VALUE & ~__ICACHE_CTRL_MASK; # else if(__ICACHE_CTRL_INIT) __ICACHE_CTRL.U = __ICACHE_CTRL_VALUE; # endif #endif #ifdef __ICACHE_EDCON if(__ICACHE_EDCON_INIT) __ICACHE_EDCON.U = __ICACHE_EDCON_VALUE; #endif #ifdef __ICACHE_DACON # if __ICACHE_DACON_DO_MASK if ( __ICACHE_DACON_INIT) __ICACHE_DACON.U |= __ICACHE_DACON_VALUE & ~__ICACHE_DACON_MASK; # else if(__ICACHE_DACON_INIT) __ICACHE_DACON.U = __ICACHE_DACON_VALUE; # endif #endif /* * Vector table segment */ #if __SET_VECSEG __VECSEG.U = __seg( _lc_vector_table ); /* use linker symbol */ #endif /* * Initialize system stack pointer and underflow and overflow registers */ __asm("$nowarning(735)" ); /* do not complain about the labels in the atomic sequence */ #if __SET_SPSEG __asm( "atomic #4" ); __SPSEG.U = __seg( _lc_ub_system_stack ); /* use linker symbol */ #else __asm( "atomic #3" ); #endif __SP.U = (int)_lc_ub_system_stack; __STKOV.U = (int)(_lc_ue_system_stack + 6 * 2); __STKUN.U = (int)_lc_ub_system_stack; /* * einit: end-of-initialization, set reset output pin /RSTOUT high */ #if __EXECUTE_EINIT __einit(); #endif #if __WDT_ENABLED __srvwdt(); #endif /* * Initialize user stack pointer */ __setsp( _lc_ub_user_stack ); /* * Initialize user stack pointers in local register banks */ #if defined(__CORE_XC16X__) || defined(__CORE_SUPER10__) #ifndef BANK /* BANK not defined in new style SFR files */ #define BANK __PSW.B.BANK #endif # if __INIT_USER_STACK1 BANK = 2; /* local registerbank 1 */ __setsp( _lc_ub_user_stack1 ); /* initialize user stack pointer */ # endif # if __INIT_USER_STACK2 BANK = 3; /* local registerbank 2 */ __setsp( _lc_ub_user_stack2 ); /* initialize user stack pointer */ # endif # if __INIT_USER_STACK1 || __INIT_USER_STACK2 BANK = 0; /* back to global registerbank */ # endif #endif /* * DPPs for near __addressing */ __DPP0.U = __pag(_lc_base_dpp0); __DPP1.U = __pag(_lc_base_dpp1); __DPP2.U = __pag(_lc_base_dpp2); /* * Initialize C variables */ if( _lc_copy_table[0].action != ac_stop ) /* only initialize if copy table contains data */ _init( __WDT_ENABLED ); /* library routine: initialize C variables */ /* * Set up profiling */ #if __PROF_ENABLE__ __prof_init(); #endif #ifndef IEN /* IEN not defined in new style SFR files */ #define IEN __PSW.B.IEN #endif if( __ENABLE_INTERRUPTS ) IEN = 1; /* enable interrupts */ #if __WDT_ENABLED __srvwdt(); /* serve watchdog timer */ #endif #if __USE_ARGC_ARGV exit( main( _argcv( argcv, __ARGCV_BUFSIZE ), (char **)argcv ) ); #else exit( main( 0, NULL ) ); /* argc is 0 */ #endif }
void _start( void ) { /* Do a dsync before changing any of the csfr values, thus any previous * background state gets flushed first. Required for applications that jump * to the reset address. */ __dsync(); /* Set the PSW to its reset value in case of a warm start */ #if __USER_STACK __mtcr(PSW, 0x00000980); /* clear PSW.IS */ #else __mtcr(PSW, 0x00000b80); #endif /* Set the PCXS and PCXO to its reset value in case of a warm start */ unsigned int pcxi = __mfcr(PCXI); pcxi &= 0xfff00000; __mtcr(PCXI, pcxi); /* * Clear the ENDINIT bit in the WDT_CON0 register in order * to disable the write-protection for registers protected * via the EndInit feature (for example: WDT_CON1). */ _endinit_clear(); /* * Disable the Watchdog if requested. Watchdog is enabled by default. * The Watchdog is disabled after ENDINIT is set by _endinit_set(). */ #if __WATCHDOG_DISABLE WDT_CON1.U |= 0x8; _endinit_set(); _endinit_clear(); #endif /* * PMI_TC.003 workaround: * The TLB-A and TLB-B mappings are set to a page size of 16KB. */ #if __PMI_TC003_INITIAL__ && defined MMU_CON unsigned int mmu_con = __mfcr(MMU_CON); mmu_con &= 0xffffffe1; /* clear SZA and SZB */ mmu_con |= 0x00000014; /* set SZA=SZB=16k */ __mtcr(MMU_CON, mmu_con); #endif /* * Load Base Address of Trap Vector Table. * Disable this if not started from RESET vector. (E.g. * ROM monitors require to keep in control of vectors) */ #if __BTV_INIT __mtcr(BTV, (unsigned int)_lc_u_trap_tab); #endif /* * Load Base Address of Interrupt Vector Table. * Disable this if not started from RESET vector. (E.g. * ROM monitors require to keep in control of vectors) */ #if __BIV_INIT __mtcr(BIV, (unsigned int)(_lc_u_int_tab)); #endif /* * Load interupt stack pointer. * Disable this if not started from RESET vector. (E.g. * ROM monitors require to keep in control of vectors) */ #if __ISP_INIT unsigned int isp = (unsigned int)(_lc_ue_istack) & STACK_ALIGN; __mtcr(ISP, isp); #endif /* * PMU/PMI configuration. */ #if defined PMI_CON0 && defined __PMI_CON0_VALUE if(__PMI_CON0_INIT) PMI_CON0.U = __PMI_CON0_VALUE; #endif #if defined PMI_CON1 && defined __PMI_CON1_VALUE if(__PMI_CON1_INIT) PMI_CON1.U = __PMI_CON1_VALUE; #endif #if defined PMI_CON2 && defined __PMI_CON2_VALUE && \ ( defined _REGTC1337_H || defined _REGTC1367_H || defined _REGTC1387_H || defined _REGTC1728_H \ || defined _REGTC1746_H || defined _REGTC1747_H || defined _REGTC1768_H || defined _REGTC1782_H \ || defined _REGTC1784_H || defined _REGTC1184_H || defined _REGTC1797_H || defined _REGTC1197_H \ || defined _REGTC1734_H || defined _REGTC1767_H || defined _REGTC1736_H || defined _REGTC1732_H \ || defined _REGTC1738_H || defined _REGTC1167_H || defined _REGTC1735_H || defined _REGTC1724_H ) if(__PMI_CON2_INIT) PMI_CON2.U = __PMI_CON2_VALUE; #endif #if defined PMU_EIFCON && defined __PMU_EIFCON_VALUE if(__PMU_EIFCON_INIT) PMU_EIFCON.U = __PMU_EIFCON_VALUE; #endif /* * DMI configuration. */ #if defined DMI_CON && defined __DMI_CON_VALUE && \ ( defined _REGTC1167_H || defined _REGTC1197_H || defined _REGTC1337_H || defined _REGTC1367_H \ || defined _REGTC1387_H || defined _REGTC1728_H || defined _REGTC1734_H || defined _REGTC1738_H \ || defined _REGTC1746_H || defined _REGTC1747_H || defined _REGTC1767_H || defined _REGTC1768_H \ || defined _REGTC1782_H || defined _REGTC1784_H || defined _REGTC1184_H || defined _REGTC1797_H \ || defined _REGTC1724_H ) if(__DMI_CON_INIT) DMI_CON.U = __DMI_CON_VALUE; #endif /* * Data cache control (Reset 0H). * CPU_TC013 workaround: * The 16KB D-Cache is enabled to workaround * the CPU_TC013 functional problem. * NOTE: Setting the D-Cache size must be done at the * very beginning of the startup code. */ #if defined DMU_CON # if __CPU_TC013_INITIAL__ DMU_CON.U = 0x1; # endif #endif /* * Bus configuration EBU_CLC within endinit. */ # if defined EBU_CLC && defined __EBU_CLC_VALUE if(__EBU_CLC_INIT) EBU_CLC.U = __EBU_CLC_VALUE; # endif /* * Setting up the PLL after Reset. * * After reset, the system clock will be running at the VCO * base frequency devided by a factor KDIV. To set up the PLL * ater resert, next action must be executed. */ #if defined PLL_CLC && defined __PLL_CLC_VALUE #if __PLL_CLC_INIT #if ( defined _REGTC11IB_H ) #define __PLLBYP PLL1_BP #define __LOCK PLL1_LOCK if ( PLL_CLC.B.__PLLBYP == 0 ) { PLL_CLC.U = __PLL_CLC_VALUE; while( PLL_CLC.B.__LOCK==0); /* Wait until the PLL becomes locked */ } #else #define __PLL_CLC_SYSFS_VALUE ((__PLL_CLC_VALUE>>2)&0x1) #define __PLL_CLC_VCOBYP_VALUE ((__PLL_CLC_VALUE>>5)&0x1) #define __PLL_CLC_VCOSEL_VALUE ((__PLL_CLC_VALUE>>6)&0x3) #define __PLL_CLC_KDIV_VALUE ((__PLL_CLC_VALUE>>8)&0xf) #define __PLL_CLC_PDIV_VALUE ((__PLL_CLC_VALUE>>13)&0x3) #define __PLL_CLC_NDIV_VALUE ((__PLL_CLC_VALUE>>16)&0x7f) if ( PLL_CLC.B.BYPPIN == 0 ) { #if ( defined _REGTC1100_H || defined _REGTC1115_H || defined _REGTC1130_H ) while (OSC_CON.B.OSCR==1); /* Wait until the oscillator is running */ #else while (OSC_CON.B.OSCR==0); /* Wait until the oscillator is running */ #endif PLL_CLC.B.VCOBYP = 1; /* Enabled the VCO Bypass Mode */ PLL_CLC.B.VCOSEL = __PLL_CLC_VCOSEL_VALUE; /* Select the VCO band */ PLL_CLC.B.PDIV = __PLL_CLC_PDIV_VALUE; PLL_CLC.B.KDIV = __PLL_CLC_KDIV_VALUE; PLL_CLC.B.NDIV = __PLL_CLC_NDIV_VALUE; #if __PLL_CLC_VCOBYP_VALUE==0 PLL_CLC.B.OSCDISC = 0; /* Connect the oscillator to the PLL */ while( PLL_CLC.B.LOCK==0); /* Wait until the PLL becomes locked */ PLL_CLC.B.VCOBYP = 0; /* Disabled the VCO Bypass Mode */ #endif } #if ( defined _REGTC1100_H || defined _REGTC1115_H || defined _REGTC1130_H ) PLL_CLC.B.SYSFSL = __PLL_CLC_SYSFS_VALUE; /* System frequency select */ #else #if ( defined _REGTC1762_H || defined _REGTC1764_H || defined _REGTC1766B_H || defined _REGTC1161_H \ || defined _REGTC1162_H || defined _REGTC1163_H || defined _REGTC1164_H || defined _REGTC1165_H \ || defined _REGTC1166_H ) PLL_CLC.B.RSV = __PLL_CLC_SYSFS_VALUE; /* System frequency select */ #else PLL_CLC.B.SYSFS = __PLL_CLC_SYSFS_VALUE; /* System frequency select */ #endif #endif #endif #endif #endif /* * System Oscillator configuration */ #if defined SCU_OSCCON && defined __SCU_OSCCON_VALUE #if __SCU_OSCCON_INIT SCU_OSCCON.U=__SCU_OSCCON_VALUE; while(SCU_OSCCON.B.PLLLV==0); /* Oscillator not too low */ while(SCU_OSCCON.B.PLLHV==0); /* Oscillator not too high */ #endif #endif /* * Configure PLL Prescaler Mode. */ #if defined SCU_PLLCON1 && defined __SCU_PLLCON1_VALUE #if __SCU_PLLCON1_INIT #define __SCU_PLLCON1__K1DIV_VALUE ((__SCU_PLLCON1_VALUE>>16)&0x3f) SCU_PLLCON1.B.K1DIV=__SCU_PLLCON1__K1DIV_VALUE; while(SCU_PLLSTAT.B.K1RDY==0); /* Wait until K1-Divider is ready to operate */ #endif #endif #if defined SCU_PLLCON0 && defined __SCU_PLLCON0_VALUE #if __SCU_PLLCON0_INIT SCU_PLLCON0.B.VCOBYP=1; /* Enabled the VCO Bypass Mode */ while(SCU_PLLSTAT.B.VCOBYST==0); /* Wait until prescaler mode is entered */ #define __SCU_PLLCON0__VCOPWD_VALUE ((__SCU_PLLCON0_VALUE>>1)&0x1) #define __SCU_PLLCON0__NDIV_VALUE ((__SCU_PLLCON0_VALUE>>9)&0x7f) #define __SCU_PLLCON0__PDIV_VALUE ((__SCU_PLLCON0_VALUE>>24)&0xf) SCU_PLLCON0.B.PDIV=__SCU_PLLCON0__PDIV_VALUE; SCU_PLLCON0.B.NDIV=__SCU_PLLCON0__NDIV_VALUE; SCU_PLLCON0.B.VCOPWD=__SCU_PLLCON0__VCOPWD_VALUE; /* power down VCO */ #if __SCU_PLLCON0__VCOPWD_VALUE==0 /* * Configure PLL normal mode. */ SCU_PLLCON0.B.CLRFINDIS=1; /* Connect VCO to the oscillator */ while(SCU_PLLSTAT.B.FINDIS==1); /* Wait until oscillator is connected to the VCO */ SCU_PLLCON0.B.RESLD=1; /* Restart VCO lock detection */ while(SCU_PLLSTAT.B.VCOLOCK==0); /* Wait until the VCO becomes locked */ SCU_PLLCON0.B.VCOBYP=0; /* Disable the VCO Bypass Mode */ while(SCU_PLLSTAT.B.VCOBYST==1); /* Wait until normal mode is entered */ #endif #endif #endif #if defined SCU_PLLCON1 && defined __SCU_PLLCON1_VALUE #if __SCU_PLLCON1_INIT #define __SCU_PLLCON1__K2DIV_VALUE ((__SCU_PLLCON1_VALUE>>0)&0x3f) SCU_PLLCON1.B.K2DIV=__SCU_PLLCON1__K2DIV_VALUE; #endif #endif /* * Configure system clock register. */ #if defined STM_CLC && defined __STM_CLC_VALUE if(__STM_CLC_INIT) STM_CLC.U = __STM_CLC_VALUE; #endif /* * Set the ENDINIT bit in the WDT_CON0 register again * to enable the write-protection and to prevent a time-out. */ _endinit_set(); /* * Initialize Bus configuration registers: * Set register-values according to define's created by the GUI * * The recommended sequence of setting registers is as follows: * 1.EBUCON * 2.All other EBU registers except SDRAM specific registers * 3.SDRMCON0 * 4.SDRMMOD0 * 5.SDRMREF0 * 6.SDRMCON1 * 7.SDRMMOD1 * 8.SDRMREF1 */ #if defined EBU_CON && defined __EBU_CON_VALUE if(__EBU_CON_INIT) EBU_CON.U = __EBU_CON_VALUE; #endif #if defined EBU_ADDRSEL0 && defined __EBU_ADDRSEL0_VALUE if(__EBU_ADDRSEL0_INIT) EBU_ADDRSEL0.U = __EBU_ADDRSEL0_VALUE; #endif #if defined EBU_ADDRSEL1 && defined __EBU_ADDRSEL1_VALUE if(__EBU_ADDRSEL1_INIT) EBU_ADDRSEL1.U = __EBU_ADDRSEL1_VALUE; #endif #if defined EBU_ADDRSEL2 && defined __EBU_ADDRSEL2_VALUE if(__EBU_ADDRSEL2_INIT) EBU_ADDRSEL2.U = __EBU_ADDRSEL2_VALUE; #endif #if defined EBU_ADDRSEL3 && defined __EBU_ADDRSEL3_VALUE if(__EBU_ADDRSEL3_INIT) EBU_ADDRSEL3.U = __EBU_ADDRSEL3_VALUE; #endif #if defined EBU_ADDRSEL4 && defined __EBU_ADDRSEL4_VALUE if(__EBU_ADDRSEL4_INIT) EBU_ADDRSEL4.U = __EBU_ADDRSEL4_VALUE; #endif #if defined EBU_ADDRSEL5 && defined __EBU_ADDRSEL5_VALUE if(__EBU_ADDRSEL5_INIT) EBU_ADDRSEL5.U = __EBU_ADDRSEL5_VALUE; #endif #if defined EBU_ADDRSEL6 && defined __EBU_ADDRSEL6_VALUE if(__EBU_ADDRSEL6_INIT) EBU_ADDRSEL6.U = __EBU_ADDRSEL6_VALUE; #endif #if defined EBU_BFCON && defined __EBU_BFCON_VALUE if(__EBU_BFCON_INIT) EBU_BFCON.U = __EBU_BFCON_VALUE; #endif #if defined EBU_BUSAP0 && defined __EBU_BUSAP0_VALUE if(__EBU_BUSAP0_INIT) EBU_BUSAP0.U = __EBU_BUSAP0_VALUE; #endif #if defined EBU_BUSAP1 && defined __EBU_BUSAP1_VALUE if(__EBU_BUSAP1_INIT) EBU_BUSAP1.U = __EBU_BUSAP1_VALUE; #endif #if defined EBU_BUSAP2 && defined __EBU_BUSAP2_VALUE if(__EBU_BUSAP2_INIT) EBU_BUSAP2.U = __EBU_BUSAP2_VALUE; #endif #if defined EBU_BUSAP3 && defined __EBU_BUSAP3_VALUE if(__EBU_BUSAP3_INIT) EBU_BUSAP3.U = __EBU_BUSAP3_VALUE; #endif #if defined EBU_BUSAP4 && defined __EBU_BUSAP4_VALUE if(__EBU_BUSAP4_INIT) EBU_BUSAP4.U = __EBU_BUSAP4_VALUE; #endif #if defined EBU_BUSAP5 && defined __EBU_BUSAP5_VALUE if(__EBU_BUSAP5_INIT) EBU_BUSAP5.U = __EBU_BUSAP5_VALUE; #endif #if defined EBU_BUSAP6 && defined __EBU_BUSAP6_VALUE if(__EBU_BUSAP6_INIT) EBU_BUSAP6.U = __EBU_BUSAP6_VALUE; #endif #if defined EBU_BUSCON0 && defined __EBU_BUSCON0_VALUE if(__EBU_BUSCON0_INIT) EBU_BUSCON0.U = __EBU_BUSCON0_VALUE; #endif #if defined EBU_BUSCON1 && defined __EBU_BUSCON1_VALUE if(__EBU_BUSCON1_INIT) EBU_BUSCON1.U = __EBU_BUSCON1_VALUE; #endif #if defined EBU_BUSCON2 && defined __EBU_BUSCON2_VALUE if(__EBU_BUSCON2_INIT) EBU_BUSCON2.U = __EBU_BUSCON2_VALUE; #endif #if defined EBU_BUSCON3 && defined __EBU_BUSCON3_VALUE if(__EBU_BUSCON3_INIT) EBU_BUSCON3.U = __EBU_BUSCON3_VALUE; #endif #if defined EBU_BUSCON4 && defined __EBU_BUSCON4_VALUE if(__EBU_BUSCON4_INIT) EBU_BUSCON4.U = __EBU_BUSCON4_VALUE; #endif #if defined EBU_BUSCON5 && defined __EBU_BUSCON5_VALUE if(__EBU_BUSCON5_INIT) EBU_BUSCON5.U = __EBU_BUSCON5_VALUE; #endif #if defined EBU_BUSCON6 && defined __EBU_BUSCON6_VALUE if(__EBU_BUSCON6_INIT) EBU_BUSCON6.U = __EBU_BUSCON6_VALUE; #endif #if defined EBU_EMUAS && defined __EBU_EMUAS_VALUE if(__EBU_EMUAS_INIT) EBU_EMUAS.U = __EBU_EMUAS_VALUE; #endif #if defined EBU_EMUBAP && defined __EBU_EMUBAP_VALUE if(__EBU_EMUBAP_INIT) EBU_EMUBAP.U = __EBU_EMUBAP_VALUE; #endif #if defined EBU_EMUBC && defined __EBU_EMUBC_VALUE if(__EBU_EMUBC_INIT) EBU_EMUBC.U = __EBU_EMUBC_VALUE; #endif #if defined EBU_EMUCON && defined __EBU_EMUCON_VALUE if(__EBU_EMUCON_INIT) EBU_EMUCON.U = __EBU_EMUCON_VALUE; #endif #if defined EBU_EMUOVL && defined __EBU_EMUOVL_VALUE if(__EBU_EMUOVL_INIT) EBU_EMUOVL.U = __EBU_EMUOVL_VALUE; #endif #if defined EBU_SDRMCON0 && defined __EBU_SDRMCON0_VALUE if(__EBU_SDRMCON0_INIT) EBU_SDRMCON0.U = __EBU_SDRMCON0_VALUE; #endif #if defined EBU_SDRMOD0 && defined __EBU_SDRMOD0_VALUE if(__EBU_SDRMOD0_INIT) EBU_SDRMOD0.U = __EBU_SDRMOD0_VALUE; #endif #if defined EBU_SDRMREF0 && defined __EBU_SDRMREF0_VALUE if(__EBU_SDRMREF0_INIT) EBU_SDRMREF0.U = __EBU_SDRMREF0_VALUE; #endif #if defined EBU_SDRMCON1 && defined __EBU_SDRMCON1_VALUE if(__EBU_SDRMCON1_INIT) EBU_SDRMCON1.U = __EBU_SDRMCON1_VALUE; #endif #if defined EBU_SDRMOD1 && defined __EBU_SDRMOD1_VALUE if(__EBU_SDRMOD1_INIT) EBU_SDRMOD1.U = __EBU_SDRMOD1_VALUE; #endif #if defined EBU_SDRMREF1 && defined __EBU_SDRMREF1_VALUE if(__EBU_SDRMREF1_INIT) EBU_SDRMREF1.U = __EBU_SDRMREF1_VALUE; #endif #if defined CBS_MCDBBS && defined __CBS_MCDBBS_VALUE if(__CBS_MCDBBS_INIT) CBS_MCDBBS .U = __CBS_MCDBBS_VALUE; #endif #if defined SBCU_CON && defined __SBCU_CON_VALUE if(__SBCU_CON_INIT) SBCU_CON.U = __SBCU_CON_VALUE; #endif #if defined EBU_BUSRAP1 && defined __EBU_BUSRAP1_VALUE if(__EBU_BUSRAP1_INIT) EBU_BUSRAP1.U = __EBU_BUSRAP1_VALUE; #endif #if defined EBU_BUSRAP0 && defined __EBU_BUSRAP0_VALUE if(__EBU_BUSRAP0_INIT) EBU_BUSRAP0.U = __EBU_BUSRAP0_VALUE; #endif #if defined EBU_BUSRAP2 && defined __EBU_BUSRAP2_VALUE if(__EBU_BUSRAP2_INIT) EBU_BUSRAP2.U = __EBU_BUSRAP2_VALUE; #endif #if defined EBU_BUSRAP3 && defined __EBU_BUSRAP3_VALUE if(__EBU_BUSRAP3_INIT) EBU_BUSRAP3.U = __EBU_BUSRAP3_VALUE; #endif #if defined EBU_BUSRCON0 && defined __EBU_BUSRCON0_VALUE if(__EBU_BUSRCON0_INIT) EBU_BUSRCON0.U = __EBU_BUSRCON0_VALUE; #endif #if defined EBU_BUSRCON1 && defined __EBU_BUSRCON1_VALUE if(__EBU_BUSRCON1_INIT) EBU_BUSRCON1.U = __EBU_BUSRCON1_VALUE; #endif #if defined EBU_BUSRCON2 && defined __EBU_BUSRCON2_VALUE if(__EBU_BUSRCON2_INIT) EBU_BUSRCON2.U = __EBU_BUSRCON2_VALUE; #endif #if defined EBU_BUSRCON3 && defined __EBU_BUSRCON3_VALUE if(__EBU_BUSRCON3_INIT) EBU_BUSRCON3.U = __EBU_BUSRCON3_VALUE; #endif #if defined EBU_BUSWAP0 && defined __EBU_BUSWAP0_VALUE if(__EBU_BUSWAP0_INIT) EBU_BUSWAP0.U = __EBU_BUSWAP0_VALUE; #endif #if defined EBU_BUSWAP1 && defined __EBU_BUSWAP1_VALUE if(__EBU_BUSWAP1_INIT) EBU_BUSWAP1.U = __EBU_BUSWAP1_VALUE; #endif #if defined EBU_BUSWAP2 && defined __EBU_BUSWAP2_VALUE if(__EBU_BUSWAP2_INIT) EBU_BUSWAP2.U = __EBU_BUSWAP2_VALUE; #endif #if defined EBU_BUSWAP3 && defined __EBU_BUSWAP3_VALUE if(__EBU_BUSWAP3_INIT) EBU_BUSWAP3.U = __EBU_BUSWAP3_VALUE; #endif #if defined EBU_BUSWCON0 && defined __EBU_BUSWCON0_VALUE if(__EBU_BUSWCON0_INIT) EBU_BUSWCON0.U = __EBU_BUSWCON0_VALUE; #endif #if defined EBU_BUSWCON1 && defined __EBU_BUSWCON1_VALUE if(__EBU_BUSWCON1_INIT) EBU_BUSWCON1.U = __EBU_BUSWCON1_VALUE; #endif #if defined EBU_BUSWCON2 && defined __EBU_BUSWCON2_VALUE if(__EBU_BUSWCON2_INIT) EBU_BUSWCON2.U = __EBU_BUSWCON2_VALUE; #endif #if defined EBU_BUSWCON3 && defined __EBU_BUSWCON3_VALUE if(__EBU_BUSWCON3_INIT) EBU_BUSWCON3.U = __EBU_BUSWCON3_VALUE; #endif #if defined EBU_EXTBOOT && defined __EBU_EXTBOOT_VALUE if(__EBU_EXTBOOT_INIT) EBU_EXTBOOT.U = __EBU_EXTBOOT_VALUE; #endif #if defined EBU_MODCON && defined __EBU_MODCON_VALUE if(__EBU_MODCON_INIT) EBU_MODCON.U = __EBU_MODCON_VALUE; #endif #if defined EBU_DDRNCON && defined __EBU_DDRNCON_VALUE if(__EBU_DDRNCON_INIT) EBU_DDRNCON.U = __EBU_DDRNCON_VALUE; #endif #if defined EBU_DDRNMOD && defined __EBU_DDRNMOD_VALUE if(__EBU_DDRNMOD_INIT) EBU_DDRNMOD.U = __EBU_DDRNMOD_VALUE; #endif #if defined EBU_DDRNMOD2 && defined __EBU_DDRNMOD2_VALUE if(__EBU_DDRNMOD2_INIT) EBU_DDRNMOD2.U = __EBU_DDRNMOD2_VALUE; #endif #if defined EBU_DDRNPRLD && defined __EBU_DDRNPRLD_VALUE if(__EBU_DDRNPRLD_INIT) EBU_DDRNPRLD.U = __EBU_DDRNPRLD_VALUE; #endif #if defined EBU_DDRNTAG0 && defined __EBU_DDRNTAG0_VALUE if(__EBU_DDRNTAG0_INIT) EBU_DDRNTAG0.U = __EBU_DDRNTAG0_VALUE; #endif #if defined EBU_DDRNTAG1 && defined __EBU_DDRNTAG1_VALUE if(__EBU_DDRNTAG1_INIT) EBU_DDRNTAG1.U = __EBU_DDRNTAG1_VALUE; #endif #if defined EBU_DDRNTAG2 && defined __EBU_DDRNTAG2_VALUE if(__EBU_DDRNTAG2_INIT) EBU_DDRNTAG2.U = __EBU_DDRNTAG2_VALUE; #endif #if defined EBU_DDRNTAG3 && defined __EBU_DDRNTAG3_VALUE if(__EBU_DDRNTAG3_INIT) EBU_DDRNTAG3.U = __EBU_DDRNTAG3_VALUE; #endif #if defined EBU_DLLCON && defined __EBU_DLLCON_VALUE if(__EBU_DLLCON_INIT) EBU_DLLCON.U = __EBU_DLLCON_VALUE; #endif #if defined EBU_SDRMCON && defined __EBU_SDRMCON_VALUE if(__EBU_SDRMCON_INIT) EBU_SDRMCON.U = __EBU_SDRMCON_VALUE; #endif #if defined EBU_SDRMOD && defined __EBU_SDRMOD_VALUE if(__EBU_SDRMOD_INIT) EBU_SDRMOD.U = __EBU_SDRMOD_VALUE; #endif #if defined EBU_SDRMREF && defined __EBU_SDRMREF_VALUE if(__EBU_SDRMREF_INIT) EBU_SDRMREF.U = __EBU_SDRMREF_VALUE; #endif #if defined EBU_SDRSTAT && defined __EBU_SDRSTAT_VALUE if(__EBU_SDRSTAT_INIT) EBU_SDRSTAT.U = __EBU_SDRSTAT_VALUE; #endif /* * Inititialize global address registers a0/a1 to support * __a0/__a1 storage qualifiers of the C compiler. */ #if __A0A1_INIT void * a0 = _SMALL_DATA_; __asm( "mov.aa\ta0,%0"::"a"(a0) ); void * a1 = _LITERAL_DATA_; __asm( "mov.aa\ta1,%0"::"a"(a1) ); #endif /* * Inititialize global address registers a8/a9 to support * __a8/__a9 storage qualifiers of the C compiler. A8 and A9 * are reserved for OS use, or for application use in cases * where the application ans OS are tightly coupled. */ #if __A8A9_INIT void * a8 = _A8_DATA_; __asm( "mov.aa\ta8,%0"::"a"(a8) ); void * a9 = _A9_DATA_; __asm( "mov.aa\ta9,%0"::"a"(a9) ); #endif /* Setup the context save area linked list. */ #if __CSA_INIT // Still To be Done // - these pointer arrays csa_area_begin/end should be placed in memory, not on the stack // the simulator, however, will generate an error if 'static' is placed in front of the declarations # if !__CPU_TC051_INITIAL__ # define MAX_NR_OF_CSA_AREAS 1 extern int _lc_ub_csa_01[]; /* context save area 1 begin */ extern int _lc_ue_csa_01[]; /* context save area 1 end */ int * csa_area_begin[] = { _lc_ub_csa_01 }; int * csa_area_end[] = { _lc_ue_csa_01 }; # else # define MAX_NR_OF_CSA_AREAS 3 extern int _lc_ub_csa_01[]; /* context save area 1 begin */ extern int _lc_ue_csa_01[]; /* context save area 1 end */ extern int _lc_ub_csa_02[]; /* context save area 2 begin */ extern int _lc_ue_csa_02[]; /* context save area 2 end */ extern int _lc_ub_csa_03[]; /* context save area 3 begin */ extern int _lc_ue_csa_03[]; /* context save area 3 end */ int * csa_area_begin[] = { _lc_ub_csa_01, _lc_ub_csa_02, _lc_ub_csa_03 }; int * csa_area_end[] = { _lc_ue_csa_01, _lc_ue_csa_02, _lc_ue_csa_03 }; # endif int i, k; int no_of_csas; int * csa; unsigned int seg_nr, seg_idx, pcxi_val=0; _Bool first=true; for (i=0; i < MAX_NR_OF_CSA_AREAS; i++) { /* first calculate nr of CSAs in this area */ no_of_csas = (csa_area_end[i] - csa_area_begin[i]) >> 4; for (k=0; k < no_of_csas; k++) { csa = csa_area_begin[i] + k*16; /* Store null pointer in last CSA (= very first time!) */ *csa = pcxi_val; seg_nr = __extru( (int) csa, 28, 4) << 16; seg_idx = __extru( (int) csa, 6, 16); pcxi_val = seg_nr | seg_idx; if (first) { first = false; __mtcr(LCX, pcxi_val); } } __mtcr(FCX, pcxi_val); } #endif /* * PMU_TC.004 workaround: * The split mode is disabled on the LMB bus to workaround. */ #if __PMU_TC004_INITIAL__ && defined LFI_CON LFI_CON.U &= 0xfffffffe; #endif /* * Initialize and clear C variables. */ #if __C_INIT _c_init(); /* initialize data */ #endif /* * initialize __clocks_per_sec, * the oscillator frequency is defined by __fOSC. */ #if __CLOCKS_PER_SEC_INIT setclockpersec(); #endif /* initialize profiling if required */ #if __PROF_ENABLE__ __prof_init(); #endif /* * Call a user function within one can initialize the * registers protected via the EndInit feature. * Beware that protected registers are unlocked * for the duration of the Time-out Period only! */ #ifdef _CALL_ENDINIT _endinit_clear(); /* disable the write-protection */ _endinit(); _endinit_set(); /* enable the write-protection */ #endif /* * Call a user function before starting main(). */ #if defined __CALL_INIT _call_init(); #endif /* * Call C main program. */ #if __USE_ARGC_ARGV exit( main( _argcv( argcv, __ARGCV_BUFSIZE ), (char **)argcv ) ); #else exit( main( 0, NULL ) ); /* argc is 0 */ #endif /* * Default trap vectors are resolved from the C-library. */ #if __BTV_INIT # if __RESOLVE_TRAP_0 # pragma extern _trapmmu # endif # if __RESOLVE_TRAP_1 # pragma extern _trapprotection # endif # if __RESOLVE_TRAP_2 # pragma extern _trapinstruction # endif # if __RESOLVE_TRAP_3 # pragma extern _trapcontext # endif # if __RESOLVE_TRAP_4 # pragma extern _trapbus # endif # if __RESOLVE_TRAP_5 # pragma extern _trapassertion # endif # if __RESOLVE_TRAP_6 # pragma extern _trapsystem # endif # if __RESOLVE_TRAP_7 # pragma extern _trapnmi # endif #endif }