static void clock_component_def_real_compile_component (ComponentDef* base, CompiledCircuit* compiledCircuit, ComponentInst* componentInst, Connection** connections, int connections_length1, ComponentInst** ancestry, int ancestry_length1) {
ClockComponentDef * self;
Connection* _tmp0_;
Connection* outputWire;
gint onFor = 0;
gint offFor = 0;
Connection** _tmp1_;
gint _tmp1__length1;
gint _tmp21_;
gint _tmp22_;
Connection* _tmp23_;
gint _tmp24_;
gint _tmp25_;
ComponentInst** _tmp26_;
gint _tmp26__length1;
ComponentInst* _tmp27_;
ClockComponentState* _tmp28_;
ComponentState* componentState;
CompiledCircuit* _tmp29_;
GError * _inner_error_ = NULL;
self = (ClockComponentDef*) base;
g_return_if_fail (compiledCircuit != NULL);
_tmp0_ = connection_new_fake ();
outputWire = _tmp0_;
_tmp1_ = connections;
_tmp1__length1 = connections_length1;
{
Connection** connection_collection = NULL;
gint connection_collection_length1 = 0;
gint _connection_collection_size_ = 0;
gint connection_it = 0;
connection_collection = _tmp1_;
connection_collection_length1 = _tmp1__length1;
for (connection_it = 0; connection_it < _tmp1__length1; connection_it = connection_it + 1) {
Connection* _tmp2_;
Connection* connection = NULL;
_tmp2_ = _connection_ref0 (connection_collection[connection_it]);
connection = _tmp2_;
{
Connection* _tmp3_;
WireInst* _tmp4_;
WireInst* _tmp5_;
ComponentInst* _tmp6_;
PinInst** _tmp7_;
gint _tmp7__length1;
PinInst* _tmp8_;
WireInst** _tmp9_;
gint _tmp9__length1;
WireInst* _tmp10_;
_tmp3_ = connection;
_tmp4_ = connection_get_wireInst (_tmp3_);
_tmp5_ = _tmp4_;
_tmp6_ = componentInst;
_tmp7_ = _tmp6_->pinInsts;
_tmp7__length1 = _tmp6_->pinInsts_length1;
_tmp8_ = _tmp7_[0];
_tmp9_ = _tmp8_->wireInsts;
_tmp9__length1 = _tmp8_->wireInsts_length1;
_tmp10_ = _tmp9_[0];
if (_tmp5_ == _tmp10_) {
Connection* _tmp11_;
Connection* _tmp12_;
_tmp11_ = connection;
_tmp12_ = _connection_ref0 (_tmp11_);
_connection_unref0 (outputWire);
outputWire = _tmp12_;
}
_connection_unref0 (connection);
}
}
}
{
ComponentInst* _tmp13_;
PropertySet* _tmp14_;
gint _tmp15_ = 0;
gint _tmp16_;
_tmp13_ = componentInst;
_tmp14_ = _tmp13_->configuration;
_tmp15_ = property_item_int_get_data_throw (_tmp14_, "On For", &_inner_error_);
_tmp16_ = _tmp15_;
if (_inner_error_ != NULL) {
goto __catch18_g_error;
}
onFor = _tmp16_;
}
goto __finally18;
__catch18_g_error:
{
g_clear_error (&_inner_error_);
_inner_error_ = NULL;
onFor = 25;
}
__finally18:
if (_inner_error_ != NULL) {
_connection_unref0 (outputWire);
g_critical ("file %s: line %d: uncaught error: %s (%s, %d)", __FILE__, __LINE__, _inner_error_->message, g_quark_to_string (_inner_error_->domain), _inner_error_->code);
g_clear_error (&_inner_error_);
return;
}
{
ComponentInst* _tmp17_;
PropertySet* _tmp18_;
gint _tmp19_ = 0;
gint _tmp20_;
_tmp17_ = componentInst;
_tmp18_ = _tmp17_->configuration;
_tmp19_ = property_item_int_get_data_throw (_tmp18_, "Off For", &_inner_error_);
_tmp20_ = _tmp19_;
if (_inner_error_ != NULL) {
goto __catch19_g_error;
}
offFor = _tmp20_;
}
goto __finally19;
__catch19_g_error:
{
g_clear_error (&_inner_error_);
_inner_error_ = NULL;
offFor = 25;
}
__finally19:
if (_inner_error_ != NULL) {
_connection_unref0 (outputWire);
g_critical ("file %s: line %d: uncaught error: %s (%s, %d)", __FILE__, __LINE__, _inner_error_->message, g_quark_to_string (_inner_error_->domain), _inner_error_->code);
g_clear_error (&_inner_error_);
return;
}
_tmp21_ = onFor;
if (_tmp21_ < 1) {
onFor = 1;
}
_tmp22_ = offFor;
if (_tmp22_ < 1) {
offFor = 1;
}
_tmp23_ = outputWire;
_tmp24_ = onFor;
_tmp25_ = offFor;
_tmp26_ = ancestry;
_tmp26__length1 = ancestry_length1;
_tmp27_ = componentInst;
_tmp28_ = clock_component_state_new (_tmp23_, _tmp24_, _tmp25_, _tmp26_, _tmp26__length1, _tmp27_);
componentState = (ComponentState*) _tmp28_;
_tmp29_ = compiledCircuit;
compiled_circuit_add_component (_tmp29_, componentState);
_component_state_unref0 (componentState);
_connection_unref0 (outputWire);
}
static void tristate_component_def_real_compile_component (ComponentDef* base, CompiledCircuit* compiledCircuit, ComponentInst* componentInst, Connection** connections, int connections_length1, ComponentInst** ancestry, int ancestry_length1) {
TristateComponentDef * self;
Connection* _tmp0_;
Connection* inputWire;
Connection* _tmp1_;
Connection* controlWire;
Connection* _tmp2_;
Connection* outputWire;
Connection** _tmp3_;
gint _tmp3__length1;
Connection* _tmp35_;
Connection* _tmp36_;
Connection* _tmp37_;
ComponentInst** _tmp38_;
gint _tmp38__length1;
ComponentInst* _tmp39_;
TristateComponentState* _tmp40_;
ComponentState* componentState;
CompiledCircuit* _tmp41_;
self = (TristateComponentDef*) base;
g_return_if_fail (compiledCircuit != NULL);
_tmp0_ = connection_new_fake ();
inputWire = _tmp0_;
_tmp1_ = connection_new_fake ();
controlWire = _tmp1_;
_tmp2_ = connection_new_fake ();
outputWire = _tmp2_;
_tmp3_ = connections;
_tmp3__length1 = connections_length1;
{
Connection** connection_collection = NULL;
gint connection_collection_length1 = 0;
gint _connection_collection_size_ = 0;
gint connection_it = 0;
connection_collection = _tmp3_;
connection_collection_length1 = _tmp3__length1;
for (connection_it = 0; connection_it < _tmp3__length1; connection_it = connection_it + 1) {
Connection* _tmp4_;
Connection* connection = NULL;
_tmp4_ = _connection_ref0 (connection_collection[connection_it]);
connection = _tmp4_;
{
Connection* _tmp5_;
WireInst* _tmp6_;
WireInst* _tmp7_;
ComponentInst* _tmp8_;
PinInst** _tmp9_;
gint _tmp9__length1;
PinInst* _tmp10_;
WireInst** _tmp11_;
gint _tmp11__length1;
WireInst* _tmp12_;
Connection* _tmp15_;
WireInst* _tmp16_;
WireInst* _tmp17_;
ComponentInst* _tmp18_;
PinInst** _tmp19_;
gint _tmp19__length1;
PinInst* _tmp20_;
WireInst** _tmp21_;
gint _tmp21__length1;
WireInst* _tmp22_;
Connection* _tmp25_;
WireInst* _tmp26_;
WireInst* _tmp27_;
ComponentInst* _tmp28_;
PinInst** _tmp29_;
gint _tmp29__length1;
PinInst* _tmp30_;
WireInst** _tmp31_;
gint _tmp31__length1;
WireInst* _tmp32_;
_tmp5_ = connection;
_tmp6_ = connection_get_wireInst (_tmp5_);
_tmp7_ = _tmp6_;
_tmp8_ = componentInst;
_tmp9_ = _tmp8_->pinInsts;
_tmp9__length1 = _tmp8_->pinInsts_length1;
_tmp10_ = _tmp9_[0];
_tmp11_ = _tmp10_->wireInsts;
_tmp11__length1 = _tmp10_->wireInsts_length1;
_tmp12_ = _tmp11_[0];
if (_tmp7_ == _tmp12_) {
Connection* _tmp13_;
Connection* _tmp14_;
_tmp13_ = connection;
_tmp14_ = _connection_ref0 (_tmp13_);
_connection_unref0 (inputWire);
inputWire = _tmp14_;
}
_tmp15_ = connection;
_tmp16_ = connection_get_wireInst (_tmp15_);
_tmp17_ = _tmp16_;
_tmp18_ = componentInst;
_tmp19_ = _tmp18_->pinInsts;
_tmp19__length1 = _tmp18_->pinInsts_length1;
_tmp20_ = _tmp19_[1];
_tmp21_ = _tmp20_->wireInsts;
_tmp21__length1 = _tmp20_->wireInsts_length1;
_tmp22_ = _tmp21_[0];
if (_tmp17_ == _tmp22_) {
Connection* _tmp23_;
Connection* _tmp24_;
_tmp23_ = connection;
_tmp24_ = _connection_ref0 (_tmp23_);
_connection_unref0 (controlWire);
controlWire = _tmp24_;
}
_tmp25_ = connection;
_tmp26_ = connection_get_wireInst (_tmp25_);
_tmp27_ = _tmp26_;
_tmp28_ = componentInst;
_tmp29_ = _tmp28_->pinInsts;
_tmp29__length1 = _tmp28_->pinInsts_length1;
_tmp30_ = _tmp29_[2];
_tmp31_ = _tmp30_->wireInsts;
_tmp31__length1 = _tmp30_->wireInsts_length1;
_tmp32_ = _tmp31_[0];
if (_tmp27_ == _tmp32_) {
Connection* _tmp33_;
Connection* _tmp34_;
_tmp33_ = connection;
_tmp34_ = _connection_ref0 (_tmp33_);
_connection_unref0 (outputWire);
outputWire = _tmp34_;
}
_connection_unref0 (connection);
}
}
}
_tmp35_ = inputWire;
_tmp36_ = controlWire;
_tmp37_ = outputWire;
_tmp38_ = ancestry;
_tmp38__length1 = ancestry_length1;
_tmp39_ = componentInst;
_tmp40_ = tristate_component_state_new (_tmp35_, _tmp36_, _tmp37_, _tmp38_, _tmp38__length1, _tmp39_);
componentState = (ComponentState*) _tmp40_;
_tmp41_ = compiledCircuit;
compiled_circuit_add_component (_tmp41_, componentState);
_component_state_unref0 (componentState);
_connection_unref0 (outputWire);
_connection_unref0 (controlWire);
_connection_unref0 (inputWire);
}
static void constant_component_def_real_compile_component (ComponentDef* base, CompiledCircuit* compiledCircuit, ComponentInst* componentInst, Connection** connections, int connections_length1, ComponentInst** ancestry, int ancestry_length1) {
ConstantComponentDef * self;
Connection* outputWire = NULL;
Connection* _tmp0_ = NULL;
gchar* constantString = NULL;
gboolean constantValue = FALSE;
Connection** _tmp1_ = NULL;
gint _tmp1__length1 = 0;
const gchar* _tmp19_ = NULL;
ComponentState* componentState = NULL;
Connection* _tmp20_ = NULL;
gboolean _tmp21_ = FALSE;
ComponentInst** _tmp22_ = NULL;
gint _tmp22__length1 = 0;
ComponentInst* _tmp23_ = NULL;
ConstantComponentState* _tmp24_ = NULL;
CompiledCircuit* _tmp25_ = NULL;
GError * _inner_error_ = NULL;
self = (ConstantComponentDef*) base;
g_return_if_fail (compiledCircuit != NULL);
_tmp0_ = connection_new_fake ();
outputWire = _tmp0_;
constantValue = FALSE;
_tmp1_ = connections;
_tmp1__length1 = connections_length1;
{
Connection** connection_collection = NULL;
gint connection_collection_length1 = 0;
gint _connection_collection_size_ = 0;
gint connection_it = 0;
connection_collection = _tmp1_;
connection_collection_length1 = _tmp1__length1;
for (connection_it = 0; connection_it < _tmp1__length1; connection_it = connection_it + 1) {
Connection* _tmp2_ = NULL;
Connection* connection = NULL;
_tmp2_ = _connection_ref0 (connection_collection[connection_it]);
connection = _tmp2_;
{
Connection* _tmp3_ = NULL;
WireInst* _tmp4_ = NULL;
WireInst* _tmp5_ = NULL;
ComponentInst* _tmp6_ = NULL;
PinInst** _tmp7_ = NULL;
gint _tmp7__length1 = 0;
PinInst* _tmp8_ = NULL;
WireInst** _tmp9_ = NULL;
gint _tmp9__length1 = 0;
WireInst* _tmp10_ = NULL;
_tmp3_ = connection;
_tmp4_ = connection_get_wireInst (_tmp3_);
_tmp5_ = _tmp4_;
_tmp6_ = componentInst;
_tmp7_ = _tmp6_->pinInsts;
_tmp7__length1 = _tmp6_->pinInsts_length1;
_tmp8_ = _tmp7_[0];
_tmp9_ = _tmp8_->wireInsts;
_tmp9__length1 = _tmp8_->wireInsts_length1;
_tmp10_ = _tmp9_[0];
if (_tmp5_ == _tmp10_) {
Connection* _tmp11_ = NULL;
Connection* _tmp12_ = NULL;
_tmp11_ = connection;
_tmp12_ = _connection_ref0 (_tmp11_);
_connection_unref0 (outputWire);
outputWire = _tmp12_;
}
_connection_unref0 (connection);
}
}
}
{
gchar* _tmp13_ = NULL;
ComponentInst* _tmp14_ = NULL;
PropertySet* _tmp15_ = NULL;
gchar* _tmp16_ = NULL;
gchar* _tmp17_ = NULL;
_tmp14_ = componentInst;
_tmp15_ = _tmp14_->configuration;
_tmp16_ = property_item_selection_get_data_throw (_tmp15_, "Value", &_inner_error_);
_tmp13_ = _tmp16_;
if (_inner_error_ != NULL) {
goto __catch24_g_error;
}
_tmp17_ = _tmp13_;
_tmp13_ = NULL;
_g_free0 (constantString);
constantString = _tmp17_;
_g_free0 (_tmp13_);
}
goto __finally24;
__catch24_g_error:
{
gchar* _tmp18_ = NULL;
g_clear_error (&_inner_error_);
_inner_error_ = NULL;
_tmp18_ = g_strdup ("0");
_g_free0 (constantString);
constantString = _tmp18_;
}
__finally24:
if (_inner_error_ != NULL) {
_g_free0 (constantString);
_connection_unref0 (outputWire);
g_critical ("file %s: line %d: uncaught error: %s (%s, %d)", __FILE__, __LINE__, _inner_error_->message, g_quark_to_string (_inner_error_->domain), _inner_error_->code);
g_clear_error (&_inner_error_);
return;
}
_tmp19_ = constantString;
if (g_strcmp0 (_tmp19_, "1") == 0) {
constantValue = TRUE;
}
_tmp20_ = outputWire;
_tmp21_ = constantValue;
_tmp22_ = ancestry;
_tmp22__length1 = ancestry_length1;
_tmp23_ = componentInst;
_tmp24_ = constant_component_state_new (_tmp20_, _tmp21_, _tmp22_, _tmp22__length1, _tmp23_);
componentState = (ComponentState*) _tmp24_;
_tmp25_ = compiledCircuit;
compiled_circuit_add_component (_tmp25_, componentState);
_component_state_unref0 (componentState);
_g_free0 (constantString);
_connection_unref0 (outputWire);
}
static void pe_dflipflop_component_def_real_compile_component (ComponentDef* base, CompiledCircuit* compiledCircuit, ComponentInst* componentInst, Connection** connections, int connections_length1, ComponentInst** ancestry, int ancestry_length1) {
PeDFlipflopComponentDef * self;
Connection* _tmp0_;
Connection* dataWire;
Connection* _tmp1_;
Connection* clockWire;
Connection* _tmp2_;
Connection* outputWire;
Connection* _tmp3_;
Connection* outputNotWire;
Connection** _tmp4_;
gint _tmp4__length1;
Connection* _tmp46_;
Connection* _tmp47_;
Connection* _tmp48_;
Connection* _tmp49_;
ComponentInst** _tmp50_;
gint _tmp50__length1;
ComponentInst* _tmp51_;
PeDFlipflopComponentState* _tmp52_;
ComponentState* componentState;
CompiledCircuit* _tmp53_;
self = (PeDFlipflopComponentDef*) base;
g_return_if_fail (compiledCircuit != NULL);
_tmp0_ = connection_new_fake ();
dataWire = _tmp0_;
_tmp1_ = connection_new_fake ();
clockWire = _tmp1_;
_tmp2_ = connection_new_fake ();
outputWire = _tmp2_;
_tmp3_ = connection_new_fake ();
outputNotWire = _tmp3_;
_tmp4_ = connections;
_tmp4__length1 = connections_length1;
{
Connection** connection_collection = NULL;
gint connection_collection_length1 = 0;
gint _connection_collection_size_ = 0;
gint connection_it = 0;
connection_collection = _tmp4_;
connection_collection_length1 = _tmp4__length1;
for (connection_it = 0; connection_it < _tmp4__length1; connection_it = connection_it + 1) {
Connection* _tmp5_;
Connection* connection = NULL;
_tmp5_ = _connection_ref0 (connection_collection[connection_it]);
connection = _tmp5_;
{
Connection* _tmp6_;
WireInst* _tmp7_;
WireInst* _tmp8_;
ComponentInst* _tmp9_;
PinInst** _tmp10_;
gint _tmp10__length1;
PinInst* _tmp11_;
WireInst** _tmp12_;
gint _tmp12__length1;
WireInst* _tmp13_;
Connection* _tmp16_;
WireInst* _tmp17_;
WireInst* _tmp18_;
ComponentInst* _tmp19_;
PinInst** _tmp20_;
gint _tmp20__length1;
PinInst* _tmp21_;
WireInst** _tmp22_;
gint _tmp22__length1;
WireInst* _tmp23_;
Connection* _tmp26_;
WireInst* _tmp27_;
WireInst* _tmp28_;
ComponentInst* _tmp29_;
PinInst** _tmp30_;
gint _tmp30__length1;
PinInst* _tmp31_;
WireInst** _tmp32_;
gint _tmp32__length1;
WireInst* _tmp33_;
Connection* _tmp36_;
WireInst* _tmp37_;
WireInst* _tmp38_;
ComponentInst* _tmp39_;
PinInst** _tmp40_;
gint _tmp40__length1;
PinInst* _tmp41_;
WireInst** _tmp42_;
gint _tmp42__length1;
WireInst* _tmp43_;
_tmp6_ = connection;
_tmp7_ = connection_get_wireInst (_tmp6_);
_tmp8_ = _tmp7_;
_tmp9_ = componentInst;
_tmp10_ = _tmp9_->pinInsts;
_tmp10__length1 = _tmp9_->pinInsts_length1;
_tmp11_ = _tmp10_[0];
_tmp12_ = _tmp11_->wireInsts;
_tmp12__length1 = _tmp11_->wireInsts_length1;
_tmp13_ = _tmp12_[0];
if (_tmp8_ == _tmp13_) {
Connection* _tmp14_;
Connection* _tmp15_;
_tmp14_ = connection;
_tmp15_ = _connection_ref0 (_tmp14_);
_connection_unref0 (dataWire);
dataWire = _tmp15_;
}
_tmp16_ = connection;
_tmp17_ = connection_get_wireInst (_tmp16_);
_tmp18_ = _tmp17_;
_tmp19_ = componentInst;
_tmp20_ = _tmp19_->pinInsts;
_tmp20__length1 = _tmp19_->pinInsts_length1;
_tmp21_ = _tmp20_[1];
_tmp22_ = _tmp21_->wireInsts;
_tmp22__length1 = _tmp21_->wireInsts_length1;
_tmp23_ = _tmp22_[0];
if (_tmp18_ == _tmp23_) {
Connection* _tmp24_;
Connection* _tmp25_;
_tmp24_ = connection;
_tmp25_ = _connection_ref0 (_tmp24_);
_connection_unref0 (clockWire);
clockWire = _tmp25_;
}
_tmp26_ = connection;
_tmp27_ = connection_get_wireInst (_tmp26_);
_tmp28_ = _tmp27_;
_tmp29_ = componentInst;
_tmp30_ = _tmp29_->pinInsts;
_tmp30__length1 = _tmp29_->pinInsts_length1;
_tmp31_ = _tmp30_[2];
_tmp32_ = _tmp31_->wireInsts;
_tmp32__length1 = _tmp31_->wireInsts_length1;
_tmp33_ = _tmp32_[0];
if (_tmp28_ == _tmp33_) {
Connection* _tmp34_;
Connection* _tmp35_;
_tmp34_ = connection;
_tmp35_ = _connection_ref0 (_tmp34_);
_connection_unref0 (outputWire);
outputWire = _tmp35_;
}
_tmp36_ = connection;
_tmp37_ = connection_get_wireInst (_tmp36_);
_tmp38_ = _tmp37_;
_tmp39_ = componentInst;
_tmp40_ = _tmp39_->pinInsts;
_tmp40__length1 = _tmp39_->pinInsts_length1;
_tmp41_ = _tmp40_[3];
_tmp42_ = _tmp41_->wireInsts;
_tmp42__length1 = _tmp41_->wireInsts_length1;
_tmp43_ = _tmp42_[0];
if (_tmp38_ == _tmp43_) {
Connection* _tmp44_;
Connection* _tmp45_;
_tmp44_ = connection;
_tmp45_ = _connection_ref0 (_tmp44_);
_connection_unref0 (outputNotWire);
outputNotWire = _tmp45_;
}
_connection_unref0 (connection);
}
}
}
_tmp46_ = dataWire;
_tmp47_ = clockWire;
_tmp48_ = outputWire;
_tmp49_ = outputNotWire;
_tmp50_ = ancestry;
_tmp50__length1 = ancestry_length1;
_tmp51_ = componentInst;
_tmp52_ = pe_dflipflop_component_state_new (_tmp46_, _tmp47_, _tmp48_, _tmp49_, _tmp50_, _tmp50__length1, _tmp51_);
componentState = (ComponentState*) _tmp52_;
_tmp53_ = compiledCircuit;
compiled_circuit_add_component (_tmp53_, componentState);
_component_state_unref0 (componentState);
_connection_unref0 (outputNotWire);
_connection_unref0 (outputWire);
_connection_unref0 (clockWire);
_connection_unref0 (dataWire);
}
