void omap2_clk_disable(struct clk *clk)
{
if (clk->usecount > 0 && !(--clk->usecount)) {
_omap2_clk_disable(clk);
if (likely((u32)clk->parent))
omap2_clk_disable(clk->parent);
}
}
void omap2_clk_disable(struct clk *clk)
{
if (clk->usecount > 0 && !(--clk->usecount)) {
_omap2_clk_disable(clk);
if (clk->parent)
omap2_clk_disable(clk->parent);
if (clk->clkdm)
omap2_clkdm_clk_disable(clk->clkdm, clk);
}
}
void omap2_clk_disable_unused(struct clk *clk)
{
u32 regval32, v;
v = (clk->flags & INVERT_ENABLE) ? (1 << clk->enable_bit) : 0;
regval32 = __raw_readl(clk->enable_reg);
if ((regval32 & (1 << clk->enable_bit)) == v)
return;
printk(KERN_INFO "Disabling unused clock \"%s\"\n", clk->name);
_omap2_clk_disable(clk);
}
void omap2_clk_disable(struct clk *clk)
{
if (clk->usecount > 0 && !(--clk->usecount)) {
_omap2_clk_disable(clk);
if (clk->parent)
omap2_clk_disable(clk->parent);
#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once clkdm f/w is in place */
if (clk->clkdm)
omap2_clkdm_clk_disable(clk->clkdm, clk);
#endif
}
}
int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
{
void __iomem *src_addr;
u32 field_val, field_mask, reg_val, parent_div;
if (unlikely(clk->flags & CONFIG_PARTICIPANT))
return -EINVAL;
if (!clk->clksel)
return -EINVAL;
field_val = omap2_clksel_get_src_field(&src_addr, new_parent,
&field_mask, clk, &parent_div);
if (src_addr == 0)
return -EINVAL;
if (clk->usecount > 0)
_omap2_clk_disable(clk);
/* Set new source value (previous dividers if any in effect) */
reg_val = __raw_readl(src_addr) & ~field_mask;
reg_val |= (field_val << __ffs(field_mask));
__raw_writel(reg_val, src_addr);
wmb();
if (clk->flags & DELAYED_APP && cpu_is_omap24xx()) {
__raw_writel(OMAP24XX_VALID_CONFIG, OMAP24XX_PRCM_CLKCFG_CTRL);
wmb();
}
if (clk->usecount > 0)
_omap2_clk_enable(clk);
clk->parent = new_parent;
/* CLKSEL clocks follow their parents' rates, divided by a divisor */
clk->rate = new_parent->rate;
if (parent_div > 0)
clk->rate /= parent_div;
pr_debug("clock: set parent of %s to %s (new rate %ld)\n",
clk->name, clk->parent->name, clk->rate);
if (unlikely(clk->flags & RATE_PROPAGATES))
propagate_rate(clk);
return 0;
}
void omap2_clk_disable_unused(struct clk *clk)
{
u32 regval32, v;
v = (clk->flags & INVERT_ENABLE) ? (1 << clk->enable_bit) : 0;
regval32 = __raw_readl(clk->enable_reg);
if ((regval32 & (1 << clk->enable_bit)) == v)
return;
printk(KERN_DEBUG "Disabling unused clock \"%s\"\n", clk->name);
if (cpu_is_omap34xx()) {
omap2_clk_enable(clk);
omap2_clk_disable(clk);
} else
_omap2_clk_disable(clk);
if (clk->clkdm != NULL)
pwrdm_clkdm_state_switch(clk->clkdm);
}
