/**********************************************
* Enable the dedicated functions of the board.
**********************************************/
static void mainboard_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
/*
* The mainboard is the first place that we get control in ramstage. Check
* for S3 resume and call the appropriate AGESA/CIMx resume functions.
*/
#if CONFIG_HAVE_ACPI_RESUME
acpi_slp_type = acpi_get_sleep_type();
#endif
/* enable GPP CLK0 thru CLK1 */
/* disable GPP CLK2 thru SLT_GFX_CLK */
u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE);
*(misc_mem_clk_cntrl + 0) = 0xFF;
*(misc_mem_clk_cntrl + 1) = 0x00;
*(misc_mem_clk_cntrl + 2) = 0x00;
*(misc_mem_clk_cntrl + 3) = 0x00;
*(misc_mem_clk_cntrl + 4) = 0x00;
/*
* Force the onboard SATA port to GEN2 speed.
* The offboard SATA port can remain at GEN3.
*/
RWMEM(ACPI_MMIO_BASE + PMIO_BASE + SB_PMIOA_REGDA, AccWidthUint8, 0xFB, 0x04);
}
/*************************************************
* enable the dedicated function in thatcher board.
*************************************************/
static void mainboard_enable(device_t dev)
{
msr_t msr;
printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
msr = rdmsr(0xC0011020);
msr.lo &= ~(1 << 28);
wrmsr(0xC0011020, msr);
msr = rdmsr(0xC0011022);
msr.lo &= ~(1 << 4);
msr.lo &= ~(1 << 13);
wrmsr(0xC0011022, msr);
msr = rdmsr(0xC0011023);
msr.lo &= ~(1 << 23);
wrmsr(0xC0011023, msr);
/*
* The mainboard is the first place that we get control in ramstage. Check
* for S3 resume and call the approriate AGESA/CIMx resume functions.
*/
#if CONFIG_HAVE_ACPI_RESUME
acpi_slp_type = acpi_get_sleep_type();
if (acpi_slp_type == 3)
agesawrapper_fchs3earlyrestore();
#endif
}
static void acpi_handoff_wakeup(void)
{
static int once = 0;
if (once)
return;
if (acpi_get_sleep_type)
acpi_slp_type = acpi_get_sleep_type();
once = 1;
}
UINT32 GetHeapBase(AMD_CONFIG_PARAMS *StdHeader)
{
UINT32 heap = BIOS_HEAP_START_ADDRESS;
#if CONFIG_HAVE_ACPI_RESUME
/* Both romstage and ramstage has this S3 detect. */
if (acpi_get_sleep_type() == 3)
heap = (UINT32) cbmem_find(CBMEM_ID_RESUME_SCRATCH) +
(CONFIG_HIGH_SCRATCH_MEMORY_SIZE - BIOS_HEAP_SIZE);
/* himem_heap_base + high_stack_size */
#endif
return heap;
}
static void acpi_handoff_wakeup(void)
{
if (acpi_slp_type < 0)
acpi_slp_type = acpi_get_sleep_type();
}
int acpi_is_wakeup_early(void)
{
return (acpi_get_sleep_type() == 3);
}
