void mcpcia_dma_init(struct mcpcia_config *ccp) { bus_dma_tag_t t; /* * Initialize the DMA tag used for direct-mapped DMA. */ t = &ccp->cc_dmat_direct; t->_cookie = ccp; t->_wbase = MCPCIA_DIRECT_MAPPED_BASE; t->_wsize = MCPCIA_DIRECT_MAPPED_SIZE; t->_next_window = &ccp->cc_dmat_pci_sgmap; t->_boundary = 0; t->_sgmap = NULL; t->_get_tag = mcpcia_dma_get_tag; t->_dmamap_create = _bus_dmamap_create; t->_dmamap_destroy = _bus_dmamap_destroy; t->_dmamap_load = _bus_dmamap_load_direct; t->_dmamap_load_mbuf = _bus_dmamap_load_mbuf_direct; t->_dmamap_load_uio = _bus_dmamap_load_uio_direct; t->_dmamap_load_raw = _bus_dmamap_load_raw_direct; t->_dmamap_unload = _bus_dmamap_unload; t->_dmamap_sync = _bus_dmamap_sync; t->_dmamem_alloc = _bus_dmamem_alloc; t->_dmamem_free = _bus_dmamem_free; t->_dmamem_map = _bus_dmamem_map; t->_dmamem_unmap = _bus_dmamem_unmap; t->_dmamem_mmap = _bus_dmamem_mmap; /* * Initialize the DMA tag used for sgmap-mapped PCI DMA. */ t = &ccp->cc_dmat_pci_sgmap; t->_cookie = ccp; t->_wbase = MCPCIA_PCI_SG_MAPPED_BASE; t->_wsize = MCPCIA_PCI_SG_MAPPED_SIZE; t->_next_window = NULL; t->_boundary = 0; t->_sgmap = &ccp->cc_pci_sgmap; t->_pfthresh = MCPCIA_SG_MAPPED_PFTHRESH; t->_get_tag = mcpcia_dma_get_tag; t->_dmamap_create = alpha_sgmap_dmamap_create; t->_dmamap_destroy = alpha_sgmap_dmamap_destroy; t->_dmamap_load = mcpcia_bus_dmamap_load_sgmap; t->_dmamap_load_mbuf = mcpcia_bus_dmamap_load_mbuf_sgmap; t->_dmamap_load_uio = mcpcia_bus_dmamap_load_uio_sgmap; t->_dmamap_load_raw = mcpcia_bus_dmamap_load_raw_sgmap; t->_dmamap_unload = mcpcia_bus_dmamap_unload_sgmap; t->_dmamap_sync = _bus_dmamap_sync; t->_dmamem_alloc = _bus_dmamem_alloc; t->_dmamem_free = _bus_dmamem_free; t->_dmamem_map = _bus_dmamem_map; t->_dmamem_unmap = _bus_dmamem_unmap; t->_dmamem_mmap = _bus_dmamem_mmap; /* * Initialize the DMA tag used for sgmap-mapped ISA DMA. */ t = &ccp->cc_dmat_isa_sgmap; t->_cookie = ccp; t->_wbase = MCPCIA_ISA_SG_MAPPED_BASE; t->_wsize = MCPCIA_ISA_SG_MAPPED_SIZE; t->_next_window = NULL; t->_boundary = 0; t->_sgmap = &ccp->cc_isa_sgmap; t->_pfthresh = MCPCIA_SG_MAPPED_PFTHRESH; t->_get_tag = mcpcia_dma_get_tag; t->_dmamap_create = alpha_sgmap_dmamap_create; t->_dmamap_destroy = alpha_sgmap_dmamap_destroy; t->_dmamap_load = mcpcia_bus_dmamap_load_sgmap; t->_dmamap_load_mbuf = mcpcia_bus_dmamap_load_mbuf_sgmap; t->_dmamap_load_uio = mcpcia_bus_dmamap_load_uio_sgmap; t->_dmamap_load_raw = mcpcia_bus_dmamap_load_raw_sgmap; t->_dmamap_unload = mcpcia_bus_dmamap_unload_sgmap; t->_dmamap_sync = _bus_dmamap_sync; t->_dmamem_alloc = _bus_dmamem_alloc; t->_dmamem_free = _bus_dmamem_free; t->_dmamem_map = _bus_dmamem_map; t->_dmamem_unmap = _bus_dmamem_unmap; t->_dmamem_mmap = _bus_dmamem_mmap; /* * Initialize the SGMAPs. */ alpha_sgmap_init(&ccp->cc_dmat_pci_sgmap, &ccp->cc_pci_sgmap, "mcpcia pci sgmap", MCPCIA_PCI_SG_MAPPED_BASE, 0, MCPCIA_PCI_SG_MAPPED_SIZE, sizeof(uint64_t), NULL, 0); alpha_sgmap_init(&ccp->cc_dmat_isa_sgmap, &ccp->cc_isa_sgmap, "mcpcia isa sgmap", MCPCIA_ISA_SG_MAPPED_BASE, 0, MCPCIA_ISA_SG_MAPPED_SIZE, sizeof(uint64_t), NULL, 0); /* * Disable windows first. */ REGVAL(MCPCIA_W0_BASE(ccp)) = 0; REGVAL(MCPCIA_W1_BASE(ccp)) = 0; REGVAL(MCPCIA_W2_BASE(ccp)) = 0; REGVAL(MCPCIA_W3_BASE(ccp)) = 0; REGVAL(MCPCIA_T0_BASE(ccp)) = 0; REGVAL(MCPCIA_T1_BASE(ccp)) = 0; REGVAL(MCPCIA_T2_BASE(ccp)) = 0; REGVAL(MCPCIA_T3_BASE(ccp)) = 0; alpha_mb(); /* * Set up window 0 as an 8MB SGMAP-mapped window starting at 8MB. */ REGVAL(MCPCIA_W0_MASK(ccp)) = MCPCIA_WMASK_8M; REGVAL(MCPCIA_T0_BASE(ccp)) = ccp->cc_isa_sgmap.aps_ptpa >> MCPCIA_TBASEX_SHIFT; alpha_mb(); REGVAL(MCPCIA_W0_BASE(ccp)) = MCPCIA_WBASE_EN | MCPCIA_WBASE_SG | MCPCIA_ISA_SG_MAPPED_BASE; alpha_mb(); MCPCIA_SGTLB_INVALIDATE(ccp); /* * Set up window 1 as a 2 GB Direct-mapped window starting at 2GB. */ REGVAL(MCPCIA_W1_MASK(ccp)) = MCPCIA_WMASK_2G; REGVAL(MCPCIA_T1_BASE(ccp)) = 0; alpha_mb(); REGVAL(MCPCIA_W1_BASE(ccp)) = MCPCIA_DIRECT_MAPPED_BASE | MCPCIA_WBASE_EN; alpha_mb(); /* * Set up window 2 as a 1G SGMAP-mapped window starting at 1G. */ REGVAL(MCPCIA_W2_MASK(ccp)) = MCPCIA_WMASK_1G; REGVAL(MCPCIA_T2_BASE(ccp)) = ccp->cc_pci_sgmap.aps_ptpa >> MCPCIA_TBASEX_SHIFT; alpha_mb(); REGVAL(MCPCIA_W2_BASE(ccp)) = MCPCIA_WBASE_EN | MCPCIA_WBASE_SG | MCPCIA_PCI_SG_MAPPED_BASE; alpha_mb(); /* XXX XXX BEGIN XXX XXX */ { /* XXX */ extern paddr_t alpha_XXX_dmamap_or; /* XXX */ alpha_XXX_dmamap_or = MCPCIA_DIRECT_MAPPED_BASE;/* XXX */ } /* XXX */ /* XXX XXX END XXX XXX */ }
void tsp_dma_init(struct tsp_config *pcp) { int i; bus_dma_tag_t t; struct ts_pchip *pccsr = pcp->pc_csr; bus_addr_t dwbase, dwlen, sgwbase, sgwlen, tbase; static struct map_expected { uint32_t base, mask, enables; } premap[4] = { { 0x00800000, 0x00700000, WSBA_ENA | WSBA_SG }, { 0x80000000, 0x3ff00000, WSBA_ENA }, { 0, 0, 0 }, { 0, 0, 0 } }; alpha_mb(); for(i = 0; i < 4; ++i) { if (EDIFF(pccsr->tsp_wsba[i].tsg_r, premap[i].base) || EDIFF(pccsr->tsp_wsm[i].tsg_r, premap[i].mask)) printf("tsp%d: window %d: %lx/base %lx/mask %lx" " reinitialized\n", pcp->pc_pslot, i, pccsr->tsp_wsba[i].tsg_r, pccsr->tsp_wsm[i].tsg_r, pccsr->tsp_tba[i].tsg_r); pccsr->tsp_wsba[i].tsg_r = premap[i].base | premap[i].enables; pccsr->tsp_wsm[i].tsg_r = premap[i].mask; } alpha_mb(); /* * Initialize the DMA tag used for direct-mapped DMA. */ t = &pcp->pc_dmat_direct; t->_cookie = pcp; t->_wbase = dwbase = WSBA_ADDR(pccsr->tsp_wsba[1].tsg_r); t->_wsize = dwlen = WSM_LEN(pccsr->tsp_wsm[1].tsg_r); t->_next_window = &pcp->pc_dmat_sgmap; t->_boundary = 0; t->_sgmap = NULL; t->_get_tag = tsp_dma_get_tag; t->_dmamap_create = _bus_dmamap_create; t->_dmamap_destroy = _bus_dmamap_destroy; t->_dmamap_load = _bus_dmamap_load_direct; t->_dmamap_load_mbuf = _bus_dmamap_load_mbuf_direct; t->_dmamap_load_uio = _bus_dmamap_load_uio_direct; t->_dmamap_load_raw = _bus_dmamap_load_raw_direct; t->_dmamap_unload = _bus_dmamap_unload; t->_dmamap_sync = _bus_dmamap_sync; t->_dmamem_alloc = _bus_dmamem_alloc; t->_dmamem_free = _bus_dmamem_free; t->_dmamem_map = _bus_dmamem_map; t->_dmamem_unmap = _bus_dmamem_unmap; t->_dmamem_mmap = _bus_dmamem_mmap; /* * Initialize the DMA tag used for sgmap-mapped DMA. */ t = &pcp->pc_dmat_sgmap; t->_cookie = pcp; t->_wbase = sgwbase = WSBA_ADDR(pccsr->tsp_wsba[0].tsg_r); t->_wsize = sgwlen = WSM_LEN(pccsr->tsp_wsm[0].tsg_r); t->_next_window = NULL; t->_boundary = 0; t->_sgmap = &pcp->pc_sgmap; t->_pfthresh = TSP_SGMAP_PFTHRESH; t->_get_tag = tsp_dma_get_tag; t->_dmamap_create = alpha_sgmap_dmamap_create; t->_dmamap_destroy = alpha_sgmap_dmamap_destroy; t->_dmamap_load = tsp_bus_dmamap_load_sgmap; t->_dmamap_load_mbuf = tsp_bus_dmamap_load_mbuf_sgmap; t->_dmamap_load_uio = tsp_bus_dmamap_load_uio_sgmap; t->_dmamap_load_raw = tsp_bus_dmamap_load_raw_sgmap; t->_dmamap_unload = tsp_bus_dmamap_unload_sgmap; t->_dmamap_sync = _bus_dmamap_sync; t->_dmamem_alloc = _bus_dmamem_alloc; t->_dmamem_free = _bus_dmamem_free; t->_dmamem_map = _bus_dmamem_map; t->_dmamem_unmap = _bus_dmamem_unmap; t->_dmamem_mmap = _bus_dmamem_mmap; /* * Initialize the SGMAP. Align page table to 32k in case * window is somewhat larger than expected. */ alpha_sgmap_init(t, &pcp->pc_sgmap, "tsp_sgmap", sgwbase, 0, sgwlen, sizeof(uint64_t), NULL, (32*1024)); /* * Enable window 0 and enable SG PTE mapping. */ alpha_mb(); pccsr->tsp_wsba[0].tsg_r |= WSBA_SG | WSBA_ENA; alpha_mb(); /* * Enable window 1 in direct mode. */ alpha_mb(); pccsr->tsp_wsba[1].tsg_r = (pccsr->tsp_wsba[1].tsg_r & ~WSBA_SG) | WSBA_ENA; alpha_mb(); /* * Check windows for sanity, especially if we later decide to * use the firmware's initialization in some cases. */ if ((sgwbase <= dwbase && dwbase < sgwbase + sgwlen) || (dwbase <= sgwbase && sgwbase < dwbase + dwlen)) panic("tsp_dma_init: overlap"); tbase = pcp->pc_sgmap.aps_ptpa; if (tbase & ~0x7fffffc00UL) panic("tsp_dma_init: bad page table address"); alpha_mb(); pccsr->tsp_tba[0].tsg_r = tbase; alpha_mb(); tsp_tlb_invalidate(pcp); alpha_mb(); /* XXX XXX BEGIN XXX XXX */ { /* XXX */ extern paddr_t alpha_XXX_dmamap_or; /* XXX */ alpha_XXX_dmamap_or = dwbase; /* XXX */ } /* XXX */ /* XXX XXX END XXX XXX */ }
void ttwoga_dma_init(struct ttwoga_config *tcp) { bus_dma_tag_t t; /* * Initialize the DMA tag used for direct-mapped DMA. */ t = &tcp->tc_dmat_direct; t->_cookie = tcp; t->_wbase = TTWOGA_DIRECT_MAPPED_BASE; t->_wsize = TTWOGA_DIRECT_MAPPED_SIZE; t->_next_window = NULL; t->_boundary = 0; t->_sgmap = NULL; t->_get_tag = ttwoga_dma_get_tag; t->_dmamap_create = _bus_dmamap_create; t->_dmamap_destroy = _bus_dmamap_destroy; t->_dmamap_load = _bus_dmamap_load_direct; t->_dmamap_load_mbuf = _bus_dmamap_load_mbuf_direct; t->_dmamap_load_uio = _bus_dmamap_load_uio_direct; t->_dmamap_load_raw = _bus_dmamap_load_raw_direct; t->_dmamap_unload = _bus_dmamap_unload; t->_dmamap_sync = _bus_dmamap_sync; t->_dmamem_alloc = _bus_dmamem_alloc; t->_dmamem_free = _bus_dmamem_free; t->_dmamem_map = _bus_dmamem_map; t->_dmamem_unmap = _bus_dmamem_unmap; t->_dmamem_mmap = _bus_dmamem_mmap; /* * Initialize the DMA tag used for sgmap-mapped DMA. */ t = &tcp->tc_dmat_sgmap; t->_cookie = tcp; t->_wbase = TTWOGA_SGMAP_MAPPED_BASE; t->_wsize = TTWOGA_SGMAP_MAPPED_SIZE; t->_next_window = NULL; t->_boundary = 0; t->_sgmap = &tcp->tc_sgmap; t->_pfthresh = TTWOGA_SGMAP_PFTHRESH; t->_get_tag = ttwoga_dma_get_tag; t->_dmamap_create = alpha_sgmap_dmamap_create; t->_dmamap_destroy = alpha_sgmap_dmamap_destroy; t->_dmamap_load = ttwoga_bus_dmamap_load_sgmap; t->_dmamap_load_mbuf = ttwoga_bus_dmamap_load_mbuf_sgmap; t->_dmamap_load_uio = ttwoga_bus_dmamap_load_uio_sgmap; t->_dmamap_load_raw = ttwoga_bus_dmamap_load_raw_sgmap; t->_dmamap_unload = ttwoga_bus_dmamap_unload_sgmap; t->_dmamap_sync = _bus_dmamap_sync; t->_dmamem_alloc = _bus_dmamem_alloc; t->_dmamem_free = _bus_dmamem_free; t->_dmamem_map = _bus_dmamem_map; t->_dmamem_unmap = _bus_dmamem_unmap; t->_dmamem_mmap = _bus_dmamem_mmap; /* * Disable the SGMAP TLB, and flush it. We reenable it if * we have a Sable or a Gamma with T3 or T4; Gamma with T2 * has a TLB bug apparently severe enough to require disabling * it. */ alpha_mb(); T2GA(tcp, T2_IOCSR) &= ~IOCSR_ETLB; alpha_mb(); alpha_mb(); /* MAGIC */ TTWOGA_TLB_INVALIDATE(tcp); /* * XXX We might want to make sure our DMA windows don't * XXX overlap with PCI memory space! */ /* * Set up window 1 as a 1G direct-mapped window * starting at 1G. */ T2GA(tcp, T2_WBASE1) = 0; alpha_mb(); T2GA(tcp, T2_WMASK1) = (TTWOGA_DIRECT_MAPPED_SIZE - 1) & WMASKx_PWM; alpha_mb(); T2GA(tcp, T2_TBASE1) = 0; alpha_mb(); T2GA(tcp, T2_WBASE1) = TTWOGA_DIRECT_MAPPED_BASE | ((TTWOGA_DIRECT_MAPPED_BASE + (TTWOGA_DIRECT_MAPPED_SIZE - 1)) >> WBASEx_PWxA_SHIFT) | WBASEx_PWE; alpha_mb(); /* * Initialize the SGMAP. */ alpha_sgmap_init(t, &tcp->tc_sgmap, "ttwoga_sgmap", TTWOGA_SGMAP_MAPPED_BASE, 0, TTWOGA_SGMAP_MAPPED_SIZE, sizeof(u_int64_t), NULL, 0); /* * Set up window 2 as an 8MB SGMAP-mapped window * starting at 8MB. */ #ifdef DIAGNOSTIC if ((TTWOGA_SGMAP_MAPPED_BASE & WBASEx_PWSA) != TTWOGA_SGMAP_MAPPED_BASE) panic("ttwoga_dma_init: SGMAP base inconsistency"); #endif T2GA(tcp, T2_WBASE2) = 0; alpha_mb(); T2GA(tcp, T2_WMASK2) = (TTWOGA_SGMAP_MAPPED_SIZE - 1) & WMASKx_PWM; alpha_mb(); T2GA(tcp, T2_TBASE2) = tcp->tc_sgmap.aps_ptpa >> 1; alpha_mb(); T2GA(tcp, T2_WBASE2) = TTWOGA_SGMAP_MAPPED_BASE | ((TTWOGA_SGMAP_MAPPED_BASE + (TTWOGA_SGMAP_MAPPED_SIZE - 1)) >> WBASEx_PWxA_SHIFT) | WBASEx_SGE | WBASEx_PWE; alpha_mb(); /* * Enable SGMAP TLB on Sable or Gamma with T3 or T4; see above. */ if (alpha_implver() == ALPHA_IMPLVER_EV4 || tcp->tc_rev >= TRN_T3) { alpha_mb(); T2GA(tcp, T2_IOCSR) |= IOCSR_ETLB; alpha_mb(); alpha_mb(); /* MAGIC */ tcp->tc_use_tlb = 1; } /* XXX XXX BEGIN XXX XXX */ { /* XXX */ extern paddr_t alpha_XXX_dmamap_or; /* XXX */ alpha_XXX_dmamap_or = TTWOGA_DIRECT_MAPPED_BASE;/* XXX */ } /* XXX */ /* XXX XXX END XXX XXX */ }