Exemple #1
0
int amdgpu_query_heap_size(amdgpu_device_handle pDev,
			    uint32_t heap,
			    uint64_t *heap_size,
			    uint64_t *max_allocation)
{
	struct amdgpu_heap_info heap_info;
	memset(&heap_info, 0, sizeof(struct amdgpu_heap_info));
	int ret;

	ret = amdgpu_query_heap_info(pDev, heap, 0, &heap_info);
	if (ret) {
		*heap_size = 0;
		*max_allocation = 0;
	} else {
		*heap_size = heap_info.heap_size;
		*max_allocation = heap_info.max_allocation;
	}

	return ret;
}
Exemple #2
0
/* Helper function to do the ioctls needed for setup and init. */
static boolean do_winsys_init(struct amdgpu_winsys *ws)
{
   struct amdgpu_buffer_size_alignments alignment_info = {};
   struct amdgpu_heap_info vram, gtt;
   struct drm_amdgpu_info_hw_ip dma = {}, uvd = {}, vce = {};
   uint32_t vce_version = 0, vce_feature = 0;
   int r, i, j;

   /* Query hardware and driver information. */
   r = amdgpu_query_gpu_info(ws->dev, &ws->amdinfo);
   if (r) {
      fprintf(stderr, "amdgpu: amdgpu_query_gpu_info failed.\n");
      goto fail;
   }

   r = amdgpu_query_buffer_size_alignment(ws->dev, &alignment_info);
   if (r) {
      fprintf(stderr, "amdgpu: amdgpu_query_buffer_size_alignment failed.\n");
      goto fail;
   }

   r = amdgpu_query_heap_info(ws->dev, AMDGPU_GEM_DOMAIN_VRAM, 0, &vram);
   if (r) {
      fprintf(stderr, "amdgpu: amdgpu_query_heap_info(vram) failed.\n");
      goto fail;
   }

   r = amdgpu_query_heap_info(ws->dev, AMDGPU_GEM_DOMAIN_GTT, 0, &gtt);
   if (r) {
      fprintf(stderr, "amdgpu: amdgpu_query_heap_info(gtt) failed.\n");
      goto fail;
   }

   r = amdgpu_query_hw_ip_info(ws->dev, AMDGPU_HW_IP_DMA, 0, &dma);
   if (r) {
      fprintf(stderr, "amdgpu: amdgpu_query_hw_ip_info(dma) failed.\n");
      goto fail;
   }

   r = amdgpu_query_hw_ip_info(ws->dev, AMDGPU_HW_IP_UVD, 0, &uvd);
   if (r) {
      fprintf(stderr, "amdgpu: amdgpu_query_hw_ip_info(uvd) failed.\n");
      goto fail;
   }

   r = amdgpu_query_hw_ip_info(ws->dev, AMDGPU_HW_IP_VCE, 0, &vce);
   if (r) {
      fprintf(stderr, "amdgpu: amdgpu_query_hw_ip_info(vce) failed.\n");
      goto fail;
   }

   r = amdgpu_query_firmware_version(ws->dev, AMDGPU_INFO_FW_VCE, 0, 0,
				     &vce_version, &vce_feature);
   if (r) {
      fprintf(stderr, "amdgpu: amdgpu_query_firmware_version(vce) failed.\n");
      goto fail;
   }

   /* Set chip identification. */
   ws->info.pci_id = ws->amdinfo.asic_id; /* TODO: is this correct? */
   ws->info.vce_harvest_config = ws->amdinfo.vce_harvest_config;

   switch (ws->info.pci_id) {
#define CHIPSET(pci_id, name, cfamily) case pci_id: ws->info.family = CHIP_##cfamily; break;
#include "pci_ids/radeonsi_pci_ids.h"
#undef CHIPSET

   default:
      fprintf(stderr, "amdgpu: Invalid PCI ID.\n");
      goto fail;
   }

   if (ws->info.family >= CHIP_TONGA)
      ws->info.chip_class = VI;
   else if (ws->info.family >= CHIP_BONAIRE)
      ws->info.chip_class = CIK;
   else {
      fprintf(stderr, "amdgpu: Unknown family.\n");
      goto fail;
   }

   /* LLVM 3.6 is required for VI. */
   if (ws->info.chip_class >= VI &&
       (HAVE_LLVM < 0x0306 ||
        (HAVE_LLVM == 0x0306 && MESA_LLVM_VERSION_PATCH < 1))) {
      fprintf(stderr, "amdgpu: LLVM 3.6.1 is required, got LLVM %i.%i.%i\n",
              HAVE_LLVM >> 8, HAVE_LLVM & 255, MESA_LLVM_VERSION_PATCH);
      goto fail;
   }