static void nvdimm_build_ssdt(GSList *device_list, GArray *table_offsets, GArray *table_data, GArray *linker) { Aml *ssdt, *sb_scope, *dev; acpi_add_table(table_offsets, table_data); ssdt = init_aml_allocator(); acpi_data_push(ssdt->buf, sizeof(AcpiTableHeader)); sb_scope = aml_scope("\\_SB"); dev = aml_device("NVDR"); /* * ACPI 6.0: 9.20 NVDIMM Devices: * * The ACPI Name Space device uses _HID of ACPI0012 to identify the root * NVDIMM interface device. Platform firmware is required to contain one * such device in _SB scope if NVDIMMs support is exposed by platform to * OSPM. * For each NVDIMM present or intended to be supported by platform, * platform firmware also exposes an ACPI Namespace Device under the * root device. */ aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0012"))); nvdimm_build_common_dsm(dev); nvdimm_build_device_dsm(dev); nvdimm_build_nvdimm_devices(device_list, dev); aml_append(sb_scope, dev); aml_append(ssdt, sb_scope); /* copy AML table into ACPI tables blob and patch header there */ g_array_append_vals(table_data, ssdt->buf->data, ssdt->buf->len); build_header(linker, table_data, (void *)(table_data->data + table_data->len - ssdt->buf->len), "SSDT", ssdt->buf->len, 1, "NVDIMM"); free_aml_allocator(); }
/* DSDT */ static void build_dsdt(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info) { Aml *scope, *dsdt; const MemMapEntry *memmap = guest_info->memmap; const int *irqmap = guest_info->irqmap; dsdt = init_aml_allocator(); /* Reserve space for header */ acpi_data_push(dsdt->buf, sizeof(AcpiTableHeader)); /* When booting the VM with UEFI, UEFI takes ownership of the RTC hardware. * While UEFI can use libfdt to disable the RTC device node in the DTB that * it passes to the OS, it cannot modify AML. Therefore, we won't generate * the RTC ACPI device at all when using UEFI. */ scope = aml_scope("\\_SB"); acpi_dsdt_add_cpus(scope, guest_info->smp_cpus); acpi_dsdt_add_uart(scope, &memmap[VIRT_UART], (irqmap[VIRT_UART] + ARM_SPI_BASE)); acpi_dsdt_add_flash(scope, &memmap[VIRT_FLASH]); acpi_dsdt_add_fw_cfg(scope, &memmap[VIRT_FW_CFG]); acpi_dsdt_add_virtio(scope, &memmap[VIRT_MMIO], (irqmap[VIRT_MMIO] + ARM_SPI_BASE), NUM_VIRTIO_TRANSPORTS); acpi_dsdt_add_pci(scope, memmap, (irqmap[VIRT_PCIE] + ARM_SPI_BASE), guest_info->use_highmem); acpi_dsdt_add_gpio(scope, &memmap[VIRT_GPIO], (irqmap[VIRT_GPIO] + ARM_SPI_BASE)); acpi_dsdt_add_power_button(scope); aml_append(dsdt, scope); /* copy AML table into ACPI tables blob and patch header there */ g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len); build_header(linker, table_data, (void *)(table_data->data + table_data->len - dsdt->buf->len), "DSDT", dsdt->buf->len, 2, NULL, NULL); free_aml_allocator(); }
void build_cpu_hotplug_aml(Aml *ctx) { Aml *method; Aml *if_ctx; Aml *else_ctx; Aml *sb_scope = aml_scope("_SB"); uint8_t madt_tmpl[8] = {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0}; Aml *cpu_id = aml_arg(0); Aml *cpu_on = aml_local(0); Aml *madt = aml_local(1); Aml *cpus_map = aml_name(CPU_ON_BITMAP); Aml *zero = aml_int(0); Aml *one = aml_int(1); /* * _MAT method - creates an madt apic buffer * cpu_id = Arg0 = Processor ID = Local APIC ID * cpu_on = Local0 = CPON flag for this cpu * madt = Local1 = Buffer (in madt apic form) to return */ method = aml_method(CPU_MAT_METHOD, 1, AML_NOTSERIALIZED); aml_append(method, aml_store(aml_derefof(aml_index(cpus_map, cpu_id)), cpu_on)); aml_append(method, aml_store(aml_buffer(sizeof(madt_tmpl), madt_tmpl), madt)); /* Update the processor id, lapic id, and enable/disable status */ aml_append(method, aml_store(cpu_id, aml_index(madt, aml_int(2)))); aml_append(method, aml_store(cpu_id, aml_index(madt, aml_int(3)))); aml_append(method, aml_store(cpu_on, aml_index(madt, aml_int(4)))); aml_append(method, aml_return(madt)); aml_append(sb_scope, method); /* * _STA method - return ON status of cpu * cpu_id = Arg0 = Processor ID = Local APIC ID * cpu_on = Local0 = CPON flag for this cpu */ method = aml_method(CPU_STATUS_METHOD, 1, AML_NOTSERIALIZED); aml_append(method, aml_store(aml_derefof(aml_index(cpus_map, cpu_id)), cpu_on)); if_ctx = aml_if(cpu_on); { aml_append(if_ctx, aml_return(aml_int(0xF))); } aml_append(method, if_ctx); else_ctx = aml_else(); { aml_append(else_ctx, aml_return(zero)); } aml_append(method, else_ctx); aml_append(sb_scope, method); method = aml_method(CPU_EJECT_METHOD, 2, AML_NOTSERIALIZED); aml_append(method, aml_sleep(200)); aml_append(sb_scope, method); method = aml_method(CPU_SCAN_METHOD, 0, AML_NOTSERIALIZED); { Aml *while_ctx, *if_ctx2, *else_ctx2; Aml *bus_check_evt = aml_int(1); Aml *remove_evt = aml_int(3); Aml *status_map = aml_local(5); /* Local5 = active cpu bitmap */ Aml *byte = aml_local(2); /* Local2 = last read byte from bitmap */ Aml *idx = aml_local(0); /* Processor ID / APIC ID iterator */ Aml *is_cpu_on = aml_local(1); /* Local1 = CPON flag for cpu */ Aml *status = aml_local(3); /* Local3 = active state for cpu */ aml_append(method, aml_store(aml_name(CPU_STATUS_MAP), status_map)); aml_append(method, aml_store(zero, byte)); aml_append(method, aml_store(zero, idx)); /* While (idx < SizeOf(CPON)) */ while_ctx = aml_while(aml_lless(idx, aml_sizeof(cpus_map))); aml_append(while_ctx, aml_store(aml_derefof(aml_index(cpus_map, idx)), is_cpu_on)); if_ctx = aml_if(aml_and(idx, aml_int(0x07), NULL)); { /* Shift down previously read bitmap byte */ aml_append(if_ctx, aml_shiftright(byte, one, byte)); } aml_append(while_ctx, if_ctx); else_ctx = aml_else(); { /* Read next byte from cpu bitmap */ aml_append(else_ctx, aml_store(aml_derefof(aml_index(status_map, aml_shiftright(idx, aml_int(3), NULL))), byte)); } aml_append(while_ctx, else_ctx); aml_append(while_ctx, aml_store(aml_and(byte, one, NULL), status)); if_ctx = aml_if(aml_lnot(aml_equal(is_cpu_on, status))); { /* State change - update CPON with new state */ aml_append(if_ctx, aml_store(status, aml_index(cpus_map, idx))); if_ctx2 = aml_if(aml_equal(status, one)); { aml_append(if_ctx2, aml_call2(AML_NOTIFY_METHOD, idx, bus_check_evt)); } aml_append(if_ctx, if_ctx2); else_ctx2 = aml_else(); { aml_append(else_ctx2, aml_call2(AML_NOTIFY_METHOD, idx, remove_evt)); } } aml_append(if_ctx, else_ctx2); aml_append(while_ctx, if_ctx); aml_append(while_ctx, aml_increment(idx)); /* go to next cpu */ aml_append(method, while_ctx); } aml_append(sb_scope, method); aml_append(ctx, sb_scope); }
void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts, hwaddr io_base, const char *res_root, const char *event_handler_method) { Aml *ifctx; Aml *field; Aml *method; Aml *cpu_ctrl_dev; Aml *cpus_dev; Aml *zero = aml_int(0); Aml *one = aml_int(1); Aml *sb_scope = aml_scope("_SB"); MachineClass *mc = MACHINE_GET_CLASS(machine); const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine); char *cphp_res_path = g_strdup_printf("%s." CPUHP_RES_DEVICE, res_root); Object *obj = object_resolve_path_type("", TYPE_ACPI_DEVICE_IF, NULL); AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(obj); AcpiDeviceIf *adev = ACPI_DEVICE_IF(obj); cpu_ctrl_dev = aml_device("%s", cphp_res_path); { Aml *crs; aml_append(cpu_ctrl_dev, aml_name_decl("_HID", aml_eisaid("PNP0A06"))); aml_append(cpu_ctrl_dev, aml_name_decl("_UID", aml_string("CPU Hotplug resources"))); aml_append(cpu_ctrl_dev, aml_mutex(CPU_LOCK, 0)); crs = aml_resource_template(); aml_append(crs, aml_io(AML_DECODE16, io_base, io_base, 1, ACPI_CPU_HOTPLUG_REG_LEN)); aml_append(cpu_ctrl_dev, aml_name_decl("_CRS", crs)); /* declare CPU hotplug MMIO region with related access fields */ aml_append(cpu_ctrl_dev, aml_operation_region("PRST", AML_SYSTEM_IO, aml_int(io_base), ACPI_CPU_HOTPLUG_REG_LEN)); field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS); aml_append(field, aml_reserved_field(ACPI_CPU_FLAGS_OFFSET_RW * 8)); /* 1 if enabled, read only */ aml_append(field, aml_named_field(CPU_ENABLED, 1)); /* (read) 1 if has a insert event. (write) 1 to clear event */ aml_append(field, aml_named_field(CPU_INSERT_EVENT, 1)); /* (read) 1 if has a remove event. (write) 1 to clear event */ aml_append(field, aml_named_field(CPU_REMOVE_EVENT, 1)); /* initiates device eject, write only */ aml_append(field, aml_named_field(CPU_EJECT_EVENT, 1)); aml_append(field, aml_reserved_field(4)); aml_append(field, aml_named_field(CPU_COMMAND, 8)); aml_append(cpu_ctrl_dev, field); field = aml_field("PRST", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE); /* CPU selector, write only */ aml_append(field, aml_named_field(CPU_SELECTOR, 32)); /* flags + cmd + 2byte align */ aml_append(field, aml_reserved_field(4 * 8)); aml_append(field, aml_named_field(CPU_DATA, 32)); aml_append(cpu_ctrl_dev, field); if (opts.has_legacy_cphp) { method = aml_method("_INI", 0, AML_SERIALIZED); /* switch off legacy CPU hotplug HW and use new one, * on reboot system is in new mode and writing 0 * in CPU_SELECTOR selects BSP, which is NOP at * the time _INI is called */ aml_append(method, aml_store(zero, aml_name(CPU_SELECTOR))); aml_append(cpu_ctrl_dev, method); } } aml_append(sb_scope, cpu_ctrl_dev); cpus_dev = aml_device("\\_SB.CPUS"); { int i; Aml *ctrl_lock = aml_name("%s.%s", cphp_res_path, CPU_LOCK); Aml *cpu_selector = aml_name("%s.%s", cphp_res_path, CPU_SELECTOR); Aml *is_enabled = aml_name("%s.%s", cphp_res_path, CPU_ENABLED); Aml *cpu_cmd = aml_name("%s.%s", cphp_res_path, CPU_COMMAND); Aml *cpu_data = aml_name("%s.%s", cphp_res_path, CPU_DATA); Aml *ins_evt = aml_name("%s.%s", cphp_res_path, CPU_INSERT_EVENT); Aml *rm_evt = aml_name("%s.%s", cphp_res_path, CPU_REMOVE_EVENT); Aml *ej_evt = aml_name("%s.%s", cphp_res_path, CPU_EJECT_EVENT); aml_append(cpus_dev, aml_name_decl("_HID", aml_string("ACPI0010"))); aml_append(cpus_dev, aml_name_decl("_CID", aml_eisaid("PNP0A05"))); method = aml_method(CPU_NOTIFY_METHOD, 2, AML_NOTSERIALIZED); for (i = 0; i < arch_ids->len; i++) { Aml *cpu = aml_name(CPU_NAME_FMT, i); Aml *uid = aml_arg(0); Aml *event = aml_arg(1); ifctx = aml_if(aml_equal(uid, aml_int(i))); { aml_append(ifctx, aml_notify(cpu, event)); } aml_append(method, ifctx); } aml_append(cpus_dev, method); method = aml_method(CPU_STS_METHOD, 1, AML_SERIALIZED); { Aml *idx = aml_arg(0); Aml *sta = aml_local(0); aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); aml_append(method, aml_store(idx, cpu_selector)); aml_append(method, aml_store(zero, sta)); ifctx = aml_if(aml_equal(is_enabled, one)); { aml_append(ifctx, aml_store(aml_int(0xF), sta)); } aml_append(method, ifctx); aml_append(method, aml_release(ctrl_lock)); aml_append(method, aml_return(sta)); } aml_append(cpus_dev, method); method = aml_method(CPU_EJECT_METHOD, 1, AML_SERIALIZED); { Aml *idx = aml_arg(0); aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); aml_append(method, aml_store(idx, cpu_selector)); aml_append(method, aml_store(one, ej_evt)); aml_append(method, aml_release(ctrl_lock)); } aml_append(cpus_dev, method); method = aml_method(CPU_SCAN_METHOD, 0, AML_SERIALIZED); { Aml *else_ctx; Aml *while_ctx; Aml *has_event = aml_local(0); Aml *dev_chk = aml_int(1); Aml *eject_req = aml_int(3); Aml *next_cpu_cmd = aml_int(CPHP_GET_NEXT_CPU_WITH_EVENT_CMD); aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); aml_append(method, aml_store(one, has_event)); while_ctx = aml_while(aml_equal(has_event, one)); { /* clear loop exit condition, ins_evt/rm_evt checks * will set it to 1 while next_cpu_cmd returns a CPU * with events */ aml_append(while_ctx, aml_store(zero, has_event)); aml_append(while_ctx, aml_store(next_cpu_cmd, cpu_cmd)); ifctx = aml_if(aml_equal(ins_evt, one)); { aml_append(ifctx, aml_call2(CPU_NOTIFY_METHOD, cpu_data, dev_chk)); aml_append(ifctx, aml_store(one, ins_evt)); aml_append(ifctx, aml_store(one, has_event)); } aml_append(while_ctx, ifctx); else_ctx = aml_else(); ifctx = aml_if(aml_equal(rm_evt, one)); { aml_append(ifctx, aml_call2(CPU_NOTIFY_METHOD, cpu_data, eject_req)); aml_append(ifctx, aml_store(one, rm_evt)); aml_append(ifctx, aml_store(one, has_event)); } aml_append(else_ctx, ifctx); aml_append(while_ctx, else_ctx); } aml_append(method, while_ctx); aml_append(method, aml_release(ctrl_lock)); } aml_append(cpus_dev, method); method = aml_method(CPU_OST_METHOD, 4, AML_SERIALIZED); { Aml *uid = aml_arg(0); Aml *ev_cmd = aml_int(CPHP_OST_EVENT_CMD); Aml *st_cmd = aml_int(CPHP_OST_STATUS_CMD); aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); aml_append(method, aml_store(uid, cpu_selector)); aml_append(method, aml_store(ev_cmd, cpu_cmd)); aml_append(method, aml_store(aml_arg(1), cpu_data)); aml_append(method, aml_store(st_cmd, cpu_cmd)); aml_append(method, aml_store(aml_arg(2), cpu_data)); aml_append(method, aml_release(ctrl_lock)); } aml_append(cpus_dev, method); /* build Processor object for each processor */ for (i = 0; i < arch_ids->len; i++) { Aml *dev; Aml *uid = aml_int(i); GArray *madt_buf = g_array_new(0, 1, 1); int arch_id = arch_ids->cpus[i].arch_id; if (opts.acpi_1_compatible && arch_id < 255) { dev = aml_processor(i, 0, 0, CPU_NAME_FMT, i); } else { dev = aml_device(CPU_NAME_FMT, i); aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007"))); aml_append(dev, aml_name_decl("_UID", uid)); } method = aml_method("_STA", 0, AML_SERIALIZED); aml_append(method, aml_return(aml_call1(CPU_STS_METHOD, uid))); aml_append(dev, method); /* build _MAT object */ assert(adevc && adevc->madt_cpu); adevc->madt_cpu(adev, i, arch_ids, madt_buf); switch (madt_buf->data[0]) { case ACPI_APIC_PROCESSOR: { AcpiMadtProcessorApic *apic = (void *)madt_buf->data; apic->flags = cpu_to_le32(1); break; } case ACPI_APIC_LOCAL_X2APIC: { AcpiMadtProcessorX2Apic *apic = (void *)madt_buf->data; apic->flags = cpu_to_le32(1); break; } default: assert(0); } aml_append(dev, aml_name_decl("_MAT", aml_buffer(madt_buf->len, (uint8_t *)madt_buf->data))); g_array_free(madt_buf, true); if (CPU(arch_ids->cpus[i].cpu) != first_cpu) { method = aml_method("_EJ0", 1, AML_NOTSERIALIZED); aml_append(method, aml_call1(CPU_EJECT_METHOD, uid)); aml_append(dev, method); } method = aml_method("_OST", 3, AML_SERIALIZED); aml_append(method, aml_call4(CPU_OST_METHOD, uid, aml_arg(0), aml_arg(1), aml_arg(2)) ); aml_append(dev, method); /* Linux guests discard SRAT info for non-present CPUs * as a result _PXM is required for all CPUs which might * be hot-plugged. For simplicity, add it for all CPUs. */ if (arch_ids->cpus[i].props.has_node_id) { aml_append(dev, aml_name_decl("_PXM", aml_int(arch_ids->cpus[i].props.node_id))); } aml_append(cpus_dev, dev); } } aml_append(sb_scope, cpus_dev); aml_append(table, sb_scope); method = aml_method(event_handler_method, 0, AML_NOTSERIALIZED); aml_append(method, aml_call0("\\_SB.CPUS." CPU_SCAN_METHOD)); aml_append(table, method); g_free(cphp_res_path); }