Exemple #1
0
/*
 * Start Transmit at the PCU engine (unpause receive)
 */
void
ar5212StartPcuReceive(struct ath_hal *ah)
{
	OS_REG_WRITE(ah, AR_DIAG_SW,
		OS_REG_READ(ah, AR_DIAG_SW) &~ AR_DIAG_RX_DIS);
	ar5212EnableMIBCounters(ah);
	ar5212AniReset(ah);
}
Exemple #2
0
void
ar5212AniAttach(struct ath_hal *ah)
{
#define N(a)     (sizeof(a) / sizeof(a[0]))
	struct ath_hal_5212     *ahp = AH5212(ah);
    struct ath_hal_private  *ap  = AH_PRIVATE(ah);
	int i;

    if ((AH_PRIVATE(ah)->ah_macVersion > AR_SREV_VERSION_VENICE) ||
        (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_VERSION_VENICE &&
         AH_PRIVATE(ah)->ah_macRev == AR_SREV_HAINAN))
        ahp->ah_hasHwPhyCounters = AH_TRUE;
    else ahp->ah_hasHwPhyCounters = AH_FALSE;

	OS_MEMZERO(ahp->ah_ani, sizeof(ahp->ah_ani));
    
    /*
    ** For multiple instantiation, this is a bit of a kluge, but
    ** we copy the factory defaults into the ANI configuration parameters
    */
    
	for (i = 0; i < N(ahp->ah_ani); i++) {
		/* New ANI stuff */
		ahp->ah_ani[i].maxSpurImmunity = ap->ah_config.ath_hal_spurImmunityLvl;
		ahp->ah_ani[i].ofdmTrigHigh = ap->ah_config.ath_hal_ofdmTrigHigh;
		ahp->ah_ani[i].ofdmTrigLow = ap->ah_config.ath_hal_ofdmTrigLow;
		ahp->ah_ani[i].cckTrigHigh = ap->ah_config.ath_hal_cckTrigHigh;
		ahp->ah_ani[i].cckTrigLow = ap->ah_config.ath_hal_cckTrigLow;
		ahp->ah_ani[i].rssiThrHigh = ap->ah_config.ath_hal_rssiThrHigh;
		ahp->ah_ani[i].rssiThrLow = ap->ah_config.ath_hal_rssiThrLow;
		ahp->ah_ani[i].ofdmWeakSigDetectOff = !ap->ah_config.ath_hal_ofdmWeakSigDet;
		ahp->ah_ani[i].cckWeakSigThreshold = ap->ah_config.ath_hal_cckWeakSigThr;
		ahp->ah_ani[i].spurImmunityLevel = ahp->ah_ani[i].maxSpurImmunity;
		ahp->ah_ani[i].firstepLevel = ap->ah_config.ath_hal_firStepLvl;
		ahp->ah_ani[i].noiseImmunityLevel = ap->ah_config.ath_hal_noiseImmunityLvl;
		if (ahp->ah_hasHwPhyCounters) {
			ahp->ah_ani[i].ofdmPhyErrBase = 
				AR_PHY_COUNTMAX - HAL_ANI_OFDM_TRIG_HIGH;
			ahp->ah_ani[i].cckPhyErrBase = 
				AR_PHY_COUNTMAX - HAL_ANI_CCK_TRIG_HIGH;
		}
	}
	if (ahp->ah_hasHwPhyCounters) {
		HDPRINTF(ah, HAL_DBG_ANI, "Setting OfdmErrBase = 0x%08x\n",
			 ahp->ah_ani[0].ofdmPhyErrBase);
		HDPRINTF(ah, HAL_DBG_ANI, "Setting cckErrBase = 0x%08x\n",
			 ahp->ah_ani[0].cckPhyErrBase);
		/* Enable MIB Counters */
		OS_REG_WRITE(ah, AR_PHYCNT1, ahp->ah_ani[0].ofdmPhyErrBase);
		OS_REG_WRITE(ah, AR_PHYCNT2, ahp->ah_ani[0].cckPhyErrBase);
		ar5212EnableMIBCounters(ah);
	}
	ahp->ah_aniPeriod = HAL_ANI_PERIOD;
	if (AH_PRIVATE(ah)->ah_config.ath_hal_enableANI) {
		ahp->ah_procPhyErr |= HAL_PROCESS_ANI;  /* Enable ani by default */
	}
#undef N
}
Exemple #3
0
void
ar5212AniAttach(struct ath_hal *ah)
{
#define N(a)     (sizeof(a) / sizeof(a[0]))
	struct ath_hal_5212 *ahp = AH5212(ah);
	int i;

	ahp->ah_hasHwPhyCounters =
	    (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_VERSION_VENICE &&
	    AH_PRIVATE(ah)->ah_macRev == AR_SREV_HAINAN);

	OS_MEMZERO(ahp->ah_ani, sizeof(ahp->ah_ani));
	for (i = 0; i < N(ahp->ah_ani); i++) {
		/* New ANI stuff */

		if (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_GRIFFIN)
			ahp->ah_ani[i].maxSpurImmunity = HAL_SPUR_IMMUNE_MAX_VENICE;
		else
			ahp->ah_ani[i].maxSpurImmunity = HAL_SPUR_IMMUNE_MAX;
		ahp->ah_ani[i].ofdmTrigHigh = HAL_ANI_OFDM_TRIG_HIGH;
		ahp->ah_ani[i].ofdmTrigLow = HAL_ANI_OFDM_TRIG_LOW;
		ahp->ah_ani[i].cckTrigHigh = HAL_ANI_CCK_TRIG_HIGH;
		ahp->ah_ani[i].cckTrigLow = HAL_ANI_CCK_TRIG_LOW;
		ahp->ah_ani[i].rssiThrHigh = HAL_ANI_RSSI_THR_HIGH;
		ahp->ah_ani[i].rssiThrLow = HAL_ANI_RSSI_THR_LOW;
		ahp->ah_ani[i].ofdmWeakSigDetectOff = !HAL_ANI_USE_OFDM_WEAK_SIG;
		ahp->ah_ani[i].cckWeakSigThreshold = HAL_ANI_CCK_WEAK_SIG_THR;
		ahp->ah_ani[i].spurImmunityLevel = ahp->ah_ani[i].maxSpurImmunity;
		ahp->ah_ani[i].firstepLevel = HAL_ANI_FIRSTEP_LVL;
		if (ahp->ah_hasHwPhyCounters) {
			ahp->ah_ani[i].ofdmPhyErrBase = 
				AR_PHY_COUNTMAX - HAL_ANI_OFDM_TRIG_HIGH;
			ahp->ah_ani[i].cckPhyErrBase = 
				AR_PHY_COUNTMAX - HAL_ANI_CCK_TRIG_HIGH;
		}
	}
	if (ahp->ah_hasHwPhyCounters) {
		HALDEBUG(ah, "Setting OfdmErrBase = 0x%08x\n",
			 ahp->ah_ani[0].ofdmPhyErrBase);
		HALDEBUG(ah, "Setting cckErrBase = 0x%08x\n",
			 ahp->ah_ani[0].cckPhyErrBase);
		/* Enable MIB Counters */
		OS_REG_WRITE(ah, AR_PHYCNT1, ahp->ah_ani[0].ofdmPhyErrBase);
		OS_REG_WRITE(ah, AR_PHYCNT2, ahp->ah_ani[0].cckPhyErrBase);
		ar5212EnableMIBCounters(ah);
	}
	ahp->ah_aniPeriod = HAL_ANI_PERIOD;
	ahp->ah_procPhyErr |= HAL_PROCESS_ANI;  /* Enable ani by default */
#undef N
}