A_UINT32
dbglog_get_debug_hdr_ptr(A_UINT32 tgtType,
HIF_DEVICE *device)
{
A_UINT32 param = 0;
A_UINT32 address = 0;
A_STATUS status = A_OK;
address = HOST_INTEREST_ITEM_ADDRESS(tgtType, hi_dbglog_hdr);
if ((status = ar6000_ReadDataDiag(device, address, (A_UCHAR *)¶m, 4)) != A_OK)
{
param = 0;
}
return param;
}
void ar6000_dump_target_assert_info(HIF_DEVICE *hifDevice, A_UINT32 TargetType)
{
A_UINT32 address;
A_UINT32 regDumpArea = 0;
A_STATUS status;
A_UINT32 regDumpValues[REGISTER_DUMP_LEN_MAX];
A_UINT32 regDumpCount = 0;
A_UINT32 i;
do {
/* the reg dump pointer is copied to the host interest area */
address = HOST_INTEREST_ITEM_ADDRESS(TargetType, hi_failure_state);
if (TargetType == TARGET_TYPE_AR6001) {
/* for AR6001, this is a fixed location because the ptr is actually stuck in cache,
* this may be fixed in later firmware versions */
address = 0x18a0;
regDumpCount = REG_DUMP_COUNT_AR6001;
} else if (TargetType == TARGET_TYPE_AR6002) {
regDumpCount = REG_DUMP_COUNT_AR6002;
} else {
A_ASSERT(0);
}
/* read RAM location through diagnostic window */
status = ar6000_ReadRegDiag(hifDevice, &address, ®DumpArea);
if (A_FAILED(status)) {
AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Failed to get ptr to register dump area \n"));
break;
}
AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Location of register dump data: 0x%X \n",regDumpArea));
if (regDumpArea == 0) {
/* no reg dump */
break;
}
if (TargetType == TARGET_TYPE_AR6001) {
regDumpArea &= 0x0FFFFFFF; /* convert to physical address in target memory */
}
/* fetch register dump data */
status = ar6000_ReadDataDiag(hifDevice,
regDumpArea,
(A_UCHAR *)®DumpValues[0],
regDumpCount * (sizeof(A_UINT32)));
if (A_FAILED(status)) {
AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Failed to get register dump \n"));
break;
}
AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Register Dump: \n"));
for (i = 0; i < regDumpCount; i++) {
AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" %d : 0x%8.8X \n",i, regDumpValues[i]));
}
} while (FALSE);
}
A_STATUS
ar6000_reset_device_skipflash(HIF_DEVICE *hifDevice)
{
int i;
struct forceROM_s {
A_UINT32 addr;
A_UINT32 data;
};
struct forceROM_s *ForceROM;
int szForceROM;
A_UINT32 instruction;
static struct forceROM_s ForceROM_REV2[] = {
/* NB: This works for old REV2 ROM (old). */
{0x00001ff0, 0x175b0027}, /* jump instruction at 0xa0001ff0 */
{0x00001ff4, 0x00000000}, /* nop instruction at 0xa0001ff4 */
{MC_REMAP_TARGET_ADDRESS, 0x00001ff0}, /* remap to 0xa0001ff0 */
{MC_REMAP_COMPARE_ADDRESS, 0x01000040},/* ...from 0xbfc00040 */
{MC_REMAP_SIZE_ADDRESS, 0x00000000}, /* ...1 cache line */
{MC_REMAP_VALID_ADDRESS, 0x00000001}, /* ...remap is valid */
{LOCAL_COUNT_ADDRESS+0x10, 0}, /* clear BMI credit counter */
{RESET_CONTROL_ADDRESS, RESET_CONTROL_WARM_RST_MASK},
};
static struct forceROM_s ForceROM_NEW[] = {
/* NB: This works for AR6000 ROM REV3 and beyond. */
{LOCAL_SCRATCH_ADDRESS, AR6K_OPTION_IGNORE_FLASH},
{LOCAL_COUNT_ADDRESS+0x10, 0}, /* clear BMI credit counter */
{RESET_CONTROL_ADDRESS, RESET_CONTROL_WARM_RST_MASK},
};
/*
* Examine a semi-arbitrary instruction that's different
* in REV2 and other revisions.
* NB: If a Host port does not require simultaneous support
* for multiple revisions of Target ROM, this code can be elided.
*/
(void)ar6000_ReadDataDiag(hifDevice, 0x01000040,
(A_UCHAR *)&instruction, 4);
AR_DEBUG_PRINTF(ATH_LOG_ERR, ("instruction=0x%x\n", instruction));
if (instruction == 0x3c1aa200) {
/* It's an old ROM */
ForceROM = ForceROM_REV2;
szForceROM = sizeof(ForceROM_REV2)/sizeof(*ForceROM);
AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Using OLD method\n"));
} else {
ForceROM = ForceROM_NEW;
szForceROM = sizeof(ForceROM_NEW)/sizeof(*ForceROM);
AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Using NEW method\n"));
}
AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Force Target to execute from ROM....\n"));
for (i = 0; i < szForceROM; i++)
{
if (ar6000_WriteRegDiag(hifDevice,
&ForceROM[i].addr,
&ForceROM[i].data) != A_OK)
{
AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Cannot force Target to execute ROM!\n"));
return A_ERROR;
}
}
msleep(50); /* delay to allow dragon to come to BMI phase */
return A_OK;
}
void ar6000_dump_target_assert_info(HIF_DEVICE *hifDevice, A_UINT32 TargetType)
{
A_UINT32 address;
A_UINT32 regDumpArea = 0;
A_STATUS status;
A_UINT32 regDumpValues[REGISTER_DUMP_LEN_MAX];
A_UINT32 regDumpCount = 0;
A_UINT32 i;
do {
/* the reg dump pointer is copied to the host interest area */
address = HOST_INTEREST_ITEM_ADDRESS(TargetType, hi_failure_state);
address = TARG_VTOP(TargetType, address);
if (TargetType == TARGET_TYPE_AR6001) {
/* for AR6001, this is a fixed location because the ptr is actually stuck in cache,
* this may be fixed in later firmware versions */
address = 0x18a0;
regDumpCount = REG_DUMP_COUNT_AR6001;
} else if (TargetType == TARGET_TYPE_AR6002) {
regDumpCount = REG_DUMP_COUNT_AR6002;
} else if (TargetType == TARGET_TYPE_AR6003) {
regDumpCount = REG_DUMP_COUNT_AR6003;
} else {
A_ASSERT(0);
}
/* read RAM location through diagnostic window */
status = ar6000_ReadRegDiag(hifDevice, &address, ®DumpArea);
if (A_FAILED(status)) {
AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Failed to get ptr to register dump area \n"));
break;
}
AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Location of register dump data: 0x%X \n",regDumpArea));
if (regDumpArea == 0) {
/* no reg dump */
break;
}
regDumpArea = TARG_VTOP(TargetType, regDumpArea);
/* fetch register dump data */
status = ar6000_ReadDataDiag(hifDevice,
regDumpArea,
(A_UCHAR *)®DumpValues[0],
regDumpCount * (sizeof(A_UINT32)));
if (A_FAILED(status)) {
AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Failed to get register dump \n"));
break;
}
AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Register Dump: \n"));
for (i = 0; i < regDumpCount; i++) {
//ATHR_DISPLAY_MSG (_T(" %d : 0x%8.8X \n"), i, regDumpValues[i]);
AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" %d : 0x%8.8X \n",i, regDumpValues[i]));
#ifdef UNDER_CE
/*
* For Every logPrintf() Open the File so that in case of Crashes
* We will have until the Last Message Flushed on to the File
* So use logPrintf Sparingly..!!
*/
tgtassertPrintf (ATH_DEBUG_TRC," %d: 0x%8.8X \n",i, regDumpValues[i]);
#endif
}
} while (FALSE);
}
void ar6000_dump_target_assert_info(HIF_DEVICE *hifDevice, A_UINT32 TargetType)
{
A_UINT32 address;
A_UINT32 regDumpArea = 0;
A_STATUS status;
A_UINT32 regDumpValues[REGISTER_DUMP_LEN_MAX];
A_UINT32 regDumpCount = 0;
A_UINT32 i;
do {
address = HOST_INTEREST_ITEM_ADDRESS(TargetType, hi_failure_state);
address = TARG_VTOP(TargetType, address);
if (TargetType == TARGET_TYPE_AR6001) {
address = 0x18a0;
regDumpCount = REG_DUMP_COUNT_AR6001;
} else if (TargetType == TARGET_TYPE_AR6002) {
regDumpCount = REG_DUMP_COUNT_AR6002;
} else if (TargetType == TARGET_TYPE_AR6003) {
regDumpCount = REG_DUMP_COUNT_AR6003;
} else {
A_ASSERT(0);
}
status = ar6000_ReadRegDiag(hifDevice, &address, ®DumpArea);
if (A_FAILED(status)) {
AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Failed to get ptr to register dump area \n"));
break;
}
AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Location of register dump data: 0x%X \n",regDumpArea));
if (regDumpArea == 0) {
/* no reg dump */
break;
}
regDumpArea = TARG_VTOP(TargetType, regDumpArea);
/* fetch register dump data */
status = ar6000_ReadDataDiag(hifDevice,
regDumpArea,
(A_UCHAR *)®DumpValues[0],
regDumpCount * (sizeof(A_UINT32)));
if (A_FAILED(status)) {
AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Failed to get register dump \n"));
break;
}
AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Register Dump: \n"));
for (i = 0; i < regDumpCount; i++) {
ATHR_DISPLAY_MSG (_T(" %d : 0x%8.8X \n"), i, regDumpValues[i]);
AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" %d : 0x%8.8X \n",i, regDumpValues[i]));
#ifdef UNDER_CE
logPrintf(ATH_DEBUG_ERR," %d: 0x%8.8X \n",i, regDumpValues[i]);
#endif
}
} while (FALSE);
}
