Exemple #1
0
int board_early_init_f(void)
{
	if (!clock_early_init_done())
		clock_early_init();

#if defined(CONFIG_TEGRA_DISCONNECT_UDC_ON_BOOT)
#define USBCMD_FS2 (1 << 15)
	{
		struct usb_ctlr *usbctlr = (struct usb_ctlr *)0x7d000000;
		writel(USBCMD_FS2, &usbctlr->usb_cmd);
	}
#endif

	/* Do any special system timer/TSC setup */
#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
	if (!tegra_cpu_is_non_secure())
#endif
		arch_timer_init();

	pinmux_init();
	board_init_uart_f();

	/* Initialize periph GPIOs */
	gpio_early_init();
	gpio_early_init_uart();

	return 0;
}
static void __init arch_timer_of_init(struct device_node *np)
{
	int i;

	if (arch_timers_present & ARCH_CP15_TIMER) {
		pr_warn("arch_timer: multiple nodes in dt, skipping\n");
		return;
	}

	arch_timers_present |= ARCH_CP15_TIMER;
	for (i = PHYS_SECURE_PPI; i < MAX_TIMER_PPI; i++)
		arch_timer_ppi[i] = irq_of_parse_and_map(np, i);

	arch_timer_detect_rate(NULL, np);

	arch_timer_c3stop = !of_property_read_bool(np, "always-on");

	/*
	 * If we cannot rely on firmware initializing the timer registers then
	 * we should use the physical timers instead.
	 */
	if (IS_ENABLED(CONFIG_ARM) &&
	    of_property_read_bool(np, "arm,cpu-registers-not-fw-configured"))
			arch_timer_use_virtual = false;

	arch_timer_init();
}
Exemple #3
0
int __init arch_timer_of_register(void)
{
	int ret;

	ret = arch_timer_init();
	if (ret)
		return ret;

	arch_timer_delay_timer_register();

	return 0;
}
/*! Initialize time management subsystem */
void k_time_init ()
{
	/* alarm list is empty */
	list_init ( &kalarms );

	arch_timer_init ();

	arch_get_min_interval ( &threshold );

	threshold.nsec /= 2;
	if ( threshold.sec % 2 )
		threshold.nsec += 1000000000L / 2; /* + half second */
	threshold.sec /= 2;
}
Exemple #5
0
/*! Initialize time management subsystem */
int k_time_init ()
{
	arch_timer_init ();

	/* timer list is empty */
	list_init ( &ktimers );

	arch_get_min_interval ( &threshold );
	threshold.tv_nsec /= 2;
	if ( threshold.tv_sec % 2 )
		threshold.tv_nsec += 500000000L; /* + half second */
	threshold.tv_sec /= 2;

	return EXIT_SUCCESS;
}
Exemple #6
0
static int __init arch_timer_of_init(struct device_node *np)
{
	int i;

	if (arch_timers_present & ARCH_CP15_TIMER) {
		pr_warn("arch_timer: multiple nodes in dt, skipping\n");
		return 0;
	}

	arch_timers_present |= ARCH_CP15_TIMER;
	for (i = PHYS_SECURE_PPI; i < MAX_TIMER_PPI; i++)
		arch_timer_ppi[i] = irq_of_parse_and_map(np, i);

	arch_timer_detect_rate(NULL, np);

	arch_timer_c3stop = !of_property_read_bool(np, "always-on");

#ifdef CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND
	for (i = 0; i < ARRAY_SIZE(ool_workarounds); i++) {
		if (of_property_read_bool(np, ool_workarounds[i].id)) {
			timer_unstable_counter_workaround = &ool_workarounds[i];
			static_branch_enable(&arch_timer_read_ool_enabled);
			pr_info("arch_timer: Enabling workaround for %s\n",
				timer_unstable_counter_workaround->id);
			break;
		}
	}
#endif

	/*
	 * If we cannot rely on firmware initializing the timer registers then
	 * we should use the physical timers instead.
	 */
	if (IS_ENABLED(CONFIG_ARM) &&
	    of_property_read_bool(np, "arm,cpu-registers-not-fw-configured"))
		arch_timer_uses_ppi = PHYS_SECURE_PPI;

	/* On some systems, the counter stops ticking when in suspend. */
	arch_counter_suspend_stop = of_property_read_bool(np,
							 "arm,no-tick-in-suspend");

	return arch_timer_init();
}
Exemple #7
0
static int __init arch_timer_of_init(struct device_node *np)
{
	int i;

	if (arch_timers_present & ARCH_CP15_TIMER) {
		pr_warn("arch_timer: multiple nodes in dt, skipping\n");
		return 0;
	}

	arch_timers_present |= ARCH_CP15_TIMER;
	for (i = PHYS_SECURE_PPI; i < MAX_TIMER_PPI; i++)
		arch_timer_ppi[i] = irq_of_parse_and_map(np, i);

	arch_timer_detect_rate(NULL, np);

	arch_timer_c3stop = !of_property_read_bool(np, "always-on");

#ifdef CONFIG_FSL_ERRATUM_A008585
	if (fsl_a008585_enable < 0)
		fsl_a008585_enable = of_property_read_bool(np, "fsl,erratum-a008585");
	if (fsl_a008585_enable) {
		static_branch_enable(&arch_timer_read_ool_enabled);
		pr_info("Enabling workaround for FSL erratum A-008585\n");
	}
#endif

	/*
	 * If we cannot rely on firmware initializing the timer registers then
	 * we should use the physical timers instead.
	 */
	if (IS_ENABLED(CONFIG_ARM) &&
	    of_property_read_bool(np, "arm,cpu-registers-not-fw-configured"))
		arch_timer_uses_ppi = PHYS_SECURE_PPI;

	/* On some systems, the counter stops ticking when in suspend. */
	arch_counter_suspend_stop = of_property_read_bool(np,
							 "arm,no-tick-in-suspend");

	return arch_timer_init();
}
Exemple #8
0
/*! Initialize time management subsystem */
int k_time_init ()
{
	arch_timer_init ();

	return EXIT_SUCCESS;
}
Exemple #9
0
void initialize_timer(void)
{
    arch_timer_init();
}