static int scb9328_devices_init(void) {
imx_gpio_mode(PA23_PF_CS5);
/* CS3 becomes CS3 by clearing reset default bit 1 in FMCR */
FMCR = 0x1;
CS0U = 0x000F2000;
CS0L = 0x11110d01;
CS1U = 0x000F0a00;
CS1L = 0x11110601;
CS2U = 0x0;
CS2L = 0x0;
CS3U = 0x000FFFFF;
CS3L = 0x00000303;
CS4U = 0x000F0a00;
CS4L = 0x11110301;
CS5U = 0x00008400;
CS5L = 0x00000D03;
register_device(&cfi_dev);
register_device(&sdram_dev);
register_device(&dm9000_dev);
devfs_add_partition("nor0", 0x00000, 0x20000, PARTITION_FIXED, "self0");
devfs_add_partition("nor0", 0x40000, 0x20000, PARTITION_FIXED, "env0");
protect_file("/dev/env0", 1);
armlinux_add_dram(&sdram_dev);
armlinux_set_bootparams((void *)0x08000100);
armlinux_set_architecture(MACH_TYPE_SCB9328);
return 0;
}
static int eukrea_cpuimx25_devices_init(void)
{
eukrea_cpuimx25_mmu_init();
mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx25_pads,
ARRAY_SIZE(eukrea_cpuimx25_pads));
register_device(&fec_dev);
nand_info.width = 1;
register_device(&nand_dev);
devfs_add_partition("nand0", 0x00000, 0x40000,
PARTITION_FIXED, "self_raw");
dev_add_bb_dev("self_raw", "self0");
devfs_add_partition("nand0", 0x40000, 0x20000,
PARTITION_FIXED, "env_raw");
dev_add_bb_dev("env_raw", "env0");
register_device(&sdram0_dev);
/* enable LCD */
gpio_direction_output(26, 1);
gpio_set_value(26, 1);
register_device(&imxfb_dev);
armlinux_add_dram(&sdram0_dev);
armlinux_set_bootparams((void *)0x80000100);
armlinux_set_architecture(MACH_TYPE_EUKREA_CPUIMX25);
return 0;
}
static int eukrea_cpuimx35_devices_init(void)
{
register_device(&nand_dev);
devfs_add_partition("nand0", 0x00000, 0x40000, PARTITION_FIXED, "self_raw");
dev_add_bb_dev("self_raw", "self0");
devfs_add_partition("nand0", 0x40000, 0x20000, PARTITION_FIXED, "env_raw");
dev_add_bb_dev("env_raw", "env0");
register_device(&fec_dev);
register_device(&sdram_dev);
register_device(&imxfb_dev);
armlinux_add_dram(&sdram_dev);
armlinux_set_bootparams((void *)0x80000100);
armlinux_set_architecture(MACH_TYPE_EUKREA_CPUIMX35);
return 0;
}
static int f3s_devices_init(void)
{
babbage_mmu_init();
register_device(&sdram_dev);
register_device(&fec_dev);
register_device(&esdhc_dev);
spi_register_board_info(mx51_babbage_spi_board_info,
ARRAY_SIZE(mx51_babbage_spi_board_info));
register_device(&spi_dev);
babbage_power_init();
armlinux_add_dram(&sdram_dev);
armlinux_set_bootparams((void *)0x90000100);
armlinux_set_architecture(MACH_TYPE_MX51_BABBAGE);
return 0;
}
static int eukrea_cpuimx27_devices_init(void)
{
char *envdev = "no";
int i;
unsigned int mode[] = {
PD0_AIN_FEC_TXD0,
PD1_AIN_FEC_TXD1,
PD2_AIN_FEC_TXD2,
PD3_AIN_FEC_TXD3,
PD4_AOUT_FEC_RX_ER,
PD5_AOUT_FEC_RXD1,
PD6_AOUT_FEC_RXD2,
PD7_AOUT_FEC_RXD3,
PD8_AF_FEC_MDIO,
PD9_AIN_FEC_MDC | GPIO_PUEN,
PD10_AOUT_FEC_CRS,
PD11_AOUT_FEC_TX_CLK,
PD12_AOUT_FEC_RXD0,
PD13_AOUT_FEC_RX_DV,
PD14_AOUT_FEC_RX_CLK,
PD15_AOUT_FEC_COL,
PD16_AIN_FEC_TX_ER,
PF23_AIN_FEC_TX_EN,
PD17_PF_I2C_DATA,
PD18_PF_I2C_CLK,
#ifdef CONFIG_DRIVER_SERIAL_IMX
PE12_PF_UART1_TXD,
PE13_PF_UART1_RXD,
PE14_PF_UART1_CTS,
PE15_PF_UART1_RTS,
#endif
#ifdef CONFIG_DRIVER_VIDEO_IMX
PA5_PF_LSCLK,
PA6_PF_LD0,
PA7_PF_LD1,
PA8_PF_LD2,
PA9_PF_LD3,
PA10_PF_LD4,
PA11_PF_LD5,
PA12_PF_LD6,
PA13_PF_LD7,
PA14_PF_LD8,
PA15_PF_LD9,
PA16_PF_LD10,
PA17_PF_LD11,
PA18_PF_LD12,
PA19_PF_LD13,
PA20_PF_LD14,
PA21_PF_LD15,
PA22_PF_LD16,
PA23_PF_LD17,
PA28_PF_HSYNC,
PA29_PF_VSYNC,
PA31_PF_OE_ACD,
GPIO_PORTE | 5 | GPIO_GPIO | GPIO_OUT,
#endif
};
eukrea_cpuimx27_mmu_init();
/* configure 16 bit nor flash on cs0 */
CS0U = 0x00008F03;
CS0L = 0xA0330D01;
CS0A = 0x002208C0;
/* initialize gpios */
for (i = 0; i < ARRAY_SIZE(mode); i++)
imx_gpio_mode(mode[i]);
register_device(&cfi_dev);
#ifdef CONFIG_EUKREA_CPUIMX27_NOR_64MB
register_device(&cfi_dev1);
#endif
register_device(&nand_dev);
register_device(&sdram_dev);
PCCR0 |= PCCR0_I2C1_EN;
i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
register_device(&i2c_dev);
devfs_add_partition("nor0", 0x00000, 0x40000, PARTITION_FIXED, "self0");
devfs_add_partition("nor0", 0x40000, 0x20000, PARTITION_FIXED, "env0");
protect_file("/dev/env0", 1);
envdev = "NOR";
printf("Using environment in %s Flash\n", envdev);
#ifdef CONFIG_DRIVER_VIDEO_IMX
register_device(&imxfb_dev);
gpio_direction_output(GPIO_PORTE | 5, 0);
gpio_set_value(GPIO_PORTE | 5, 1);
#endif
armlinux_add_dram(&sdram_dev);
armlinux_set_bootparams((void *)0xa0000100);
armlinux_set_architecture(MACH_TYPE_CPUIMX27);
return 0;
}
static int pca100_devices_init(void)
{
int i;
struct device_d *nand;
unsigned int mode[] = {
PD0_AIN_FEC_TXD0,
PD1_AIN_FEC_TXD1,
PD2_AIN_FEC_TXD2,
PD3_AIN_FEC_TXD3,
PD4_AOUT_FEC_RX_ER,
PD5_AOUT_FEC_RXD1,
PD6_AOUT_FEC_RXD2,
PD7_AOUT_FEC_RXD3,
PD8_AF_FEC_MDIO,
PD9_AIN_FEC_MDC | GPIO_PUEN,
PD10_AOUT_FEC_CRS,
PD11_AOUT_FEC_TX_CLK,
PD12_AOUT_FEC_RXD0,
PD13_AOUT_FEC_RX_DV,
PD14_AOUT_FEC_CLR,
PD15_AOUT_FEC_COL,
PD16_AIN_FEC_TX_ER,
PF23_AIN_FEC_TX_EN,
PE12_PF_UART1_TXD,
PE13_PF_UART1_RXD,
PE14_PF_UART1_CTS,
PE15_PF_UART1_RTS,
PD25_PF_CSPI1_RDY,
PD26_PF_CSPI1_SS2,
PD27_PF_CSPI1_SS1,
PD28_PF_CSPI1_SS0,
PD29_PF_CSPI1_SCLK,
PD30_PF_CSPI1_MISO,
PD31_PF_CSPI1_MOSI,
/* USB host 2 */
PA0_PF_USBH2_CLK,
PA1_PF_USBH2_DIR,
PA2_PF_USBH2_DATA7,
PA3_PF_USBH2_NXT,
PA4_PF_USBH2_STP,
PD19_AF_USBH2_DATA4,
PD20_AF_USBH2_DATA3,
PD21_AF_USBH2_DATA6,
PD22_AF_USBH2_DATA0,
PD23_AF_USBH2_DATA2,
PD24_AF_USBH2_DATA1,
PD26_AF_USBH2_DATA5,
};
/* disable the usb phys */
imx_gpio_mode((GPIO_PORTB | 23) | GPIO_GPIO | GPIO_IN);
gpio_direction_output(GPIO_PORTB + 23, 1);
imx_gpio_mode((GPIO_PORTB | 24) | GPIO_GPIO | GPIO_IN);
gpio_direction_output(GPIO_PORTB + 24, 1);
/* initizalize gpios */
for (i = 0; i < ARRAY_SIZE(mode); i++)
imx_gpio_mode(mode[i]);
register_device(&nand_dev);
register_device(&sdram_dev);
register_device(&fec_dev);
PCCR1 |= PCCR1_PERCLK2_EN;
#ifdef CONFIG_USB
pca100_usbh_init();
register_device(&usbh2_dev);
#endif
nand = get_device_by_name("nand0");
devfs_add_partition("nand0", 0x00000, 0x40000, PARTITION_FIXED, "self_raw");
dev_add_bb_dev("self_raw", "self0");
devfs_add_partition("nand0", 0x40000, 0x20000, PARTITION_FIXED, "env_raw");
dev_add_bb_dev("env_raw", "env0");
armlinux_add_dram(&sdram_dev);
armlinux_set_bootparams((void *)0xa0000100);
armlinux_set_architecture(2149);
return 0;
}
static int pcm038_devices_init(void)
{
int i;
char *envdev;
unsigned int mode[] = {
PD0_AIN_FEC_TXD0,
PD1_AIN_FEC_TXD1,
PD2_AIN_FEC_TXD2,
PD3_AIN_FEC_TXD3,
PD4_AOUT_FEC_RX_ER,
PD5_AOUT_FEC_RXD1,
PD6_AOUT_FEC_RXD2,
PD7_AOUT_FEC_RXD3,
PD8_AF_FEC_MDIO,
PD9_AIN_FEC_MDC | GPIO_PUEN,
PD10_AOUT_FEC_CRS,
PD11_AOUT_FEC_TX_CLK,
PD12_AOUT_FEC_RXD0,
PD13_AOUT_FEC_RX_DV,
PD14_AOUT_FEC_CLR,
PD15_AOUT_FEC_COL,
PD16_AIN_FEC_TX_ER,
PF23_AIN_FEC_TX_EN,
PE12_PF_UART1_TXD,
PE13_PF_UART1_RXD,
PE14_PF_UART1_CTS,
PE15_PF_UART1_RTS,
PD25_PF_CSPI1_RDY,
GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT,
PD29_PF_CSPI1_SCLK,
PD30_PF_CSPI1_MISO,
PD31_PF_CSPI1_MOSI,
/* display */
PA5_PF_LSCLK,
PA6_PF_LD0,
PA7_PF_LD1,
PA8_PF_LD2,
PA9_PF_LD3,
PA10_PF_LD4,
PA11_PF_LD5,
PA12_PF_LD6,
PA13_PF_LD7,
PA14_PF_LD8,
PA15_PF_LD9,
PA16_PF_LD10,
PA17_PF_LD11,
PA18_PF_LD12,
PA19_PF_LD13,
PA20_PF_LD14,
PA21_PF_LD15,
PA22_PF_LD16,
PA23_PF_LD17,
PA24_PF_REV,
PA25_PF_CLS,
PA26_PF_PS,
PA27_PF_SPL_SPR,
PA28_PF_HSYNC,
PA29_PF_VSYNC,
PA30_PF_CONTRAST,
PA31_PF_OE_ACD,
/* USB host 2 */
PA0_PF_USBH2_CLK,
PA1_PF_USBH2_DIR,
PA2_PF_USBH2_DATA7,
PA3_PF_USBH2_NXT,
PA4_PF_USBH2_STP,
PD19_AF_USBH2_DATA4,
PD20_AF_USBH2_DATA3,
PD21_AF_USBH2_DATA6,
PD22_AF_USBH2_DATA0,
PD23_AF_USBH2_DATA2,
PD24_AF_USBH2_DATA1,
PD26_AF_USBH2_DATA5,
};
pcm038_mmu_init();
/* configure 16 bit nor flash on cs0 */
CS0U = 0x0000CC03;
CS0L = 0xa0330D01;
CS0A = 0x00220800;
/* configure SRAM on cs1 */
CS1U = 0x0000d843;
CS1L = 0x22252521;
CS1A = 0x22220a00;
/* configure SJA1000 on cs4 */
CS4U = 0x0000DCF6;
CS4L = 0x444A0301;
CS4A = 0x44443302;
/* initizalize gpios */
for (i = 0; i < ARRAY_SIZE(mode); i++)
imx_gpio_mode(mode[i]);
PCCR0 |= PCCR0_CSPI1_EN;
PCCR1 |= PCCR1_PERCLK2_EN;
gpio_direction_output(GPIO_PORTD | 28, 0);
gpio_set_value(GPIO_PORTD | 28, 0);
spi_register_board_info(pcm038_spi_board_info, ARRAY_SIZE(pcm038_spi_board_info));
register_device(&spi_dev);
register_device(&cfi_dev);
register_device(&nand_dev);
register_device(&sdram_dev);
register_device(&sram_dev);
register_device(&imxfb_dev);
#ifdef CONFIG_USB
pcm038_usbh_init();
register_device(&usbh2_dev);
#endif
/* Register the fec device after the PLL re-initialisation
* as the fec depends on the (now higher) ipg clock
*/
register_device(&fec_dev);
switch ((GPCR & GPCR_BOOT_MASK) >> GPCR_BOOT_SHIFT) {
case GPCR_BOOT_8BIT_NAND_2k:
case GPCR_BOOT_16BIT_NAND_2k:
case GPCR_BOOT_16BIT_NAND_512:
case GPCR_BOOT_8BIT_NAND_512:
devfs_add_partition("nand0", 0x00000, 0x40000, PARTITION_FIXED, "self_raw");
dev_add_bb_dev("self_raw", "self0");
devfs_add_partition("nand0", 0x40000, 0x20000, PARTITION_FIXED, "env_raw");
dev_add_bb_dev("env_raw", "env0");
envdev = "NAND";
break;
default:
devfs_add_partition("nor0", 0x00000, 0x40000, PARTITION_FIXED, "self0");
devfs_add_partition("nor0", 0x40000, 0x20000, PARTITION_FIXED, "env0");
protect_file("/dev/env0", 1);
envdev = "NOR";
}
printf("Using environment in %s Flash\n", envdev);
armlinux_add_dram(&sdram_dev);
armlinux_set_bootparams((void *)0xa0000100);
armlinux_set_architecture(MACH_TYPE_PCM038);
return 0;
}
void st8815_add_device_sdram(u32 size)
{
sdram_dev.size = size;
register_device(&sdram_dev);
armlinux_add_dram(&sdram_dev);
}
