static void
dump_vmm_control_regs (void)
{
ulong r[16];
asm_rdcr0 (&r[CONTROL_REG_CR0]);
asm_rdcr2 (&r[CONTROL_REG_CR2]);
asm_rdcr3 (&r[CONTROL_REG_CR3]);
asm_rdcr4 (&r[CONTROL_REG_CR4]);
dump_control_regs (r);
}
static void
wakeup_prepare (void)
{
ulong tmp;
/* All processors load the current GDTR temporarily
when they wake up. */
wakeup_entry_gdtr.limit = 0xFFFF;
tmp = (ulong)currentcpu->segdesctbl;
wakeup_entry_gdtr.base = tmp;
asm_rdcr4 (&tmp);
wakeup_entry_cr4 = tmp;
wakeup_entry_cr3 = vmm_base_cr3;
asm_rdcr0 (&tmp);
wakeup_entry_cr0 = tmp;
}
static void
vt_panic (void)
{
ulong cr4;
u8 port0x92;
asm_rdcr4 (&cr4);
if (!(cr4 & CR4_VMXE_BIT))
return;
/* enable A20 */
/* the guest can set or clear A20M# because
A20M# is ignored during VMX operation. however
A20M# is used after VMXOFF. */
asm_inb (0x92, &port0x92);
port0x92 |= 2;
asm_outb (0x92, port0x92);
asm_vmxoff ();
cr4 &= ~CR4_VMXE_BIT;
asm_wrcr4 (cr4);
}
