static void __init of_at91_pmc_setup(struct device_node *np, const struct at91_pmc_caps *caps) { struct at91_pmc *pmc; struct device_node *childnp; void (*clk_setup)(struct device_node *, struct at91_pmc *); const struct of_device_id *clk_id; void __iomem *regbase = of_iomap(np, 0); int virq; if (!regbase) return; virq = irq_of_parse_and_map(np, 0); if (!virq) return; pmc = at91_pmc_init(np, regbase, virq, caps); if (!pmc) return; for_each_child_of_node(np, childnp) { clk_id = of_match_node(pmc_clk_ids, childnp); if (!clk_id) continue; clk_setup = clk_id->data; clk_setup(childnp, pmc); }
void board_init_f(ulong dummy) { switch_to_main_crystal_osc(); /* disable watchdog */ at91_disable_wdt(); /* PMC configuration */ at91_pmc_init(); at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK); matrix_init(); redirect_int_from_saic_to_aic(); timer_init(); board_early_init_f(); preloader_console_init(); mem_init(); /* Clear the BSS. */ memset(__bss_start, 0, __bss_end - __bss_start); board_init_r(NULL, 0); }
void s_init(void) { switch_to_main_crystal_osc(); /* disable watchdog */ at91_disable_wdt(); /* PMC configuration */ at91_pmc_init(); at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK); timer_init(); board_early_init_f(); preloader_console_init(); mem_init(); }
void board_init_f(ulong dummy) { int ret; switch_to_main_crystal_osc(); #ifdef CONFIG_SAMA5D2 configure_2nd_sram_as_l2_cache(); #endif /* disable watchdog */ at91_disable_wdt(); /* PMC configuration */ at91_pmc_init(); at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK); matrix_init(); redirect_int_from_saic_to_aic(); timer_init(); board_early_init_f(); mem_init(); ret = spl_init(); if (ret) { debug("spl_init() failed: %d\n", ret); hang(); } preloader_console_init(); }