static void otc570_lcd_hw_init(void)
{
at91_set_A_periph(AT91_PIN_PC0, 0); /* LCDVSYNC */
at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */
at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */
at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */
at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */
at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */
at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */
at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */
at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */
at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */
at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */
at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */
at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */
at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */
at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD13 */
at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */
at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */
at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */
at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */
at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */
at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD21 */
at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */
at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */
at91_set_gpio_output(AT91_PIN_PA30, 1); /* PCI */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_LCDC);
gd->fb_base = CONFIG_OTC570_LCD_BASE;
}
void __init at91_add_device_nand(struct atmel_nand_data *data)
{
unsigned long csa;
if (!data)
return;
csa = at91_sys_read(AT91_MATRIX_EBICSA);
at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
/* enable pin */
if (gpio_is_valid(data->enable_pin))
at91_set_gpio_output(data->enable_pin, 1);
/* ready/busy pin */
if (gpio_is_valid(data->rdy_pin))
at91_set_gpio_input(data->rdy_pin, 1);
/* card detect pin */
if (gpio_is_valid(data->det_pin))
at91_set_gpio_input(data->det_pin, 1);
at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */
nand_data = *data;
platform_device_register(&atmel_nand_device);
}
void at91_spi0_hw_init(unsigned long cs_mask)
{
at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0);
if (cs_mask & (1 << 0)) {
at91_set_A_periph(AT91_PIN_PA3, 1);
}
if (cs_mask & (1 << 1)) {
at91_set_B_periph(AT91_PIN_PC11, 1);
}
if (cs_mask & (1 << 2)) {
at91_set_B_periph(AT91_PIN_PC16, 1);
}
if (cs_mask & (1 << 3)) {
at91_set_B_periph(AT91_PIN_PC17, 1);
}
if (cs_mask & (1 << 4)) {
at91_set_gpio_output(AT91_PIN_PA3, 1);
}
if (cs_mask & (1 << 5)) {
at91_set_gpio_output(AT91_PIN_PC11, 1);
}
if (cs_mask & (1 << 6)) {
at91_set_gpio_output(AT91_PIN_PC16, 1);
}
if (cs_mask & (1 << 7)) {
at91_set_gpio_output(AT91_PIN_PC17, 1);
}
}
void __init at91_add_device_nand(struct atmel_nand_data *data)
{
unsigned long csa;
if (!data)
return;
#warning "Check this register definitions"
csa = at91_sys_read(AT572D940HF_MATRIX_EBICSA);
at91_sys_write(AT572D940HF_MATRIX_EBICSA, csa | AT572D940HF_MATRIX_CS3A_SMC);
/* enable pin */
if (data->enable_pin)
at91_set_gpio_output(data->enable_pin, 1);
/* ready/busy pin */
if (data->rdy_pin)
at91_set_gpio_input(data->rdy_pin, 1);
/* card detect pin */
if (data->det_pin)
at91_set_gpio_input(data->det_pin, 1);
at91_set_A_periph(AT91_PIN_PB28, 0); /* A[22] */
at91_set_B_periph(AT91_PIN_PA28, 0); /* NANDOE */
at91_set_B_periph(AT91_PIN_PA29, 0); /* NANDWE */
nand_data = *data;
platform_device_register(&at572d940hf_nand_device);
}
void at91_spi1_hw_init(unsigned long cs_mask)
{
at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_MISO */
at91_set_A_periph(AT91_PIN_PB15, 0); /* SPI1_MOSI */
at91_set_A_periph(AT91_PIN_PB16, 0); /* SPI1_SPCK */
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_SPI1);
if (cs_mask & (1 << 0)) {
at91_set_A_periph(AT91_PIN_PB17, 0);
}
if (cs_mask & (1 << 1)) {
at91_set_B_periph(AT91_PIN_PD28, 0);
}
if (cs_mask & (1 << 2)) {
at91_set_A_periph(AT91_PIN_PD18, 0);
}
if (cs_mask & (1 << 3)) {
at91_set_A_periph(AT91_PIN_PD19, 0);
}
if (cs_mask & (1 << 4)) {
at91_set_gpio_output(AT91_PIN_PB17, 0);
}
if (cs_mask & (1 << 5)) {
at91_set_gpio_output(AT91_PIN_PD28, 0);
}
if (cs_mask & (1 << 6)) {
at91_set_gpio_output(AT91_PIN_PD18, 0);
}
if (cs_mask & (1 << 7)) {
at91_set_gpio_output(AT91_PIN_PD19, 0);
}
}
static void __init yl_9200_init_video(void)
{
at91_sys_write(AT91_PIOC + PIO_ASR,AT91_PIN_PC6);
at91_sys_write(AT91_PIOC + PIO_BSR,0);
at91_sys_write(AT91_PIOC + PIO_ASR,AT91_PIN_PC6);
at91_sys_write( AT91_SMC_CSR(2),
AT91_SMC_NWS_(0x4) |
AT91_SMC_WSEN |
AT91_SMC_TDF_(0x100) |
AT91_SMC_DBW
);
}
/*
* IRQ handler for the RTC
*/
static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id)
{
struct platform_device *pdev = dev_id;
struct rtc_device *rtc = platform_get_drvdata(pdev);
unsigned int rtsr;
unsigned long events = 0;
rtsr = at91_sys_read(AT91_RTC_SR) & at91_sys_read(AT91_RTC_IMR);
if (rtsr) { /* this interrupt is shared! Is it ours? */
if (rtsr & AT91_RTC_ALARM)
events |= (RTC_AF | RTC_IRQF);
if (rtsr & AT91_RTC_SECEV)
events |= (RTC_UF | RTC_IRQF);
if (rtsr & AT91_RTC_ACKUPD)
complete(&at91_rtc_updated);
at91_sys_write(AT91_RTC_SCCR, rtsr); /* clear status reg */
rtc_update_irq(rtc, 1, events);
pr_debug("%s(): num=%ld, events=0x%02lx\n", __func__,
events >> 8, events & 0x000000FF);
return IRQ_HANDLED;
}
return IRQ_NONE; /* not handled */
}
int board_init(void)
{
/* arch number of AT91SAM9G20EK-Board */
gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G20EK;
/* adress of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
#ifdef CONFIG_CMD_NAND
at91sam9g20ek_nand_hw_init();
#endif
#ifdef CONFIG_HAS_DATAFLASH
at91sam9g20ek_spi_hw_init();
#endif
#ifdef CONFIG_MACB
at91sam9g20ek_macb_hw_init();
#endif
/** Setup MMC/SD Peripheral **/
at91_set_A_periph(AT91_PIN_PA6, 1);
at91_set_A_periph(AT91_PIN_PA7, 1);
at91_set_A_periph(AT91_PIN_PA8, 0);
at91_set_A_periph(AT91_PIN_PA9, 1);
at91_set_A_periph(AT91_PIN_PA10, 1);
at91_set_A_periph(AT91_PIN_PA11, 1);
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_MCI);
/** Setup serial ports **/
at91_serial_hw_init();
return 0;
}
/*
* Set the watchdog time interval in 1/256Hz (write-once)
* Counter is 12 bit.
*/
static int at91_wdt_settimeout(unsigned int timeout)
{
unsigned int reg;
unsigned int mr;
/* Check if disabled */
mr = at91_sys_read(AT91_WDT_MR);
if (mr & AT91_WDT_WDDIS) {
printf("sorry, watchdog is disabled\n");
return -1;
}
/*
* All counting occurs at SLOW_CLOCK / 128 = 256 Hz
*
* Since WDV is a 12-bit counter, the maximum period is
* 4096 / 256 = 16 seconds.
*/
reg = AT91_WDT_WDRSTEN /* causes watchdog reset */
/* | AT91_WDT_WDRPROC causes processor reset only */
| AT91_WDT_WDDBGHLT /* disabled in debug mode */
| AT91_WDT_WDD /* restart at any time */
| (timeout & AT91_WDT_WDV); /* timer value */
at91_sys_write(AT91_WDT_MR, reg);
return 0;
}
static void __init ek_board_init(void)
{
/* Serial */
at91_add_device_serial();
/* USB Host */
at91_add_device_usbh(&ek_usbh_data);
/* USB Device */
at91_add_device_udc(&ek_udc_data);
/* SPI */
at91_set_gpio_output(AT91_PIN_PE20, 1); /* select spi0 clock */
at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
/* Touchscreen */
ek_add_device_ts();
/* MMC */
at91_add_device_mmc(1, &ek_mmc_data);
/* Ethernet */
at91_add_device_eth(&ek_macb_data);
/* NAND */
at91_add_device_nand(&ek_nand_data);
/* I2C */
at91_add_device_i2c(NULL, 0);
/* LCD Controller */
at91_add_device_lcdc(&ek_lcdc_data);
/* Push Buttons */
ek_add_device_buttons();
/* AC97 */
at91_add_device_ac97(&ek_ac97_data);
/* LEDs */
at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
/* shutdown controller, wakeup button (5 msec low) */
at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
| AT91_SHDW_RTTWKEN);
}
void __init at91_add_device_nand(struct atmel_nand_data *data)
{
unsigned long csa;
if (!data)
return;
csa = at91_sys_read(AT91_MATRIX_EBICSA);
at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
if (data->enable_pin)
at91_set_gpio_output(data->enable_pin, 1);
if (data->rdy_pin)
at91_set_gpio_input(data->rdy_pin, 1);
if (data->det_pin)
at91_set_gpio_input(data->det_pin, 1);
at91_set_A_periph(AT91_PIN_PB4, 0);
at91_set_A_periph(AT91_PIN_PB5, 0);
nand_data = *data;
platform_device_register(&atmel_nand_device);
}
static void at91sam926x_pit_reset(void)
{
/* Disable timer and irqs */
at91_sys_write(AT91_PIT_MR, 0);
/* Clear any pending interrupts, wait for PIT to stop counting */
while (PIT_CPIV(at91_sys_read(AT91_PIT_PIVR)) != 0)
;
/* Start PIT but don't enable IRQ */
//at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
pit_cnt += pit_cycle * PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN
| AT91_PIT_PITIEN);
rt_kprintf("PIT_MR=0x%08x\n", at91_sys_read(AT91_PIT_MR));
}
static void __init ek_board_init(void)
{
/* Serial */
at91_add_device_serial();
/* USB Host */
at91_add_device_usbh(&ek_usbh_data);
/* USB Device */
at91_add_device_udc(&ek_udc_data);
/* SPI */
at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
/* NAND */
ek_add_device_nand();
/* I2C */
at91_add_device_i2c(NULL, 0);
/* Ethernet */
at91_add_device_eth(&ek_macb_data);
/* MMC */
at91_add_device_mmc(0, &ek_mmc_data);
/* Push Buttons */
ek_add_device_buttons();
/* LEDs */
at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
/* shutdown controller, wakeup button (5 msec low) */
at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
| AT91_SHDW_RTTWKEN);
}
void __init at91_add_device_usba(struct usba_platform_data *data)
{
at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS |
AT91_MATRIX_UDPHS_BYPASS_LOCK);
/*
* Invalid pins are 0 on AT91, but the usba driver is shared
* with AVR32, which use negative values instead. Once/if
* gpio_is_valid() is ported to AT91, revisit this code.
*/
usba_udc_data.pdata.vbus_pin = -EINVAL;
usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));;
if (data && data->vbus_pin > 0) {
at91_set_gpio_input(data->vbus_pin, 0);
at91_set_deglitch(data->vbus_pin, 1);
usba_udc_data.pdata.vbus_pin = data->vbus_pin;
}
/* Pullup pin is handled internally by USB device peripheral */
/* Clocks */
at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk");
at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk");
platform_device_register(&at91_usba_udc_device);
}
static int __init at91_console_setup(struct console *co, char *options)
{
struct uart_port *port;
int baud = 115200;
int bits = 8;
int parity = 'n';
int flow = 'n';
/*
* Check whether an invalid uart number has been specified, and
* if so, search for the first available port that does have
* console support.
*/
port = uart_get_console(at91_ports, AT91_NR_UART, co);
/*
* Enable the serial console, in-case bootloader did not do it.
*/
at91_sys_write(AT91_PMC_PCER, 1 << port->irq); /* enable clock */
UART_PUT_IDR(port, -1); /* disable interrupts */
UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX);
UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN);
if (options)
uart_parse_options(options, &baud, &parity, &bits, &flow);
else
at91_console_get_options(port, &baud, &parity, &bits);
return uart_set_options(port, co, baud, parity, bits, flow);
}
static int at91_aic_set_type(unsigned irq, unsigned type)
{
unsigned int smr, srctype;
switch (type) {
case IRQ_TYPE_LEVEL_HIGH:
srctype = AT91_AIC_SRCTYPE_HIGH;
break;
case IRQ_TYPE_EDGE_RISING:
srctype = AT91_AIC_SRCTYPE_RISING;
break;
case IRQ_TYPE_LEVEL_LOW:
if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */
srctype = AT91_AIC_SRCTYPE_LOW;
else
return -1;
break;
case IRQ_TYPE_EDGE_FALLING:
if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */
srctype = AT91_AIC_SRCTYPE_FALLING;
else
return -1;
break;
default:
return -1;
}
smr = at91_sys_read(AT91_AIC_SMR(irq)) & ~AT91_AIC_SRCTYPE;
at91_sys_write(AT91_AIC_SMR(irq), smr | srctype);
return 0;
}
void at91_spi1_hw_init(unsigned long cs_mask)
{
at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */
at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */
at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI1);
if (cs_mask & (1 << 0)) {
at91_set_A_periph(AT91_PIN_PB3, 1);
}
if (cs_mask & (1 << 1)) {
at91_set_B_periph(AT91_PIN_PC5, 1);
}
if (cs_mask & (1 << 2)) {
at91_set_B_periph(AT91_PIN_PC4, 1);
}
if (cs_mask & (1 << 3)) {
at91_set_gpio_output(AT91_PIN_PC3, 1);
}
if (cs_mask & (1 << 4)) {
at91_set_gpio_output(AT91_PIN_PB3, 1);
}
if (cs_mask & (1 << 5)) {
at91_set_gpio_output(AT91_PIN_PC5, 1);
}
if (cs_mask & (1 << 6)) {
at91_set_gpio_output(AT91_PIN_PC4, 1);
}
if (cs_mask & (1 << 7)) {
at91_set_gpio_output(AT91_PIN_PC3, 1);
}
}
static void at91sam9263ek_lcd_hw_init(void)
{
at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */
at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */
at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */
at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */
at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */
at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */
at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */
at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */
at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */
at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */
at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */
at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */
at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */
at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD13 */
at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */
at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */
at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */
at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */
at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */
at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD21 */
at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */
at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_LCDC);
gd->fb_base = AT91SAM9263_SRAM0_BASE;
}
static void __init ek_board_init(void)
{
/* Serial */
at91_add_device_serial();
/* USB Host */
at91_add_device_usbh(&ek_usbh_data);
/* USB Device */
at91_add_device_udc(&ek_udc_data);
/* SPI */
at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
/* NAND */
ek_add_device_nand();
/* Ethernet */
at91_add_device_eth(&ek_macb_data);
/* MMC */
at91_add_device_mmc(0, &ek_mmc_data);
/* I2C */
at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices));
/* Compact Flash */
at91_add_device_cf(&ek_cf_data);
/* SSC (to AT73C213) */
at73c213_set_clk(&at73c213_data);
at91_add_device_ssc(AT91SAM9260_ID_SSC, ATMEL_SSC_TX);
/* LEDs */
at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
/* Push Buttons */
ek_add_device_buttons();
/* shutdown controller, wakeup button (5 msec low) */
at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
| AT91_SHDW_RTTWKEN);
}
int board_init(void)
{
/* Peripheral Clock Enable Register */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOA |
1 << AT91SAM9263_ID_PIOB |
1 << AT91SAM9263_ID_PIOCDE);
/* arch number of MEESC-Board */
gd->bd->bi_arch_number = MACH_TYPE_MEESC;
/* adress of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
at91_serial_hw_init();
#ifdef CONFIG_CMD_NAND
meesc_nand_hw_init();
#endif
meesc_ethercat_hw_init();
#ifdef CONFIG_HAS_DATAFLASH
at91_spi0_hw_init(1 << 0);
#endif
#ifdef CONFIG_MACB
meesc_macb_hw_init();
#endif
#ifdef CONFIG_AT91_CAN
at91_can_hw_init();
#endif
return 0;
}
void at91_add_device_nand(struct atmel_nand_data *data)
{
unsigned long csa;
if (!data)
return;
csa = at91_sys_read(AT91_MATRIX_EBICSA);
at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
/* enable pin */
if (data->enable_pin)
at91_set_gpio_output(data->enable_pin, 1);
/* ready/busy pin */
if (data->rdy_pin)
at91_set_gpio_input(data->rdy_pin, 1);
/* card detect pin */
if (data->det_pin)
at91_set_gpio_input(data->det_pin, 1);
add_generic_device_res("atmel_nand", DEVICE_ID_DYNAMIC, nand_resources,
ARRAY_SIZE(nand_resources), data);
}
void __init at91_add_device_nand(struct atmel_nand_data *data)
{
unsigned long csa;
if (!data)
return;
csa = at91_sys_read(AT91_MATRIX_EBICSA);
at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_NANDFLASH);
data->pmecc_lookup_table_offset = 0x8000;
/* enable pin */
if (gpio_is_valid(data->enable_pin))
at91_set_gpio_output(data->enable_pin, 1);
/* ready/busy pin */
if (gpio_is_valid(data->rdy_pin))
at91_set_gpio_input(data->rdy_pin, 1);
/* card detect pin */
if (gpio_is_valid(data->det_pin))
at91_set_gpio_input(data->det_pin, 1);
add_generic_device_res("atmel_nand", 0, nand_resources,
ARRAY_SIZE(nand_resources), data);
}
void __init at91_add_device_nand(struct atmel_nand_data *data)
{
unsigned long csa;
if (!data)
return;
csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
/* enable pin */
if (data->enable_pin)
at91_set_gpio_output(data->enable_pin, 1);
/* ready/busy pin */
if (data->rdy_pin)
at91_set_gpio_input(data->rdy_pin, 1);
/* card detect pin */
if (data->det_pin)
at91_set_gpio_input(data->det_pin, 1);
nand_data = *data;
platform_device_register(&at91sam9263_nand_device);
}
void at91_add_device_nand(struct atmel_nand_data *data)
{
unsigned long csa;
if (!data)
return;
csa = at91_sys_read(AT91_MATRIX_EBICSA);
at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
/* enable pin */
if (gpio_is_valid(data->enable_pin))
at91_set_gpio_output(data->enable_pin, 1);
/* ready/busy pin */
if (gpio_is_valid(data->rdy_pin))
at91_set_gpio_input(data->rdy_pin, 1);
/* card detect pin */
if (gpio_is_valid(data->det_pin))
at91_set_gpio_input(data->det_pin, 1);
at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */
add_generic_device("atmel_nand", 0, NULL, AT91_CHIPSELECT_3, 0x10,
IORESOURCE_MEM, data);
}
static void at91sam9261ek_lcd_hw_init(void)
{
at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */
at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */
at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */
at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */
at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */
at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */
at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */
at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */
at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */
at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */
at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */
at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */
at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */
at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */
at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */
at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */
at91_sys_write(AT91_PMC_SCER, AT91_PMC_HCK1);
gd->fb_base = AT91SAM9261_SRAM_BASE;
}
static irqreturn_t keypad_handler (int irq, void *dev_id)
{
int value;
at91_sys_write (AT91_AIC_ICCR, 1 << AT91SAM9260_ID_PIOB); // clear interrupt
value = at91_get_gpio_value(RESTORE_KEY);
if(RESTR_KEY_DOWN == value)
{
tick = jiffies;
pressed = 0x01;
sec = 0;
}
else
{
/*Sometimes, it will miss some Key pressed or release action, use release to fix the bug*/
if(0x01==pressed)
{
tick = jiffies - tick;
sec = tick / HZ;
}
pressed = 0x00;
}
return IRQ_HANDLED;
}
static int ek_special_hw_init(void)
{
unsigned long rstc;
unsigned long rst_key = (0xA5 << 24);
/*
* For on the sam9m10g45ek board, the chip wm9711 stay in the test mode,
* so it need do some action to exit mode.
*/
const struct pio_desc wm9711_pins[] = {
{"AC97TX", AT91C_PIN_PD(7), 0, PIO_PULLUP, PIO_OUTPUT},
{"AC97FS", AT91C_PIN_PD(8), 0, PIO_PULLUP, PIO_OUTPUT},
{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
};
pio_configure(wm9711_pins);
writel((1 << AT91C_ID_PIOD_E), PMC_PCER + AT91C_BASE_PMC);
/*
* Disable pull-up on:
* RXDV(PA15) => PHY normal mode (not Test mode)
* ERX0(PA12) => PHY ADDR0
* ERX1(PA13) => PHY ADDR1 => PHYADDR = 0x0
*
* PHY has internal pull-down
*/
writel((0x01 << 12) | (0x01 << 13) | (0x01 << 15), AT91C_BASE_PIOA + PIO_PPUDR(0));
rstc = at91_sys_read(AT91C_BASE_RSTC + RSTC_RMR);
/* Need to reset PHY -> 500ms reset */
at91_sys_write(AT91C_BASE_RSTC + RSTC_RMR, rst_key |
(AT91C_RSTC_ERSTL & (0x0D << 8)) |
AT91C_RSTC_URSTEN);
at91_sys_write(AT91C_BASE_RSTC + RSTC_RCR, rst_key | AT91C_RSTC_EXTRST);
/* Wait for end hardware reset */
while (!(at91_sys_read(AT91C_BASE_RSTC + RSTC_RSR) & AT91C_RSTC_NRSTL));
/* Restore NRST value */
at91_sys_write(AT91C_BASE_RSTC + RSTC_RMR, rst_key |
(rstc) |
AT91C_RSTC_URSTEN);
return 0;
}
static void at91rm9200_idle(void)
{
/*
* Disable the processor clock. The processor will be automatically
* re-enabled by an interrupt or by a reset.
*/
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
}
void at91_tc1_init()
{
at91_sys_write(AT91_PMC_PCER, 1<<AT91SAM9260_ID_TC0);
writel(AT91_TC_TC0XC0S_NONE | AT91_TC_TC1XC1S_NONE | AT91_TC_TC2XC2S_NONE, AT91SAM9260_BASE_TCB0 + AT91_TC_BMR);
writel(AT91_TC_CLKDIS, AT91SAM9260_BASE_TC0 + AT91_TC_CCR);
writel(AT91_TC_TIMER_CLOCK4, AT91SAM9260_BASE_TC0 + AT91_TC_CMR);
writel(0xffff, AT91SAM9260_BASE_TC0 + AT91_TC_CV);
}
/*
* Initialize the AIC interrupt controller.
*/
void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
{
unsigned int i;
/*
* The IVR is used by macro get_irqnr_and_base to read and verify.
* The irq number is NR_AIC_IRQS when a spurious interrupt has occurred.
*/
for (i = 0; i < NR_AIC_IRQS; i++) {
/* Put irq number in Source Vector Register: */
at91_sys_write(AT91_AIC_SVR(i), i);
/* Active Low interrupt, with the specified priority */
at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq);
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
/* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */
if (i < 8)
at91_sys_write(AT91_AIC_EOICR, 0);
}
/*
* Spurious Interrupt ID in Spurious Vector Register is NR_AIC_IRQS
* When there is no current interrupt, the IRQ Vector Register reads the value stored in AIC_SPU
*/
at91_sys_write(AT91_AIC_SPU, NR_AIC_IRQS);
/* No debugging in AIC: Debug (Protect) Control Register */
at91_sys_write(AT91_AIC_DCR, 0);
/* Disable and clear all interrupts initially */
at91_sys_write(AT91_AIC_IDCR, 0xFFFFFFFF);
at91_sys_write(AT91_AIC_ICCR, 0xFFFFFFFF);
}