static void __init common_setup(void) { u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); u8 *ee = ath79_get_eeprom(); /* Disable hardware control LAN1 and LAN2 LEDs, enabling GPIO14 and GPIO15 */ ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN); /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ ath79_setup_ar933x_phy4_switch(false, false); ath79_register_m25p80(&tl_mr11u_flash_data); ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr11u_leds_gpio), tl_mr11u_leds_gpio); ath79_register_usb(); ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ath79_register_mdio(0, 0x0); ath79_register_eth(0); ath79_register_wmac(ee, mac); }
static void __init wdr4300_setup(void) { u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); u8 *art = ath79_get_eeprom(); u8 tmpmac[ETH_ALEN]; ath79_register_m25p80(&wdr4300_flash_data); ath79_register_leds_gpio(-1, ARRAY_SIZE(wdr4300_leds_gpio), wdr4300_leds_gpio); ath79_register_gpio_keys_polled(-1, WDR4300_KEYS_POLL_INTERVAL, ARRAY_SIZE(wdr4300_gpio_keys), wdr4300_gpio_keys); ath79_wmac_set_ext_lna_gpio(0, WDR4300_GPIO_EXTERNAL_LNA0); ath79_wmac_set_ext_lna_gpio(1, WDR4300_GPIO_EXTERNAL_LNA1); ath79_init_mac(tmpmac, mac, -1); ath79_register_wmac(art + WDR4300_WMAC_CALDATA_OFFSET, tmpmac); ath79_init_mac(tmpmac, mac, 0); ap9x_pci_setup_wmac_led_pin(0, 0); ap91_pci_init(art + WDR4300_PCIE_CALDATA_OFFSET, tmpmac); ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); mdiobus_register_board_info(wdr4300_mdio0_info, ARRAY_SIZE(wdr4300_mdio0_info)); ath79_register_mdio(0, 0x0); ath79_init_mac(ath79_eth0_data.mac_addr, mac, -2); /* GMAC0 is connected to an AR8327N switch */ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ath79_eth0_data.phy_mask = BIT(0); ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ath79_eth0_pll_data.pll_1000 = 0x06000000; ath79_register_eth(0); gpio_request_one(WDR4300_GPIO_USB1_POWER, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, "USB1 power"); gpio_request_one(WDR4300_GPIO_USB2_POWER, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, "USB2 power"); ath79_register_usb(); }
static void __init tl_ap123_setup(void) { u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); u8 *ee = (ath79_get_eeprom() + 0x1000); ath79_register_m25p80(&tl_wax50re_flash_data); ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); ath79_register_mdio(1, 0x0); ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ath79_eth0_data.phy_mask = BIT(0); ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; ath79_register_eth(0); ath79_register_wmac(ee, mac); }
static void __init tl_ap99_setup(void) { u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); u8 *ee = (ath79_get_eeprom() + 0x1000); ath79_register_m25p80(&tl_mr3x20_flash_data); ath79_register_gpio_keys_polled(-1, TL_MR3X20_KEYS_POLL_INTERVAL, ARRAY_SIZE(tl_mr3x20_gpio_keys), tl_mr3x20_gpio_keys); ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); ath79_register_mdio(0, 0x0); /* LAN ports */ ath79_register_eth(1); /* WAN port */ ath79_register_eth(0); ap91_pci_init(ee, mac); }