/*
* Control Adaptive Noise Immunity Parameters
*/
HAL_BOOL
ar5416AniControl(struct ath_hal *ah, HAL_ANI_CMD cmd, int param, HAL_BOOL inISR)
{
#define N(a) (sizeof(a)/sizeof(a[0]))
typedef int TABLE[];
struct ath_hal_5416 *ahp = AH5416(ah);
struct ar5416AniState *aniState = ahp->ah_curani;
switch (cmd & ahp->ah_ani_function) {
case HAL_ANI_NOISE_IMMUNITY_LEVEL: {
u_int level = param;
if (level >= N(ahp->ah_totalSizeDesired)) {
HDPRINTF(ah, HAL_DBG_ANI, "%s: level out of range (%u > %u)\n",
__func__, level, (unsigned) N(ahp->ah_totalSizeDesired));
return AH_FALSE;
}
OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ,
AR_PHY_DESIRED_SZ_TOT_DES, ahp->ah_totalSizeDesired[level]);
OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
AR_PHY_AGC_CTL1_COARSE_LOW, ahp->ah_coarseLow[level]);
OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
AR_PHY_AGC_CTL1_COARSE_HIGH, ahp->ah_coarseHigh[level]);
OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
AR_PHY_FIND_SIG_FIRPWR, ahp->ah_firpwr[level]);
if (level > aniState->noiseImmunityLevel)
ahp->ah_stats.ast_ani_niup++;
else if (level < aniState->noiseImmunityLevel)
ahp->ah_stats.ast_ani_nidown++;
aniState->noiseImmunityLevel = level;
break;
}
case HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION: {
const TABLE m1ThreshLow = { 127, 50 };
const TABLE m2ThreshLow = { 127, 40 };
const TABLE m1Thresh = { 127, 0x4d };
const TABLE m2Thresh = { 127, 0x40 };
const TABLE m2CountThr = { 31, 16 };
const TABLE m2CountThrLow = { 63, 48 };
u_int on = param ? 1 : 0;
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
AR_PHY_SFCORR_LOW_M1_THRESH_LOW, m1ThreshLow[on]);
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
AR_PHY_SFCORR_LOW_M2_THRESH_LOW, m2ThreshLow[on]);
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
AR_PHY_SFCORR_M1_THRESH, m1Thresh[on]);
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
AR_PHY_SFCORR_M2_THRESH, m2Thresh[on]);
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
AR_PHY_SFCORR_M2COUNT_THR, m2CountThr[on]);
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW, m2CountThrLow[on]);
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, AR_PHY_SFCORR_EXT_M1_THRESH_LOW, m1ThreshLow[on]);
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, AR_PHY_SFCORR_EXT_M2_THRESH_LOW, m2ThreshLow[on]);
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, AR_PHY_SFCORR_EXT_M1_THRESH, m1Thresh[on]);
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, AR_PHY_SFCORR_EXT_M2_THRESH, m2Thresh[on]);
if (on) {
OS_REG_SET_BIT(ah, AR_PHY_SFCORR_LOW,
AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
} else {
OS_REG_CLR_BIT(ah, AR_PHY_SFCORR_LOW,
AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
}
if (!on != aniState->ofdmWeakSigDetectOff) {
if (on)
ahp->ah_stats.ast_ani_ofdmon++;
else
ahp->ah_stats.ast_ani_ofdmoff++;
aniState->ofdmWeakSigDetectOff = !on;
}
break;
}
case HAL_ANI_CCK_WEAK_SIGNAL_THR: {
const TABLE weakSigThrCck = { 8, 6 };
u_int high = param ? 1 : 0;
OS_REG_RMW_FIELD(ah, AR_PHY_CCK_DETECT,
AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK,
weakSigThrCck[high]);
if (high != aniState->cckWeakSigThreshold) {
if (high)
ahp->ah_stats.ast_ani_cckhigh++;
else
ahp->ah_stats.ast_ani_ccklow++;
aniState->cckWeakSigThreshold = high;
}
break;
}
case HAL_ANI_FIRSTEP_LEVEL: {
const TABLE firstep = { 0, 4, 8 };
u_int level = param;
if (level >= N(firstep)) {
HDPRINTF(ah, HAL_DBG_ANI, "%s: level out of range (%u > %u)\n",
__func__, level, (unsigned) N(firstep));
return AH_FALSE;
}
OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
AR_PHY_FIND_SIG_FIRSTEP, firstep[level]);
if (level > aniState->firstepLevel)
ahp->ah_stats.ast_ani_stepup++;
else if (level < aniState->firstepLevel)
ahp->ah_stats.ast_ani_stepdown++;
aniState->firstepLevel = level;
break;
}
case HAL_ANI_SPUR_IMMUNITY_LEVEL: {
const TABLE cycpwrThr1 = { 2, 4, 6, 8, 10, 12, 14, 16 };
u_int level = param;
if (level >= N(cycpwrThr1)) {
HDPRINTF(ah, HAL_DBG_ANI, "%s: level out of range (%u > %u)\n",
__func__, level, (unsigned) N(cycpwrThr1));
return AH_FALSE;
}
OS_REG_RMW_FIELD(ah, AR_PHY_TIMING5,
AR_PHY_TIMING5_CYCPWR_THR1, cycpwrThr1[level]);
if (level > aniState->spurImmunityLevel)
ahp->ah_stats.ast_ani_spurup++;
else if (level < aniState->spurImmunityLevel)
ahp->ah_stats.ast_ani_spurdown++;
aniState->spurImmunityLevel = level;
break;
}
case HAL_ANI_PRESENT:
break;
#ifdef AH_PRIVATE_DIAG
case HAL_ANI_MODE:
if (param == 0) {
ahp->ah_procPhyErr &= ~HAL_PROCESS_ANI;
/* Turn off HW counters if we have them */
ar5416AniDetach(ah);
ar5416SetRxFilter(ah,
ar5416GetRxFilter(ah) &~ HAL_RX_FILTER_PHYERR);
} else { /* normal/auto mode */
ahp->ah_procPhyErr |= HAL_PROCESS_ANI;
if (ahp->ah_hasHwPhyCounters) {
ar5416SetRxFilter(ah,
ar5416GetRxFilter(ah) &~ HAL_RX_FILTER_PHYERR);
} else {
ar5416SetRxFilter(ah,
ar5416GetRxFilter(ah) | HAL_RX_FILTER_PHYERR);
}
}
break;
case HAL_ANI_PHYERR_RESET:
ahp->ah_stats.ast_ani_ofdmerrs = 0;
ahp->ah_stats.ast_ani_cckerrs = 0;
break;
#endif /* AH_PRIVATE_DIAG */
default:
HDPRINTF(ah, HAL_DBG_ANI, "%s: invalid cmd %u\n", __func__, cmd);
return AH_FALSE;
}
HDPRINTF(ah, HAL_DBG_ANI, "%s: ANI parameters:\n", __func__);
HDPRINTF(ah, HAL_DBG_ANI,
"noiseImmunityLevel=%d, spurImmunityLevel=%d, ofdmWeakSigDetectOff=%d\n",
aniState->noiseImmunityLevel, aniState->spurImmunityLevel,
!aniState->ofdmWeakSigDetectOff);
HDPRINTF(ah, HAL_DBG_ANI,
"cckWeakSigThreshold=%d, firstepLevel=%d, listenTime=%d\n",
aniState->cckWeakSigThreshold, aniState->firstepLevel,
aniState->listenTime);
HDPRINTF(ah, HAL_DBG_ANI,
"cycleCount=%d, ofdmPhyErrCount=%d, cckPhyErrCount=%d\n\n",
aniState->cycleCount, aniState->ofdmPhyErrCount,
aniState->cckPhyErrCount);
#ifndef REMOVE_PKT_LOG
/* do pktlog */
{
struct log_ani log_data;
/* Populate the ani log record */
log_data.phyStatsDisable = DO_ANI(ah);
log_data.noiseImmunLvl = aniState->noiseImmunityLevel;
log_data.spurImmunLvl = aniState->spurImmunityLevel;
log_data.ofdmWeakDet = aniState->ofdmWeakSigDetectOff;
log_data.ofdmWeakDet = aniState->ofdmWeakSigDetectOff;
log_data.cckWeakThr = aniState->cckWeakSigThreshold;
log_data.firLvl = aniState->firstepLevel;
log_data.listenTime = aniState->listenTime;
log_data.cycleCount = aniState->cycleCount;
log_data.ofdmPhyErrCount = aniState->ofdmPhyErrCount;
log_data.cckPhyErrCount = aniState->cckPhyErrCount;
log_data.rssi = 0; /* Was for legacy single antenna rssi */
/* For HT chips, 2x2 */
/* Log 6 u_int16_t RSSIs as first in the int32_t 'misc' array */
/* ToDo: Update pktRssi for valid packets? */
/* ToDo: Update PhyErr RSSIs in aniState variable -
need Rx Descriptor / PhyErr*/
/* ToDo: Add parsing support in owldump, if needed */
log_data.misc[0] = aniState->pktRssi[0];
log_data.misc[1] = aniState->pktRssi[1];
log_data.misc[2] = aniState->ofdmErrRssi[0];
log_data.misc[3] = aniState->ofdmErrRssi[1];
log_data.misc[4] = aniState->cckErrRssi[0];
log_data.misc[5] = aniState->cckErrRssi[1];
if (inISR)
ath_hal_log_ani(ah->ah_sc, &log_data, 1); // set interrupt context flag
else
ath_hal_log_ani(ah->ah_sc, &log_data, 0); // clear interrupt context flag
}
#endif
return AH_TRUE;
#undef N
}
/*
* Control Adaptive Noise Immunity Parameters
*/
HAL_BOOL
ar9300_ani_control(struct ath_hal *ah, HAL_ANI_CMD cmd, int param)
{
struct ath_hal_9300 *ahp = AH9300(ah);
struct ar9300_ani_state *ani_state = ahp->ah_curani;
const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan;
int32_t value, value2;
u_int level = param;
u_int is_on;
if (chan == NULL && cmd != HAL_ANI_MODE) {
HALDEBUG(ah, HAL_DEBUG_UNMASKABLE,
"%s: ignoring cmd 0x%02x - no channel\n", __func__, cmd);
return AH_FALSE;
}
switch (cmd & ahp->ah_ani_function) {
case HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION:
{
int m1_thresh_low, m2_thresh_low;
int m1_thresh, m2_thresh;
int m2_count_thr, m2_count_thr_low;
int m1_thresh_low_ext, m2_thresh_low_ext;
int m1_thresh_ext, m2_thresh_ext;
/*
* is_on == 1 means ofdm weak signal detection is ON
* (default, less noise imm)
* is_on == 0 means ofdm weak signal detection is OFF
* (more noise imm)
*/
is_on = param ? 1 : 0;
if (AR_SREV_JUPITER(ah) || AR_SREV_APHRODITE(ah))
goto skip_ws_det;
/*
* make register setting for default (weak sig detect ON)
* come from INI file
*/
m1_thresh_low = is_on ?
ani_state->ini_def.m1_thresh_low : m1_thresh_low_off;
m2_thresh_low = is_on ?
ani_state->ini_def.m2_thresh_low : m2_thresh_low_off;
m1_thresh = is_on ?
ani_state->ini_def.m1_thresh : m1_thresh_off;
m2_thresh = is_on ?
ani_state->ini_def.m2_thresh : m2_thresh_off;
m2_count_thr = is_on ?
ani_state->ini_def.m2_count_thr : m2_count_thr_off;
m2_count_thr_low = is_on ?
ani_state->ini_def.m2_count_thr_low : m2_count_thr_low_off;
m1_thresh_low_ext = is_on ?
ani_state->ini_def.m1_thresh_low_ext : m1_thresh_low_ext_off;
m2_thresh_low_ext = is_on ?
ani_state->ini_def.m2_thresh_low_ext : m2_thresh_low_ext_off;
m1_thresh_ext = is_on ?
ani_state->ini_def.m1_thresh_ext : m1_thresh_ext_off;
m2_thresh_ext = is_on ?
ani_state->ini_def.m2_thresh_ext : m2_thresh_ext_off;
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
AR_PHY_SFCORR_LOW_M1_THRESH_LOW, m1_thresh_low);
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
AR_PHY_SFCORR_LOW_M2_THRESH_LOW, m2_thresh_low);
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, AR_PHY_SFCORR_M1_THRESH,
m1_thresh);
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, AR_PHY_SFCORR_M2_THRESH,
m2_thresh);
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, AR_PHY_SFCORR_M2COUNT_THR,
m2_count_thr);
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW, m2_count_thr_low);
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
AR_PHY_SFCORR_EXT_M1_THRESH_LOW, m1_thresh_low_ext);
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
AR_PHY_SFCORR_EXT_M2_THRESH_LOW, m2_thresh_low_ext);
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, AR_PHY_SFCORR_EXT_M1_THRESH,
m1_thresh_ext);
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, AR_PHY_SFCORR_EXT_M2_THRESH,
m2_thresh_ext);
skip_ws_det:
if (is_on) {
OS_REG_SET_BIT(ah, AR_PHY_SFCORR_LOW,
AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
} else {
OS_REG_CLR_BIT(ah, AR_PHY_SFCORR_LOW,
AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
}
if (!(is_on != ani_state->ofdm_weak_sig_detect_off)) {
HALDEBUG(ah, HAL_DEBUG_ANI,
"%s: ** ch %d: ofdm weak signal: %s=>%s\n",
__func__, chan->ic_freq,
!ani_state->ofdm_weak_sig_detect_off ? "on" : "off",
is_on ? "on" : "off");
if (is_on) {
ahp->ah_stats.ast_ani_ofdmon++;
} else {
ahp->ah_stats.ast_ani_ofdmoff++;
}
ani_state->ofdm_weak_sig_detect_off = !is_on;
}
break;
}
case HAL_ANI_FIRSTEP_LEVEL:
if (level >= ARRAY_LENGTH(firstep_table)) {
HALDEBUG(ah, HAL_DEBUG_UNMASKABLE,
"%s: HAL_ANI_FIRSTEP_LEVEL level out of range (%u > %u)\n",
__func__, level, (unsigned) ARRAY_LENGTH(firstep_table));
return AH_FALSE;
}
/*
* make register setting relative to default
* from INI file & cap value
*/
value =
firstep_table[level] -
firstep_table[HAL_ANI_DEF_FIRSTEP_LVL] +
ani_state->ini_def.firstep;
if (value < HAL_SIG_FIRSTEP_SETTING_MIN) {
value = HAL_SIG_FIRSTEP_SETTING_MIN;
}
if (value > HAL_SIG_FIRSTEP_SETTING_MAX) {
value = HAL_SIG_FIRSTEP_SETTING_MAX;
}
OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, AR_PHY_FIND_SIG_FIRSTEP, value);
/*
* we need to set first step low register too
* make register setting relative to default from INI file & cap value
*/
value2 =
firstep_table[level] -
firstep_table[HAL_ANI_DEF_FIRSTEP_LVL] +
ani_state->ini_def.firstep_low;
if (value2 < HAL_SIG_FIRSTEP_SETTING_MIN) {
value2 = HAL_SIG_FIRSTEP_SETTING_MIN;
}
if (value2 > HAL_SIG_FIRSTEP_SETTING_MAX) {
value2 = HAL_SIG_FIRSTEP_SETTING_MAX;
}
OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG_LOW,
AR_PHY_FIND_SIG_LOW_FIRSTEP_LOW, value2);
if (level != ani_state->firstep_level) {
HALDEBUG(ah, HAL_DEBUG_ANI,
"%s: ** ch %d: level %d=>%d[def:%d] firstep[level]=%d ini=%d\n",
__func__, chan->ic_freq, ani_state->firstep_level, level,
HAL_ANI_DEF_FIRSTEP_LVL, value, ani_state->ini_def.firstep);
HALDEBUG(ah, HAL_DEBUG_ANI,
"%s: ** ch %d: level %d=>%d[def:%d] "
"firstep_low[level]=%d ini=%d\n",
__func__, chan->ic_freq, ani_state->firstep_level, level,
HAL_ANI_DEF_FIRSTEP_LVL, value2,
ani_state->ini_def.firstep_low);
if (level > ani_state->firstep_level) {
ahp->ah_stats.ast_ani_stepup++;
} else if (level < ani_state->firstep_level) {
ahp->ah_stats.ast_ani_stepdown++;
}
ani_state->firstep_level = level;
}
break;
case HAL_ANI_SPUR_IMMUNITY_LEVEL:
if (level >= ARRAY_LENGTH(cycpwr_thr1_table)) {
HALDEBUG(ah, HAL_DEBUG_UNMASKABLE,
"%s: HAL_ANI_SPUR_IMMUNITY_LEVEL level "
"out of range (%u > %u)\n",
__func__, level, (unsigned) ARRAY_LENGTH(cycpwr_thr1_table));
return AH_FALSE;
}
/*
* make register setting relative to default from INI file & cap value
*/
value =
cycpwr_thr1_table[level] -
cycpwr_thr1_table[HAL_ANI_DEF_SPUR_IMMUNE_LVL] +
ani_state->ini_def.cycpwr_thr1;
if (value < HAL_SIG_SPUR_IMM_SETTING_MIN) {
value = HAL_SIG_SPUR_IMM_SETTING_MIN;
}
if (value > HAL_SIG_SPUR_IMM_SETTING_MAX) {
value = HAL_SIG_SPUR_IMM_SETTING_MAX;
}
OS_REG_RMW_FIELD(ah, AR_PHY_TIMING5, AR_PHY_TIMING5_CYCPWR_THR1, value);
/*
* set AR_PHY_EXT_CCA for extension channel
* make register setting relative to default from INI file & cap value
*/
value2 =
cycpwr_thr1_table[level] -
cycpwr_thr1_table[HAL_ANI_DEF_SPUR_IMMUNE_LVL] +
ani_state->ini_def.cycpwr_thr1_ext;
if (value2 < HAL_SIG_SPUR_IMM_SETTING_MIN) {
value2 = HAL_SIG_SPUR_IMM_SETTING_MIN;
}
if (value2 > HAL_SIG_SPUR_IMM_SETTING_MAX) {
value2 = HAL_SIG_SPUR_IMM_SETTING_MAX;
}
OS_REG_RMW_FIELD(ah, AR_PHY_EXT_CCA, AR_PHY_EXT_CYCPWR_THR1, value2);
if (level != ani_state->spur_immunity_level) {
HALDEBUG(ah, HAL_DEBUG_ANI,
"%s: ** ch %d: level %d=>%d[def:%d] "
"cycpwr_thr1[level]=%d ini=%d\n",
__func__, chan->ic_freq, ani_state->spur_immunity_level, level,
HAL_ANI_DEF_SPUR_IMMUNE_LVL, value,
ani_state->ini_def.cycpwr_thr1);
HALDEBUG(ah, HAL_DEBUG_ANI,
"%s: ** ch %d: level %d=>%d[def:%d] "
"cycpwr_thr1_ext[level]=%d ini=%d\n",
__func__, chan->ic_freq, ani_state->spur_immunity_level, level,
HAL_ANI_DEF_SPUR_IMMUNE_LVL, value2,
ani_state->ini_def.cycpwr_thr1_ext);
if (level > ani_state->spur_immunity_level) {
ahp->ah_stats.ast_ani_spurup++;
} else if (level < ani_state->spur_immunity_level) {
ahp->ah_stats.ast_ani_spurdown++;
}
ani_state->spur_immunity_level = level;
}
break;
case HAL_ANI_MRC_CCK:
/*
* is_on == 1 means MRC CCK ON (default, less noise imm)
* is_on == 0 means MRC CCK is OFF (more noise imm)
*/
is_on = param ? 1 : 0;
if (!AR_SREV_POSEIDON(ah)) {
OS_REG_RMW_FIELD(ah, AR_PHY_MRC_CCK_CTRL,
AR_PHY_MRC_CCK_ENABLE, is_on);
OS_REG_RMW_FIELD(ah, AR_PHY_MRC_CCK_CTRL,
AR_PHY_MRC_CCK_MUX_REG, is_on);
}
if (!(is_on != ani_state->mrc_cck_off)) {
HALDEBUG(ah, HAL_DEBUG_ANI,
"%s: ** ch %d: MRC CCK: %s=>%s\n", __func__, chan->ic_freq,
!ani_state->mrc_cck_off ? "on" : "off", is_on ? "on" : "off");
if (is_on) {
ahp->ah_stats.ast_ani_ccklow++;
} else {
ahp->ah_stats.ast_ani_cckhigh++;
}
ani_state->mrc_cck_off = !is_on;
}
break;
case HAL_ANI_PRESENT:
break;
#ifdef AH_PRIVATE_DIAG
case HAL_ANI_MODE:
if (param == 0) {
ahp->ah_proc_phy_err &= ~HAL_PROCESS_ANI;
/* Turn off HW counters if we have them */
ar9300_ani_detach(ah);
if (AH_PRIVATE(ah)->ah_curchan == NULL) {
return AH_TRUE;
}
/* if we're turning off ANI, reset regs back to INI settings */
if (ah->ah_config.ath_hal_enable_ani) {
HAL_ANI_CMD savefunc = ahp->ah_ani_function;
/* temporarly allow all functions so we can reset */
ahp->ah_ani_function = HAL_ANI_ALL;
HALDEBUG(ah, HAL_DEBUG_ANI,
"%s: disable all ANI functions\n", __func__);
ar9300_ani_set_odfm_noise_immunity_level(
ah, HAL_ANI_OFDM_DEF_LEVEL);
ar9300_ani_set_cck_noise_immunity_level(
ah, HAL_ANI_CCK_DEF_LEVEL);
ahp->ah_ani_function = savefunc;
}
} else { /* normal/auto mode */
HALDEBUG(ah, HAL_DEBUG_ANI, "%s: enabled\n", __func__);
ahp->ah_proc_phy_err |= HAL_PROCESS_ANI;
if (AH_PRIVATE(ah)->ah_curchan == NULL) {
return AH_TRUE;
}
ar9300_enable_mib_counters(ah);
ar9300_ani_reset(ah, AH_FALSE);
ani_state = ahp->ah_curani;
}
HALDEBUG(ah, HAL_DEBUG_ANI, "5 ANC: ahp->ah_proc_phy_err %x \n",
ahp->ah_proc_phy_err);
break;
case HAL_ANI_PHYERR_RESET:
ahp->ah_stats.ast_ani_ofdmerrs = 0;
ahp->ah_stats.ast_ani_cckerrs = 0;
break;
#endif /* AH_PRIVATE_DIAG */
default:
#if HAL_ANI_DEBUG
HALDEBUG(ah, HAL_DEBUG_ANI,
"%s: invalid cmd 0x%02x (allowed=0x%02x)\n",
__func__, cmd, ahp->ah_ani_function);
#endif
return AH_FALSE;
}
#if HAL_ANI_DEBUG
HALDEBUG(ah, HAL_DEBUG_ANI,
"%s: ANI parameters: SI=%d, ofdm_ws=%s FS=%d MRCcck=%s listen_time=%d "
"CC=%d listen=%d ofdm_errs=%d cck_errs=%d\n",
__func__, ani_state->spur_immunity_level,
!ani_state->ofdm_weak_sig_detect_off ? "on" : "off",
ani_state->firstep_level, !ani_state->mrc_cck_off ? "on" : "off",
ani_state->listen_time, ani_state->cycle_count,
ani_state->listen_time, ani_state->ofdm_phy_err_count,
ani_state->cck_phy_err_count);
#endif
#ifndef REMOVE_PKT_LOG
/* do pktlog */
{
struct log_ani log_data;
/* Populate the ani log record */
log_data.phy_stats_disable = DO_ANI(ah);
log_data.noise_immun_lvl = ani_state->ofdm_noise_immunity_level;
log_data.spur_immun_lvl = ani_state->spur_immunity_level;
log_data.ofdm_weak_det = ani_state->ofdm_weak_sig_detect_off;
log_data.cck_weak_thr = ani_state->cck_noise_immunity_level;
log_data.fir_lvl = ani_state->firstep_level;
log_data.listen_time = ani_state->listen_time;
log_data.cycle_count = ani_state->cycle_count;
/* express ofdm_phy_err_count as errors/second */
log_data.ofdm_phy_err_count = ani_state->listen_time ?
ani_state->ofdm_phy_err_count * 1000 / ani_state->listen_time : 0;
/* express cck_phy_err_count as errors/second */
log_data.cck_phy_err_count = ani_state->listen_time ?
ani_state->cck_phy_err_count * 1000 / ani_state->listen_time : 0;
log_data.rssi = ani_state->rssi;
/* clear interrupt context flag */
ath_hal_log_ani(AH_PRIVATE(ah)->ah_sc, &log_data, 0);
}
#endif
return AH_TRUE;
}
