static void vga_load_regs(const mux_reg_t *reg, unsigned short vendor, unsigned short device)
{
int c, r, i;
while (reg->fn != FN_END) {
switch (reg->fn) {
case FN_ATT:
attrib_write(reg->reg, reg->val);
break;
case FN_GRPH:
grph_write(reg->reg, reg->val);
break;
case FN_CRTC:
crtc_write(reg->reg, reg->val);
break;
case FN_SEQ:
seq_write(reg->reg, reg->val);
break;
case FN_DLUT:
io_base[0x3c8] = 0;
for (i = 0; i < sizeof(DAC); i++)
io_base[0x3c9] = DAC[i];
break;
case FN_MISC:
io_base[0x3c2] = reg->val;
break;
case FN_CMAP:
for (c = 0; c < 256; c++)
for (r = 0; r < 32; r++)
if (r < 8)
charmap[(c << 5) + r] = cmap_80[c][r];
else
charmap[(c << 5) + r] = 0;
break;
case FN_CARD:
for (i = 0; cards[i].vendor; i++)
if (cards[i].vendor == vendor &&
cards[i].device == device)
vga_load_regs(cards[i].mux, 0, 0);
break;
}
reg++;
}
}
void pnp_resume_wk(void *context)
{
#ifdef CONFIG_POWER_DOWN_MODE
NDIS_STATUS status;
uint res = _SUCCESS;
#endif
u8 x = 0;
_adapter * padapter = (_adapter *)context;
RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("pnp_resume_wk ===>\n"));
padapter->pwrctrlpriv.pnp_bstop_trx=_FALSE;
#ifdef CONFIG_POWER_DOWN_MODE
{
BOOL fRet = FALSE;
HANDLE hPMU = INVALID_HANDLE_VALUE;
u32 stLdoData = 0;
hPMU = CreateFile(_T("SDH1:"), GENERIC_READ|GENERIC_WRITE, FILE_SHARE_READ | FILE_SHARE_WRITE, NULL, OPEN_EXISTING, FILE_ATTRIBUTE_NORMAL, NULL);
if(INVALID_HANDLE_VALUE == hPMU )
{
RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("CreateFile Error SDH1==.\n"));
}
fRet=DeviceIoControl(hPMU,
IOCTL_CARD_STATE_NOTIFY,
NULL,
0,
&stLdoData,
sizeof(u32),
NULL,
NULL);
if(!fRet)
{
RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("DeviceIoControl Error \n"));
}
CloseHandle(hPMU);
}
//set 4-bit bus mode
attrib_read(padapter, 0x7, 1, &x);
x |= BIT(1);
attrib_write(padapter, 0x7, 1, &x);
//set Function 1 I/O Block Size to 512(0x0200)
x = 0x00;
attrib_write(padapter, 0x110, 1, &x);
x = 0x02;
attrib_write(padapter, 0x111, 1, &x);
//set Function 1 I/O Enable
attrib_read(padapter, 0x2, 1, &x);
x |= BIT(1);
attrib_write(padapter, 0x2, 1, &x);
//set Function 1 Interrupt Enable
x = BIT(0)|BIT(1);
attrib_write(padapter, 0x4, 1, &x);
status=padapter->dvobj_init(padapter);
if (status != NDIS_STATUS_SUCCESS) {
RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n initialize device object priv Failed!\n"));
}
res = rtl871x_hal_init(padapter);
if (res ==_FAIL) {
RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n========== pnp_hw_init_thread:init 8712 fail!!!!!!!!!!\n"));
}
#endif
RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("===>write SDIO_HIMR!!!\n"));
write16(padapter, SDIO_HIMR, 0x3ff);
{
u32 tmp32;
tmp32=read32(padapter, TXFF_EMPTY_TH);
RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,(" =====TXFF_EMPTY_TH=0x%.8x!\n",tmp32));
tmp32=tmp32 |0xfffff;
write32(padapter, TXFF_EMPTY_TH, tmp32);
tmp32=read32(padapter, TXFF_EMPTY_TH);
RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,(" =====TXFF_EMPTY_TH=0x%.8x!\n",tmp32));
}
padapter->hw_init_completed=_TRUE;
#ifdef CONFIG_POWER_DOWN_MODE
if(padapter->pwrctrlpriv.pwr_mode != padapter->registrypriv.power_mgnt){
set_ps_mode(padapter, padapter->registrypriv.power_mgnt, padapter->registrypriv.smart_ps);
}
#endif
NdisMSetInformationComplete(padapter->hndis_adapter, NDIS_STATUS_SUCCESS);
RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("pnp_resume_wk <===\n"));
}
