int atw_cardbus_enable(struct atw_softc *sc) { struct atw_cardbus_softc *csc = (void *) sc; cardbus_devfunc_t ct = csc->sc_ct; cardbus_chipset_tag_t cc = ct->ct_cc; cardbus_function_tag_t cf = ct->ct_cf; /* * Power on the socket. */ Cardbus_function_enable(ct); /* * Set up the PCI configuration registers. */ atw_cardbus_setup(csc); /* * Map and establish the interrupt. */ csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET, atw_intr, sc, sc->sc_dev.dv_xname); if (csc->sc_ih == NULL) { printf("%s: unable to establish interrupt at %d\n", sc->sc_dev.dv_xname, csc->sc_intrline); Cardbus_function_disable(csc->sc_ct); return (1); } return (0); }
void atw_cardbus_power(struct atw_softc *sc, int why) { struct atw_cardbus_softc *csc = (void *) sc; printf("%s: atw_cardbus_power\n", sc->sc_dev.dv_xname); if (why == PWR_RESUME) { /* * Give the PCI configuration registers a kick * in the head. */ #ifdef DIAGNOSTIC if (ATW_IS_ENABLED(sc) == 0) panic("atw_cardbus_power"); #endif atw_cardbus_setup(csc); } }
void atw_cardbus_attach(struct device *parent, struct device *self, void *aux) { struct atw_cardbus_softc *csc = (void *)self; struct atw_softc *sc = &csc->sc_atw; struct cardbus_attach_args *ca = aux; cardbus_devfunc_t ct = ca->ca_ct; bus_addr_t adr; sc->sc_dmat = ca->ca_dmat; csc->sc_ct = ct; csc->sc_tag = ca->ca_tag; /* * Power management hooks. */ sc->sc_enable = atw_cardbus_enable; sc->sc_disable = atw_cardbus_disable; sc->sc_power = atw_cardbus_power; /* Get revision info. */ sc->sc_rev = PCI_REVISION(ca->ca_class); #if 0 printf(": signature %08x\n%s", cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80), sc->sc_dev.dv_xname); #endif /* * Map the device. */ csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE; if (Cardbus_mapreg_map(ct, ATW_PCI_MMBA, CARDBUS_MAPREG_TYPE_MEM, 0, &sc->sc_st, &sc->sc_sh, &adr, &csc->sc_mapsize) == 0) { #if 0 printf(": atw_cardbus_attach mapped %d bytes mem space\n%s", csc->sc_mapsize, sc->sc_dev.dv_xname); #endif csc->sc_cben = CARDBUS_MEM_ENABLE; csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE; csc->sc_bar_reg = ATW_PCI_MMBA; csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM; } else if (Cardbus_mapreg_map(ct, ATW_PCI_IOBA, CARDBUS_MAPREG_TYPE_IO, 0, &sc->sc_st, &sc->sc_sh, &adr, &csc->sc_mapsize) == 0) { #if 0 printf(": atw_cardbus_attach mapped %d bytes I/O space\n%s", csc->sc_mapsize, sc->sc_dev.dv_xname); #endif csc->sc_cben = CARDBUS_IO_ENABLE; csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE; csc->sc_bar_reg = ATW_PCI_IOBA; csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO; } else { printf(": unable to map device registers\n"); return; } /* * Bring the chip out of powersave mode and initialize the * configuration registers. */ atw_cardbus_setup(csc); /* Remember which interrupt line. */ csc->sc_intrline = ca->ca_intrline; printf(": revision %d.%d: irq %d\n", (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf, csc->sc_intrline); #if 0 /* * The CardBus cards will make it to store-and-forward mode as * soon as you put them under any kind of load, so just start * out there. */ sc->sc_txthresh = 3; /* TBD name constant */ #endif /* * Finish off the attach. */ atw_attach(sc); ATW_WRITE(sc, ATW_FER, ATW_FER_INTR); /* * Power down the socket. */ Cardbus_function_disable(csc->sc_ct); }