static void b43_phy_ht_spur_avoid(struct b43_wldev *dev,
struct ieee80211_channel *new_channel)
{
struct bcma_device *core = dev->dev->bdev;
int spuravoid = 0;
/* Check for 13 and 14 is just a guess, we don't have enough logs. */
if (new_channel->hw_value == 13 || new_channel->hw_value == 14)
spuravoid = 1;
bcma_core_pll_ctl(core, B43_BCMA_CLKCTLST_PHY_PLL_REQ, 0, false);
bcma_pmu_spuravoid_pllupdate(&core->bus->drv_cc, spuravoid);
bcma_core_pll_ctl(core,
B43_BCMA_CLKCTLST_80211_PLL_REQ |
B43_BCMA_CLKCTLST_PHY_PLL_REQ,
B43_BCMA_CLKCTLST_80211_PLL_ST |
B43_BCMA_CLKCTLST_PHY_PLL_ST, false);
b43_mac_switch_freq(dev, spuravoid);
b43_wireless_core_phy_pll_reset(dev);
if (spuravoid)
b43_phy_set(dev, B43_PHY_HT_BBCFG, B43_PHY_HT_BBCFG_RSTRX);
else
b43_phy_mask(dev, B43_PHY_HT_BBCFG,
~B43_PHY_HT_BBCFG_RSTRX & 0xFFFF);
b43_phy_ht_reset_cca(dev);
}
static void b43_phy_ht_tx_power_ctl_idle_tssi(struct b43_wldev *dev)
{
struct b43_phy_ht *phy_ht = dev->phy.ht;
static const u16 base[] = { 0x840, 0x860, 0x880 };
u16 save_regs[3][3];
s32 rssi_buf[6];
int core;
for (core = 0; core < 3; core++) {
save_regs[core][1] = b43_phy_read(dev, base[core] + 6);
save_regs[core][2] = b43_phy_read(dev, base[core] + 7);
save_regs[core][0] = b43_phy_read(dev, base[core] + 0);
b43_phy_write(dev, base[core] + 6, 0);
b43_phy_mask(dev, base[core] + 7, ~0xF); /* 0xF? Or just 0x6? */
b43_phy_set(dev, base[core] + 0, 0x0400);
b43_phy_set(dev, base[core] + 0, 0x1000);
}
b43_phy_ht_tx_tone(dev);
udelay(20);
b43_phy_ht_poll_rssi(dev, HT_RSSI_TSSI_2G, rssi_buf, 1);
b43_phy_ht_stop_playback(dev);
b43_phy_ht_reset_cca(dev);
phy_ht->idle_tssi[0] = rssi_buf[0] & 0xff;
phy_ht->idle_tssi[1] = rssi_buf[2] & 0xff;
phy_ht->idle_tssi[2] = rssi_buf[4] & 0xff;
for (core = 0; core < 3; core++) {
b43_phy_write(dev, base[core] + 0, save_regs[core][0]);
b43_phy_write(dev, base[core] + 6, save_regs[core][1]);
b43_phy_write(dev, base[core] + 7, save_regs[core][2]);
}
}
static void b43_phy_ht_spur_avoid(struct b43_wldev *dev,
struct ieee80211_channel *new_channel)
{
struct bcma_device *core = dev->dev->bdev;
int spuravoid = 0;
u16 tmp;
/* Check for 13 and 14 is just a guess, we don't have enough logs. */
if (new_channel->hw_value == 13 || new_channel->hw_value == 14)
spuravoid = 1;
bcma_core_pll_ctl(core, B43_BCMA_CLKCTLST_PHY_PLL_REQ, 0, false);
bcma_pmu_spuravoid_pllupdate(&core->bus->drv_cc, spuravoid);
bcma_core_pll_ctl(core,
B43_BCMA_CLKCTLST_80211_PLL_REQ |
B43_BCMA_CLKCTLST_PHY_PLL_REQ,
B43_BCMA_CLKCTLST_80211_PLL_ST |
B43_BCMA_CLKCTLST_PHY_PLL_ST, false);
/* Values has been taken from wlc_bmac_switch_macfreq comments */
switch (spuravoid) {
case 2: /* 126MHz */
tmp = 0x2082;
break;
case 1: /* 123MHz */
tmp = 0x5341;
break;
default: /* 120MHz */
tmp = 0x8889;
}
b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, tmp);
b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
/* TODO: reset PLL */
if (spuravoid)
b43_phy_set(dev, B43_PHY_HT_BBCFG, B43_PHY_HT_BBCFG_RSTRX);
else
b43_phy_mask(dev, B43_PHY_HT_BBCFG,
~B43_PHY_HT_BBCFG_RSTRX & 0xFFFF);
b43_phy_ht_reset_cca(dev);
}
static void b43_phy_ht_tx_power_ctl_idle_tssi(struct b43_wldev *dev)
{
struct b43_phy_ht *phy_ht = dev->phy.ht;
s32 rssi_buf[6];
/* TODO */
b43_phy_ht_tx_tone(dev);
udelay(20);
b43_phy_ht_poll_rssi(dev, 4, rssi_buf, 1);
b43_phy_ht_stop_playback(dev);
b43_phy_ht_reset_cca(dev);
phy_ht->idle_tssi[0] = rssi_buf[0] & 0xff;
phy_ht->idle_tssi[1] = rssi_buf[2] & 0xff;
phy_ht->idle_tssi[2] = rssi_buf[4] & 0xff;
/* TODO */
}
