void cpu_init_f(ulong bootflag, ulong loaded_from_ldr) { #ifndef CONFIG_BFIN_BOOTROM_USES_EVT1 /* Build a NOP slide over the LDR jump block. Whee! */ char nops[0xC]; serial_early_puts("NOP Slide\n"); memset(nops, 0x00, sizeof(nops)); memcpy((void *)L1_INST_SRAM, nops, sizeof(nops)); #endif if (!loaded_from_ldr) { /* Relocate sections into L1 if the LDR didn't do it -- don't * check length because the linker script does the size * checking at build time. */ serial_early_puts("L1 Relocate\n"); extern char _stext_l1[], _text_l1_lma[], _text_l1_len[]; memcpy(&_stext_l1, &_text_l1_lma, (unsigned long)_text_l1_len); extern char _sdata_l1[], _data_l1_lma[], _data_l1_len[]; memcpy(&_sdata_l1, &_data_l1_lma, (unsigned long)_data_l1_len); } /* * Make sure our async settings are committed. Some bootroms * (like the BF537) will reset some registers on us after it * has finished loading the LDR. Or if we're booting over * JTAG, the initcode never got a chance to run. Or if we * aren't booting from parallel flash, the initcode skipped * this step completely. */ program_async_controller(NULL); /* Save RETX so we can pass it while booting Linux */ bfin_poweron_retx = bootflag; #ifdef CONFIG_DEBUG_DUMP /* Turn on hardware trace buffer */ bfin_write_TBUFCTL(TBUFPWR | TBUFEN); #endif #ifndef CONFIG_PANIC_HANG /* Reset upon a double exception rather than just hanging. * Do not do bfin_read on SWRST as that will reset status bits. */ # ifdef SWRST bfin_write_SWRST(DOUBLE_FAULT); # endif #endif #if defined(CONFIG_CORE1_RUN) && defined(COREB_L1_CODE_START) bfin_core1_start(); #endif serial_early_puts("Board init flash\n"); board_init_f(bootflag); }
void __init init_IRQ(void) { init_arch_irq(); #ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND /* Now that evt_ivhw is set up, turn this on */ trace_buff_offset = 0; bfin_write_TBUFCTL(BFIN_TRACE_ON); printk(KERN_INFO "Hardware Trace expanded to %ik\n", 1 << CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN); #endif }
void cpu_init_f(ulong bootflag, ulong loaded_from_ldr) { #ifndef CONFIG_BFIN_BOOTROM_USES_EVT1 /* Build a NOP slide over the LDR jump block. Whee! */ char nops[0xC]; serial_early_puts("NOP Slide\n"); memset(nops, 0x00, sizeof(nops)); memcpy((void *)L1_INST_SRAM, nops, sizeof(nops)); #endif if (!loaded_from_ldr) { /* Relocate sections into L1 if the LDR didn't do it -- don't * check length because the linker script does the size * checking at build time. */ serial_early_puts("L1 Relocate\n"); extern char _stext_l1[], _text_l1_lma[], _text_l1_len[]; memcpy(&_stext_l1, &_text_l1_lma, (unsigned long)_text_l1_len); extern char _sdata_l1[], _data_l1_lma[], _data_l1_len[]; memcpy(&_sdata_l1, &_data_l1_lma, (unsigned long)_data_l1_len); } #if defined(__ADSPBF537__) || defined(__ADSPBF536__) || defined(__ADSPBF534__) /* The BF537 bootrom will reset the EBIU_AMGCTL register on us * after it has finished loading the LDR. So configure it again. */ else bfin_write_EBIU_AMGCTL(CONFIG_EBIU_AMGCTL_VAL); #endif /* Save RETX so we can pass it while booting Linux */ bfin_poweron_retx = bootflag; #ifdef CONFIG_DEBUG_DUMP /* Turn on hardware trace buffer */ bfin_write_TBUFCTL(TBUFPWR | TBUFEN); #endif #ifndef CONFIG_PANIC_HANG /* Reset upon a double exception rather than just hanging. * Do not do bfin_read on SWRST as that will reset status bits. */ bfin_write_SWRST(DOUBLE_FAULT); #endif serial_early_puts("Board init flash\n"); board_init_f(bootflag); }
void __init init_IRQ(void) { struct irq_desc *desc; int irq; spin_lock_init(&irq_controller_lock); for (irq = 0, desc = irq_desc; irq < NR_IRQS; irq++, desc++) { *desc = bad_irq_desc; } init_arch_irq(); #ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND /* Now that evt_ivhw is set up, turn this on */ trace_buff_offset = 0; bfin_write_TBUFCTL(BFIN_TRACE_ON); printk(KERN_INFO "Hardware Trace expanded to %ik\n", 1 << CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN); #endif }
void cpu_init_f(ulong bootflag, ulong loaded_from_ldr) { if (!loaded_from_ldr) { /* Relocate sections into L1 if the LDR didn't do it -- don't * check length because the linker script does the size * checking at build time. */ extern char _stext_l1; serial_early_puts("L1 Relocate\n"); extern char _stext_l1, _etext_l1, _stext_l1_lma; memcpy(&_stext_l1, &_stext_l1_lma, (&_etext_l1 - &_stext_l1)); extern char _sdata_l1, _edata_l1, _sdata_l1_lma; memcpy(&_sdata_l1, &_sdata_l1_lma, (&_edata_l1 - &_sdata_l1)); } #if defined(__ADSPBF537__) || defined(__ADSPBF536__) || defined(__ADSPBF534__) /* The BF537 bootrom will reset the EBIU_AMGCTL register on us * after it has finished loading the LDR. So configure it again. */ else bfin_write_EBIU_AMGCTL(CONFIG_EBIU_AMGCTL_VAL); #endif /* Save RETX so we can pass it while booting Linux */ bfin_poweron_retx = bootflag; #ifdef CONFIG_DEBUG_DUMP /* Turn on hardware trace buffer */ bfin_write_TBUFCTL(TBUFPWR | TBUFEN); #endif #ifndef CONFIG_PANIC_HANG /* Reset upon a double exception rather than just hanging. * Do not do bfin_read on SWRST as that will reset status bits. */ bfin_write_SWRST(DOUBLE_FAULT); #endif serial_early_puts("Board init flash\n"); board_init_f(bootflag); }