static void remove_group(
QStringList in,
QString group,
QStringList &out)
{
QRegExp bgt("^\\s*0\\s+MLCAD\\s+BTG\\s+(.*)$");
for (int i = 0; i < in.size(); i++) {
QString line = in.at(i);
if (line.contains(bgt)) {
if (bgt.cap(bgt.numCaptures()) == group) {
i++;
} else {
out << line;
}
} else {
out << line;
}
}
return;
}
/* execute instructions on this CPU until icount expires */
static int hd6309_execute(int cycles) /* NS 970908 */
{
hd6309_ICount = cycles - hd6309.extra_cycles;
hd6309.extra_cycles = 0;
if (hd6309.int_state & (HD6309_CWAI | HD6309_SYNC))
{
CALL_MAME_DEBUG;
hd6309_ICount = 0;
}
else
{
do
{
pPPC = pPC;
CALL_MAME_DEBUG;
hd6309.ireg = ROP(PCD);
PC++;
#ifdef BIG_SWITCH
switch( hd6309.ireg )
{
case 0x00: neg_di(); break;
case 0x01: oim_di(); break;
case 0x02: aim_di(); break;
case 0x03: com_di(); break;
case 0x04: lsr_di(); break;
case 0x05: eim_di(); break;
case 0x06: ror_di(); break;
case 0x07: asr_di(); break;
case 0x08: asl_di(); break;
case 0x09: rol_di(); break;
case 0x0a: dec_di(); break;
case 0x0b: tim_di(); break;
case 0x0c: inc_di(); break;
case 0x0d: tst_di(); break;
case 0x0e: jmp_di(); break;
case 0x0f: clr_di(); break;
case 0x10: pref10(); break;
case 0x11: pref11(); break;
case 0x12: nop(); break;
case 0x13: sync(); break;
case 0x14: sexw(); break;
case 0x15: IIError(); break;
case 0x16: lbra(); break;
case 0x17: lbsr(); break;
case 0x18: IIError(); break;
case 0x19: daa(); break;
case 0x1a: orcc(); break;
case 0x1b: IIError(); break;
case 0x1c: andcc(); break;
case 0x1d: sex(); break;
case 0x1e: exg(); break;
case 0x1f: tfr(); break;
case 0x20: bra(); break;
case 0x21: brn(); break;
case 0x22: bhi(); break;
case 0x23: bls(); break;
case 0x24: bcc(); break;
case 0x25: bcs(); break;
case 0x26: bne(); break;
case 0x27: beq(); break;
case 0x28: bvc(); break;
case 0x29: bvs(); break;
case 0x2a: bpl(); break;
case 0x2b: bmi(); break;
case 0x2c: bge(); break;
case 0x2d: blt(); break;
case 0x2e: bgt(); break;
case 0x2f: ble(); break;
case 0x30: leax(); break;
case 0x31: leay(); break;
case 0x32: leas(); break;
case 0x33: leau(); break;
case 0x34: pshs(); break;
case 0x35: puls(); break;
case 0x36: pshu(); break;
case 0x37: pulu(); break;
case 0x38: IIError(); break;
case 0x39: rts(); break;
case 0x3a: abx(); break;
case 0x3b: rti(); break;
case 0x3c: cwai(); break;
case 0x3d: mul(); break;
case 0x3e: IIError(); break;
case 0x3f: swi(); break;
case 0x40: nega(); break;
case 0x41: IIError(); break;
case 0x42: IIError(); break;
case 0x43: coma(); break;
case 0x44: lsra(); break;
case 0x45: IIError(); break;
case 0x46: rora(); break;
case 0x47: asra(); break;
case 0x48: asla(); break;
case 0x49: rola(); break;
case 0x4a: deca(); break;
case 0x4b: IIError(); break;
case 0x4c: inca(); break;
case 0x4d: tsta(); break;
case 0x4e: IIError(); break;
case 0x4f: clra(); break;
case 0x50: negb(); break;
case 0x51: IIError(); break;
case 0x52: IIError(); break;
case 0x53: comb(); break;
case 0x54: lsrb(); break;
case 0x55: IIError(); break;
case 0x56: rorb(); break;
case 0x57: asrb(); break;
case 0x58: aslb(); break;
case 0x59: rolb(); break;
case 0x5a: decb(); break;
case 0x5b: IIError(); break;
case 0x5c: incb(); break;
case 0x5d: tstb(); break;
case 0x5e: IIError(); break;
case 0x5f: clrb(); break;
case 0x60: neg_ix(); break;
case 0x61: oim_ix(); break;
case 0x62: aim_ix(); break;
case 0x63: com_ix(); break;
case 0x64: lsr_ix(); break;
case 0x65: eim_ix(); break;
case 0x66: ror_ix(); break;
case 0x67: asr_ix(); break;
case 0x68: asl_ix(); break;
case 0x69: rol_ix(); break;
case 0x6a: dec_ix(); break;
case 0x6b: tim_ix(); break;
case 0x6c: inc_ix(); break;
case 0x6d: tst_ix(); break;
case 0x6e: jmp_ix(); break;
case 0x6f: clr_ix(); break;
case 0x70: neg_ex(); break;
case 0x71: oim_ex(); break;
case 0x72: aim_ex(); break;
case 0x73: com_ex(); break;
case 0x74: lsr_ex(); break;
case 0x75: eim_ex(); break;
case 0x76: ror_ex(); break;
case 0x77: asr_ex(); break;
case 0x78: asl_ex(); break;
case 0x79: rol_ex(); break;
case 0x7a: dec_ex(); break;
case 0x7b: tim_ex(); break;
case 0x7c: inc_ex(); break;
case 0x7d: tst_ex(); break;
case 0x7e: jmp_ex(); break;
case 0x7f: clr_ex(); break;
case 0x80: suba_im(); break;
case 0x81: cmpa_im(); break;
case 0x82: sbca_im(); break;
case 0x83: subd_im(); break;
case 0x84: anda_im(); break;
case 0x85: bita_im(); break;
case 0x86: lda_im(); break;
case 0x87: IIError(); break;
case 0x88: eora_im(); break;
case 0x89: adca_im(); break;
case 0x8a: ora_im(); break;
case 0x8b: adda_im(); break;
case 0x8c: cmpx_im(); break;
case 0x8d: bsr(); break;
case 0x8e: ldx_im(); break;
case 0x8f: IIError(); break;
case 0x90: suba_di(); break;
case 0x91: cmpa_di(); break;
case 0x92: sbca_di(); break;
case 0x93: subd_di(); break;
case 0x94: anda_di(); break;
case 0x95: bita_di(); break;
case 0x96: lda_di(); break;
case 0x97: sta_di(); break;
case 0x98: eora_di(); break;
case 0x99: adca_di(); break;
case 0x9a: ora_di(); break;
case 0x9b: adda_di(); break;
case 0x9c: cmpx_di(); break;
case 0x9d: jsr_di(); break;
case 0x9e: ldx_di(); break;
case 0x9f: stx_di(); break;
case 0xa0: suba_ix(); break;
case 0xa1: cmpa_ix(); break;
case 0xa2: sbca_ix(); break;
case 0xa3: subd_ix(); break;
case 0xa4: anda_ix(); break;
case 0xa5: bita_ix(); break;
case 0xa6: lda_ix(); break;
case 0xa7: sta_ix(); break;
case 0xa8: eora_ix(); break;
case 0xa9: adca_ix(); break;
case 0xaa: ora_ix(); break;
case 0xab: adda_ix(); break;
case 0xac: cmpx_ix(); break;
case 0xad: jsr_ix(); break;
case 0xae: ldx_ix(); break;
case 0xaf: stx_ix(); break;
case 0xb0: suba_ex(); break;
case 0xb1: cmpa_ex(); break;
case 0xb2: sbca_ex(); break;
case 0xb3: subd_ex(); break;
case 0xb4: anda_ex(); break;
case 0xb5: bita_ex(); break;
case 0xb6: lda_ex(); break;
case 0xb7: sta_ex(); break;
case 0xb8: eora_ex(); break;
case 0xb9: adca_ex(); break;
case 0xba: ora_ex(); break;
case 0xbb: adda_ex(); break;
case 0xbc: cmpx_ex(); break;
case 0xbd: jsr_ex(); break;
case 0xbe: ldx_ex(); break;
case 0xbf: stx_ex(); break;
case 0xc0: subb_im(); break;
case 0xc1: cmpb_im(); break;
case 0xc2: sbcb_im(); break;
case 0xc3: addd_im(); break;
case 0xc4: andb_im(); break;
case 0xc5: bitb_im(); break;
case 0xc6: ldb_im(); break;
case 0xc7: IIError(); break;
case 0xc8: eorb_im(); break;
case 0xc9: adcb_im(); break;
case 0xca: orb_im(); break;
case 0xcb: addb_im(); break;
case 0xcc: ldd_im(); break;
case 0xcd: ldq_im(); break; /* in m6809 was std_im */
case 0xce: ldu_im(); break;
case 0xcf: IIError(); break;
case 0xd0: subb_di(); break;
case 0xd1: cmpb_di(); break;
case 0xd2: sbcb_di(); break;
case 0xd3: addd_di(); break;
case 0xd4: andb_di(); break;
case 0xd5: bitb_di(); break;
case 0xd6: ldb_di(); break;
case 0xd7: stb_di(); break;
case 0xd8: eorb_di(); break;
case 0xd9: adcb_di(); break;
case 0xda: orb_di(); break;
case 0xdb: addb_di(); break;
case 0xdc: ldd_di(); break;
case 0xdd: std_di(); break;
case 0xde: ldu_di(); break;
case 0xdf: stu_di(); break;
case 0xe0: subb_ix(); break;
case 0xe1: cmpb_ix(); break;
case 0xe2: sbcb_ix(); break;
case 0xe3: addd_ix(); break;
case 0xe4: andb_ix(); break;
case 0xe5: bitb_ix(); break;
case 0xe6: ldb_ix(); break;
case 0xe7: stb_ix(); break;
case 0xe8: eorb_ix(); break;
case 0xe9: adcb_ix(); break;
case 0xea: orb_ix(); break;
case 0xeb: addb_ix(); break;
case 0xec: ldd_ix(); break;
case 0xed: std_ix(); break;
case 0xee: ldu_ix(); break;
case 0xef: stu_ix(); break;
case 0xf0: subb_ex(); break;
case 0xf1: cmpb_ex(); break;
case 0xf2: sbcb_ex(); break;
case 0xf3: addd_ex(); break;
case 0xf4: andb_ex(); break;
case 0xf5: bitb_ex(); break;
case 0xf6: ldb_ex(); break;
case 0xf7: stb_ex(); break;
case 0xf8: eorb_ex(); break;
case 0xf9: adcb_ex(); break;
case 0xfa: orb_ex(); break;
case 0xfb: addb_ex(); break;
case 0xfc: ldd_ex(); break;
case 0xfd: std_ex(); break;
case 0xfe: ldu_ex(); break;
case 0xff: stu_ex(); break;
}
#else
(*hd6309_main[hd6309.ireg])();
#endif /* BIG_SWITCH */
hd6309_ICount -= cycle_counts_page0[hd6309.ireg];
} while( hd6309_ICount > 0 );
hd6309_ICount -= hd6309.extra_cycles;
hd6309.extra_cycles = 0;
}
return cycles - hd6309_ICount; /* NS 970908 */
}
address AbstractInterpreterGenerator::generate_slow_signature_handler() {
// Slow_signature handler that respects the PPC C calling conventions.
//
// We get called by the native entry code with our output register
// area == 8. First we call InterpreterRuntime::get_result_handler
// to copy the pointer to the signature string temporarily to the
// first C-argument and to return the result_handler in
// R3_RET. Since native_entry will copy the jni-pointer to the
// first C-argument slot later on, it is OK to occupy this slot
// temporarilly. Then we copy the argument list on the java
// expression stack into native varargs format on the native stack
// and load arguments into argument registers. Integer arguments in
// the varargs vector will be sign-extended to 8 bytes.
//
// On entry:
// R3_ARG1 - intptr_t* Address of java argument list in memory.
// R15_prev_state - BytecodeInterpreter* Address of interpreter state for
// this method
// R19_method
//
// On exit (just before return instruction):
// R3_RET - contains the address of the result_handler.
// R4_ARG2 - is not updated for static methods and contains "this" otherwise.
// R5_ARG3-R10_ARG8: - When the (i-2)th Java argument is not of type float or double,
// ARGi contains this argument. Otherwise, ARGi is not updated.
// F1_ARG1-F13_ARG13 - contain the first 13 arguments of type float or double.
const int LogSizeOfTwoInstructions = 3;
// FIXME: use Argument:: GL: Argument names different numbers!
const int max_fp_register_arguments = 13;
const int max_int_register_arguments = 6; // first 2 are reserved
const Register arg_java = R21_tmp1;
const Register arg_c = R22_tmp2;
const Register signature = R23_tmp3; // is string
const Register sig_byte = R24_tmp4;
const Register fpcnt = R25_tmp5;
const Register argcnt = R26_tmp6;
const Register intSlot = R27_tmp7;
const Register target_sp = R28_tmp8;
const FloatRegister floatSlot = F0;
address entry = __ function_entry();
__ save_LR_CR(R0);
__ save_nonvolatile_gprs(R1_SP, _spill_nonvolatiles_neg(r14));
// We use target_sp for storing arguments in the C frame.
__ mr(target_sp, R1_SP);
__ push_frame_reg_args_nonvolatiles(0, R11_scratch1);
__ mr(arg_java, R3_ARG1);
__ call_VM_leaf(CAST_FROM_FN_PTR(address, InterpreterRuntime::get_signature), R16_thread, R19_method);
// Signature is in R3_RET. Signature is callee saved.
__ mr(signature, R3_RET);
// Get the result handler.
__ call_VM_leaf(CAST_FROM_FN_PTR(address, InterpreterRuntime::get_result_handler), R16_thread, R19_method);
{
Label L;
// test if static
// _access_flags._flags must be at offset 0.
// TODO PPC port: requires change in shared code.
//assert(in_bytes(AccessFlags::flags_offset()) == 0,
// "MethodDesc._access_flags == MethodDesc._access_flags._flags");
// _access_flags must be a 32 bit value.
assert(sizeof(AccessFlags) == 4, "wrong size");
__ lwa(R11_scratch1/*access_flags*/, method_(access_flags));
// testbit with condition register.
__ testbitdi(CCR0, R0, R11_scratch1/*access_flags*/, JVM_ACC_STATIC_BIT);
__ btrue(CCR0, L);
// For non-static functions, pass "this" in R4_ARG2 and copy it
// to 2nd C-arg slot.
// We need to box the Java object here, so we use arg_java
// (address of current Java stack slot) as argument and don't
// dereference it as in case of ints, floats, etc.
__ mr(R4_ARG2, arg_java);
__ addi(arg_java, arg_java, -BytesPerWord);
__ std(R4_ARG2, _abi(carg_2), target_sp);
__ bind(L);
}
// Will be incremented directly after loop_start. argcnt=0
// corresponds to 3rd C argument.
__ li(argcnt, -1);
// arg_c points to 3rd C argument
__ addi(arg_c, target_sp, _abi(carg_3));
// no floating-point args parsed so far
__ li(fpcnt, 0);
Label move_intSlot_to_ARG, move_floatSlot_to_FARG;
Label loop_start, loop_end;
Label do_int, do_long, do_float, do_double, do_dontreachhere, do_object, do_array, do_boxed;
// signature points to '(' at entry
#ifdef ASSERT
__ lbz(sig_byte, 0, signature);
__ cmplwi(CCR0, sig_byte, '(');
__ bne(CCR0, do_dontreachhere);
#endif
__ bind(loop_start);
__ addi(argcnt, argcnt, 1);
__ lbzu(sig_byte, 1, signature);
__ cmplwi(CCR0, sig_byte, ')'); // end of signature
__ beq(CCR0, loop_end);
__ cmplwi(CCR0, sig_byte, 'B'); // byte
__ beq(CCR0, do_int);
__ cmplwi(CCR0, sig_byte, 'C'); // char
__ beq(CCR0, do_int);
__ cmplwi(CCR0, sig_byte, 'D'); // double
__ beq(CCR0, do_double);
__ cmplwi(CCR0, sig_byte, 'F'); // float
__ beq(CCR0, do_float);
__ cmplwi(CCR0, sig_byte, 'I'); // int
__ beq(CCR0, do_int);
__ cmplwi(CCR0, sig_byte, 'J'); // long
__ beq(CCR0, do_long);
__ cmplwi(CCR0, sig_byte, 'S'); // short
__ beq(CCR0, do_int);
__ cmplwi(CCR0, sig_byte, 'Z'); // boolean
__ beq(CCR0, do_int);
__ cmplwi(CCR0, sig_byte, 'L'); // object
__ beq(CCR0, do_object);
__ cmplwi(CCR0, sig_byte, '['); // array
__ beq(CCR0, do_array);
// __ cmplwi(CCR0, sig_byte, 'V'); // void cannot appear since we do not parse the return type
// __ beq(CCR0, do_void);
__ bind(do_dontreachhere);
__ unimplemented("ShouldNotReachHere in slow_signature_handler", 120);
__ bind(do_array);
{
Label start_skip, end_skip;
__ bind(start_skip);
__ lbzu(sig_byte, 1, signature);
__ cmplwi(CCR0, sig_byte, '[');
__ beq(CCR0, start_skip); // skip further brackets
__ cmplwi(CCR0, sig_byte, '9');
__ bgt(CCR0, end_skip); // no optional size
__ cmplwi(CCR0, sig_byte, '0');
__ bge(CCR0, start_skip); // skip optional size
__ bind(end_skip);
__ cmplwi(CCR0, sig_byte, 'L');
__ beq(CCR0, do_object); // for arrays of objects, the name of the object must be skipped
__ b(do_boxed); // otherwise, go directly to do_boxed
}
__ bind(do_object);
{
Label L;
__ bind(L);
__ lbzu(sig_byte, 1, signature);
__ cmplwi(CCR0, sig_byte, ';');
__ bne(CCR0, L);
}
// Need to box the Java object here, so we use arg_java (address of
// current Java stack slot) as argument and don't dereference it as
// in case of ints, floats, etc.
Label do_null;
__ bind(do_boxed);
__ ld(R0,0, arg_java);
__ cmpdi(CCR0, R0, 0);
__ li(intSlot,0);
__ beq(CCR0, do_null);
__ mr(intSlot, arg_java);
__ bind(do_null);
__ std(intSlot, 0, arg_c);
__ addi(arg_java, arg_java, -BytesPerWord);
__ addi(arg_c, arg_c, BytesPerWord);
__ cmplwi(CCR0, argcnt, max_int_register_arguments);
__ blt(CCR0, move_intSlot_to_ARG);
__ b(loop_start);
__ bind(do_int);
__ lwa(intSlot, 0, arg_java);
__ std(intSlot, 0, arg_c);
__ addi(arg_java, arg_java, -BytesPerWord);
__ addi(arg_c, arg_c, BytesPerWord);
__ cmplwi(CCR0, argcnt, max_int_register_arguments);
__ blt(CCR0, move_intSlot_to_ARG);
__ b(loop_start);
__ bind(do_long);
__ ld(intSlot, -BytesPerWord, arg_java);
__ std(intSlot, 0, arg_c);
__ addi(arg_java, arg_java, - 2 * BytesPerWord);
__ addi(arg_c, arg_c, BytesPerWord);
__ cmplwi(CCR0, argcnt, max_int_register_arguments);
__ blt(CCR0, move_intSlot_to_ARG);
__ b(loop_start);
__ bind(do_float);
__ lfs(floatSlot, 0, arg_java);
#if defined(LINUX)
// Linux uses ELF ABI. Both original ELF and ELFv2 ABIs have float
// in the least significant word of an argument slot.
#if defined(VM_LITTLE_ENDIAN)
__ stfs(floatSlot, 0, arg_c);
#else
__ stfs(floatSlot, 4, arg_c);
#endif
#elif defined(AIX)
// Although AIX runs on big endian CPU, float is in most significant
// word of an argument slot.
__ stfs(floatSlot, 0, arg_c);
#else
#error "unknown OS"
#endif
__ addi(arg_java, arg_java, -BytesPerWord);
__ addi(arg_c, arg_c, BytesPerWord);
__ cmplwi(CCR0, fpcnt, max_fp_register_arguments);
__ blt(CCR0, move_floatSlot_to_FARG);
__ b(loop_start);
__ bind(do_double);
__ lfd(floatSlot, - BytesPerWord, arg_java);
__ stfd(floatSlot, 0, arg_c);
__ addi(arg_java, arg_java, - 2 * BytesPerWord);
__ addi(arg_c, arg_c, BytesPerWord);
__ cmplwi(CCR0, fpcnt, max_fp_register_arguments);
__ blt(CCR0, move_floatSlot_to_FARG);
__ b(loop_start);
__ bind(loop_end);
__ pop_frame();
__ restore_nonvolatile_gprs(R1_SP, _spill_nonvolatiles_neg(r14));
__ restore_LR_CR(R0);
__ blr();
Label move_int_arg, move_float_arg;
__ bind(move_int_arg); // each case must consist of 2 instructions (otherwise adapt LogSizeOfTwoInstructions)
__ mr(R5_ARG3, intSlot); __ b(loop_start);
__ mr(R6_ARG4, intSlot); __ b(loop_start);
__ mr(R7_ARG5, intSlot); __ b(loop_start);
__ mr(R8_ARG6, intSlot); __ b(loop_start);
__ mr(R9_ARG7, intSlot); __ b(loop_start);
__ mr(R10_ARG8, intSlot); __ b(loop_start);
__ bind(move_float_arg); // each case must consist of 2 instructions (otherwise adapt LogSizeOfTwoInstructions)
__ fmr(F1_ARG1, floatSlot); __ b(loop_start);
__ fmr(F2_ARG2, floatSlot); __ b(loop_start);
__ fmr(F3_ARG3, floatSlot); __ b(loop_start);
__ fmr(F4_ARG4, floatSlot); __ b(loop_start);
__ fmr(F5_ARG5, floatSlot); __ b(loop_start);
__ fmr(F6_ARG6, floatSlot); __ b(loop_start);
__ fmr(F7_ARG7, floatSlot); __ b(loop_start);
__ fmr(F8_ARG8, floatSlot); __ b(loop_start);
__ fmr(F9_ARG9, floatSlot); __ b(loop_start);
__ fmr(F10_ARG10, floatSlot); __ b(loop_start);
__ fmr(F11_ARG11, floatSlot); __ b(loop_start);
__ fmr(F12_ARG12, floatSlot); __ b(loop_start);
__ fmr(F13_ARG13, floatSlot); __ b(loop_start);
__ bind(move_intSlot_to_ARG);
__ sldi(R0, argcnt, LogSizeOfTwoInstructions);
__ load_const(R11_scratch1, move_int_arg); // Label must be bound here.
__ add(R11_scratch1, R0, R11_scratch1);
__ mtctr(R11_scratch1/*branch_target*/);
__ bctr();
__ bind(move_floatSlot_to_FARG);
__ sldi(R0, fpcnt, LogSizeOfTwoInstructions);
__ addi(fpcnt, fpcnt, 1);
__ load_const(R11_scratch1, move_float_arg); // Label must be bound here.
__ add(R11_scratch1, R0, R11_scratch1);
__ mtctr(R11_scratch1/*branch_target*/);
__ bctr();
return entry;
}
/* execute instructions on this CPU until icount expires */
static CPU_EXECUTE( m6809 ) /* NS 970908 */
{
m68_state_t *m68_state = get_safe_token(device);
m68_state->icount = cycles - m68_state->extra_cycles;
m68_state->extra_cycles = 0;
check_irq_lines(m68_state);
if (m68_state->int_state & (M6809_CWAI | M6809_SYNC))
{
debugger_instruction_hook(device, PCD);
m68_state->icount = 0;
}
else
{
do
{
pPPC = pPC;
debugger_instruction_hook(device, PCD);
m68_state->ireg = ROP(PCD);
PC++;
#if BIG_SWITCH
switch( m68_state->ireg )
{
case 0x00: neg_di(m68_state); break;
case 0x01: neg_di(m68_state); break; /* undocumented */
case 0x02: IIError(m68_state); break;
case 0x03: com_di(m68_state); break;
case 0x04: lsr_di(m68_state); break;
case 0x05: IIError(m68_state); break;
case 0x06: ror_di(m68_state); break;
case 0x07: asr_di(m68_state); break;
case 0x08: asl_di(m68_state); break;
case 0x09: rol_di(m68_state); break;
case 0x0a: dec_di(m68_state); break;
case 0x0b: IIError(m68_state); break;
case 0x0c: inc_di(m68_state); break;
case 0x0d: tst_di(m68_state); break;
case 0x0e: jmp_di(m68_state); break;
case 0x0f: clr_di(m68_state); break;
case 0x10: pref10(m68_state); break;
case 0x11: pref11(m68_state); break;
case 0x12: nop(m68_state); break;
case 0x13: sync(m68_state); break;
case 0x14: IIError(m68_state); break;
case 0x15: IIError(m68_state); break;
case 0x16: lbra(m68_state); break;
case 0x17: lbsr(m68_state); break;
case 0x18: IIError(m68_state); break;
case 0x19: daa(m68_state); break;
case 0x1a: orcc(m68_state); break;
case 0x1b: IIError(m68_state); break;
case 0x1c: andcc(m68_state); break;
case 0x1d: sex(m68_state); break;
case 0x1e: exg(m68_state); break;
case 0x1f: tfr(m68_state); break;
case 0x20: bra(m68_state); break;
case 0x21: brn(m68_state); break;
case 0x22: bhi(m68_state); break;
case 0x23: bls(m68_state); break;
case 0x24: bcc(m68_state); break;
case 0x25: bcs(m68_state); break;
case 0x26: bne(m68_state); break;
case 0x27: beq(m68_state); break;
case 0x28: bvc(m68_state); break;
case 0x29: bvs(m68_state); break;
case 0x2a: bpl(m68_state); break;
case 0x2b: bmi(m68_state); break;
case 0x2c: bge(m68_state); break;
case 0x2d: blt(m68_state); break;
case 0x2e: bgt(m68_state); break;
case 0x2f: ble(m68_state); break;
case 0x30: leax(m68_state); break;
case 0x31: leay(m68_state); break;
case 0x32: leas(m68_state); break;
case 0x33: leau(m68_state); break;
case 0x34: pshs(m68_state); break;
case 0x35: puls(m68_state); break;
case 0x36: pshu(m68_state); break;
case 0x37: pulu(m68_state); break;
case 0x38: IIError(m68_state); break;
case 0x39: rts(m68_state); break;
case 0x3a: abx(m68_state); break;
case 0x3b: rti(m68_state); break;
case 0x3c: cwai(m68_state); break;
case 0x3d: mul(m68_state); break;
case 0x3e: IIError(m68_state); break;
case 0x3f: swi(m68_state); break;
case 0x40: nega(m68_state); break;
case 0x41: IIError(m68_state); break;
case 0x42: IIError(m68_state); break;
case 0x43: coma(m68_state); break;
case 0x44: lsra(m68_state); break;
case 0x45: IIError(m68_state); break;
case 0x46: rora(m68_state); break;
case 0x47: asra(m68_state); break;
case 0x48: asla(m68_state); break;
case 0x49: rola(m68_state); break;
case 0x4a: deca(m68_state); break;
case 0x4b: IIError(m68_state); break;
case 0x4c: inca(m68_state); break;
case 0x4d: tsta(m68_state); break;
case 0x4e: IIError(m68_state); break;
case 0x4f: clra(m68_state); break;
case 0x50: negb(m68_state); break;
case 0x51: IIError(m68_state); break;
case 0x52: IIError(m68_state); break;
case 0x53: comb(m68_state); break;
case 0x54: lsrb(m68_state); break;
case 0x55: IIError(m68_state); break;
case 0x56: rorb(m68_state); break;
case 0x57: asrb(m68_state); break;
case 0x58: aslb(m68_state); break;
case 0x59: rolb(m68_state); break;
case 0x5a: decb(m68_state); break;
case 0x5b: IIError(m68_state); break;
case 0x5c: incb(m68_state); break;
case 0x5d: tstb(m68_state); break;
case 0x5e: IIError(m68_state); break;
case 0x5f: clrb(m68_state); break;
case 0x60: neg_ix(m68_state); break;
case 0x61: IIError(m68_state); break;
case 0x62: IIError(m68_state); break;
case 0x63: com_ix(m68_state); break;
case 0x64: lsr_ix(m68_state); break;
case 0x65: IIError(m68_state); break;
case 0x66: ror_ix(m68_state); break;
case 0x67: asr_ix(m68_state); break;
case 0x68: asl_ix(m68_state); break;
case 0x69: rol_ix(m68_state); break;
case 0x6a: dec_ix(m68_state); break;
case 0x6b: IIError(m68_state); break;
case 0x6c: inc_ix(m68_state); break;
case 0x6d: tst_ix(m68_state); break;
case 0x6e: jmp_ix(m68_state); break;
case 0x6f: clr_ix(m68_state); break;
case 0x70: neg_ex(m68_state); break;
case 0x71: IIError(m68_state); break;
case 0x72: IIError(m68_state); break;
case 0x73: com_ex(m68_state); break;
case 0x74: lsr_ex(m68_state); break;
case 0x75: IIError(m68_state); break;
case 0x76: ror_ex(m68_state); break;
case 0x77: asr_ex(m68_state); break;
case 0x78: asl_ex(m68_state); break;
case 0x79: rol_ex(m68_state); break;
case 0x7a: dec_ex(m68_state); break;
case 0x7b: IIError(m68_state); break;
case 0x7c: inc_ex(m68_state); break;
case 0x7d: tst_ex(m68_state); break;
case 0x7e: jmp_ex(m68_state); break;
case 0x7f: clr_ex(m68_state); break;
case 0x80: suba_im(m68_state); break;
case 0x81: cmpa_im(m68_state); break;
case 0x82: sbca_im(m68_state); break;
case 0x83: subd_im(m68_state); break;
case 0x84: anda_im(m68_state); break;
case 0x85: bita_im(m68_state); break;
case 0x86: lda_im(m68_state); break;
case 0x87: sta_im(m68_state); break;
case 0x88: eora_im(m68_state); break;
case 0x89: adca_im(m68_state); break;
case 0x8a: ora_im(m68_state); break;
case 0x8b: adda_im(m68_state); break;
case 0x8c: cmpx_im(m68_state); break;
case 0x8d: bsr(m68_state); break;
case 0x8e: ldx_im(m68_state); break;
case 0x8f: stx_im(m68_state); break;
case 0x90: suba_di(m68_state); break;
case 0x91: cmpa_di(m68_state); break;
case 0x92: sbca_di(m68_state); break;
case 0x93: subd_di(m68_state); break;
case 0x94: anda_di(m68_state); break;
case 0x95: bita_di(m68_state); break;
case 0x96: lda_di(m68_state); break;
case 0x97: sta_di(m68_state); break;
case 0x98: eora_di(m68_state); break;
case 0x99: adca_di(m68_state); break;
case 0x9a: ora_di(m68_state); break;
case 0x9b: adda_di(m68_state); break;
case 0x9c: cmpx_di(m68_state); break;
case 0x9d: jsr_di(m68_state); break;
case 0x9e: ldx_di(m68_state); break;
case 0x9f: stx_di(m68_state); break;
case 0xa0: suba_ix(m68_state); break;
case 0xa1: cmpa_ix(m68_state); break;
case 0xa2: sbca_ix(m68_state); break;
case 0xa3: subd_ix(m68_state); break;
case 0xa4: anda_ix(m68_state); break;
case 0xa5: bita_ix(m68_state); break;
case 0xa6: lda_ix(m68_state); break;
case 0xa7: sta_ix(m68_state); break;
case 0xa8: eora_ix(m68_state); break;
case 0xa9: adca_ix(m68_state); break;
case 0xaa: ora_ix(m68_state); break;
case 0xab: adda_ix(m68_state); break;
case 0xac: cmpx_ix(m68_state); break;
case 0xad: jsr_ix(m68_state); break;
case 0xae: ldx_ix(m68_state); break;
case 0xaf: stx_ix(m68_state); break;
case 0xb0: suba_ex(m68_state); break;
case 0xb1: cmpa_ex(m68_state); break;
case 0xb2: sbca_ex(m68_state); break;
case 0xb3: subd_ex(m68_state); break;
case 0xb4: anda_ex(m68_state); break;
case 0xb5: bita_ex(m68_state); break;
case 0xb6: lda_ex(m68_state); break;
case 0xb7: sta_ex(m68_state); break;
case 0xb8: eora_ex(m68_state); break;
case 0xb9: adca_ex(m68_state); break;
case 0xba: ora_ex(m68_state); break;
case 0xbb: adda_ex(m68_state); break;
case 0xbc: cmpx_ex(m68_state); break;
case 0xbd: jsr_ex(m68_state); break;
case 0xbe: ldx_ex(m68_state); break;
case 0xbf: stx_ex(m68_state); break;
case 0xc0: subb_im(m68_state); break;
case 0xc1: cmpb_im(m68_state); break;
case 0xc2: sbcb_im(m68_state); break;
case 0xc3: addd_im(m68_state); break;
case 0xc4: andb_im(m68_state); break;
case 0xc5: bitb_im(m68_state); break;
case 0xc6: ldb_im(m68_state); break;
case 0xc7: stb_im(m68_state); break;
case 0xc8: eorb_im(m68_state); break;
case 0xc9: adcb_im(m68_state); break;
case 0xca: orb_im(m68_state); break;
case 0xcb: addb_im(m68_state); break;
case 0xcc: ldd_im(m68_state); break;
case 0xcd: std_im(m68_state); break;
case 0xce: ldu_im(m68_state); break;
case 0xcf: stu_im(m68_state); break;
case 0xd0: subb_di(m68_state); break;
case 0xd1: cmpb_di(m68_state); break;
case 0xd2: sbcb_di(m68_state); break;
case 0xd3: addd_di(m68_state); break;
case 0xd4: andb_di(m68_state); break;
case 0xd5: bitb_di(m68_state); break;
case 0xd6: ldb_di(m68_state); break;
case 0xd7: stb_di(m68_state); break;
case 0xd8: eorb_di(m68_state); break;
case 0xd9: adcb_di(m68_state); break;
case 0xda: orb_di(m68_state); break;
case 0xdb: addb_di(m68_state); break;
case 0xdc: ldd_di(m68_state); break;
case 0xdd: std_di(m68_state); break;
case 0xde: ldu_di(m68_state); break;
case 0xdf: stu_di(m68_state); break;
case 0xe0: subb_ix(m68_state); break;
case 0xe1: cmpb_ix(m68_state); break;
case 0xe2: sbcb_ix(m68_state); break;
case 0xe3: addd_ix(m68_state); break;
case 0xe4: andb_ix(m68_state); break;
case 0xe5: bitb_ix(m68_state); break;
case 0xe6: ldb_ix(m68_state); break;
case 0xe7: stb_ix(m68_state); break;
case 0xe8: eorb_ix(m68_state); break;
case 0xe9: adcb_ix(m68_state); break;
case 0xea: orb_ix(m68_state); break;
case 0xeb: addb_ix(m68_state); break;
case 0xec: ldd_ix(m68_state); break;
case 0xed: std_ix(m68_state); break;
case 0xee: ldu_ix(m68_state); break;
case 0xef: stu_ix(m68_state); break;
case 0xf0: subb_ex(m68_state); break;
case 0xf1: cmpb_ex(m68_state); break;
case 0xf2: sbcb_ex(m68_state); break;
case 0xf3: addd_ex(m68_state); break;
case 0xf4: andb_ex(m68_state); break;
case 0xf5: bitb_ex(m68_state); break;
case 0xf6: ldb_ex(m68_state); break;
case 0xf7: stb_ex(m68_state); break;
case 0xf8: eorb_ex(m68_state); break;
case 0xf9: adcb_ex(m68_state); break;
case 0xfa: orb_ex(m68_state); break;
case 0xfb: addb_ex(m68_state); break;
case 0xfc: ldd_ex(m68_state); break;
case 0xfd: std_ex(m68_state); break;
case 0xfe: ldu_ex(m68_state); break;
case 0xff: stu_ex(m68_state); break;
}
#else
(*m6809_main[m68_state->ireg])(m68_state);
#endif /* BIG_SWITCH */
m68_state->icount -= cycles1[m68_state->ireg];
} while( m68_state->icount > 0 );
m68_state->icount -= m68_state->extra_cycles;
m68_state->extra_cycles = 0;
}
return cycles - m68_state->icount; /* NS 970908 */
}
